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| author | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2010-02-14 18:47:07 +0100 |
|---|---|---|
| committer | Stefan Richter <stefanr@s5r6.in-berlin.de> | 2010-02-19 20:51:10 +0100 |
| commit | 1c1517efe173599ca2f1526ce7a04521cd424a9f (patch) | |
| tree | 72c9cfdb9481c689ecad6573e12e766ca5038cbc /drivers/firewire | |
| parent | b677532b971276f48e82578b4d829fb4382e7b41 (diff) | |
| download | kernel_samsung_tuna-1c1517efe173599ca2f1526ce7a04521cd424a9f.zip kernel_samsung_tuna-1c1517efe173599ca2f1526ce7a04521cd424a9f.tar.gz kernel_samsung_tuna-1c1517efe173599ca2f1526ce7a04521cd424a9f.tar.bz2 | |
firewire: ohci: enable cycle timer fix on ALi and NEC controllers
Discussed in "read_cycle_timer backwards for sub-cycle 0000, 0001",
http://thread.gmane.org/gmane.linux.kernel.firewire.devel/13704
Known bad controllers:
ALi M5271, listed by lspci as M5253 [10b9:5253]
NEC OrangeLink [1033:00cd] (rev 03)
NEC uPD72874 [1033:00f2] (rev 01)
VIA VT6306 [1106:3044] (rev 46)
VIA VT6308P, listed by lspci as rev c0
Reported-by: Pieter Palmers <pieterp@joow.be>
Reported-by: Håkan Johansson <f96hajo@chalmers.se>
Reported-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Diffstat (limited to 'drivers/firewire')
| -rw-r--r-- | drivers/firewire/ohci.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c index d6ba897..bf5e112 100644 --- a/drivers/firewire/ohci.c +++ b/drivers/firewire/ohci.c @@ -1817,13 +1817,14 @@ static u64 ohci_get_bus_time(struct fw_card *card) c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); } else { /* - * VIA controllers have two bugs when updating the iso cycle - * timer register: - * 1) When the lowest six bits are wrapping around to zero, + * Some controllers exhibit one or more of the following bugs + * when updating the iso cycle timer register: + * - When the lowest six bits are wrapping around to zero, * a read that happens at the same time will return garbage * in the lowest ten bits. - * 2) When the cycleOffset field wraps around to zero, the + * - When the cycleOffset field wraps around to zero, the * cycleCount field is not incremented for about 60 ns. + * - Occasionally, the entire register reads zero. * * To catch these, we read the register three times and ensure * that the difference between each two consecutive reads is @@ -2542,7 +2543,9 @@ static int __devinit pci_probe(struct pci_dev *dev, #endif ohci->bus_reset_packet_quirk = dev->vendor == PCI_VENDOR_ID_TI; - ohci->iso_cycle_timer_quirk = dev->vendor == PCI_VENDOR_ID_VIA; + ohci->iso_cycle_timer_quirk = dev->vendor == PCI_VENDOR_ID_AL || + dev->vendor == PCI_VENDOR_ID_NEC || + dev->vendor == PCI_VENDOR_ID_VIA; ar_context_init(&ohci->ar_request_ctx, ohci, OHCI1394_AsReqRcvContextControlSet); |