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authorImagination Technologies Ltd <gpl-support@imgtec.com>2011-03-08 17:34:16 +0000
committerColin Cross <ccross@android.com>2011-06-14 09:06:48 -0700
commit52ce8fbb4dcc0b0337c1dcf60348f4772273db83 (patch)
tree6e8d898264d5d3b736ee16a46c777f05deef1863 /drivers/gpu/pvr/sgx_options.h
parentf60a4091d8499f69fd16114b23756b8fbad3f633 (diff)
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gpu: pvr: Update to DDK 1.7.17.4142
Diffstat (limited to 'drivers/gpu/pvr/sgx_options.h')
-rw-r--r--drivers/gpu/pvr/sgx_options.h60
1 files changed, 36 insertions, 24 deletions
diff --git a/drivers/gpu/pvr/sgx_options.h b/drivers/gpu/pvr/sgx_options.h
index 6f91894..d2ddff6 100644
--- a/drivers/gpu/pvr/sgx_options.h
+++ b/drivers/gpu/pvr/sgx_options.h
@@ -1,6 +1,6 @@
/**********************************************************************
*
- * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
+ * Copyright (C) Imagination Technologies Ltd. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -26,79 +26,84 @@
#if defined(DEBUG) || defined (INTERNAL_TEST)
#define DEBUG_SET_OFFSET OPTIONS_BIT0
-#define OPTIONS_BIT0 0x1
+#define OPTIONS_BIT0 0x1U
#else
#define OPTIONS_BIT0 0x0
#endif
#if defined(PDUMP) || defined (INTERNAL_TEST)
#define PDUMP_SET_OFFSET OPTIONS_BIT1
-#define OPTIONS_BIT1 (0x1 << 1)
+#define OPTIONS_BIT1 (0x1U << 1)
#else
#define OPTIONS_BIT1 0x0
#endif
#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG) || defined (INTERNAL_TEST)
#define PVRSRV_USSE_EDM_STATUS_DEBUG_SET_OFFSET OPTIONS_BIT2
-#define OPTIONS_BIT2 (0x1 << 2)
+#define OPTIONS_BIT2 (0x1U << 2)
#else
#define OPTIONS_BIT2 0x0
#endif
#if defined(SUPPORT_HW_RECOVERY) || defined (INTERNAL_TEST)
#define SUPPORT_HW_RECOVERY_SET_OFFSET OPTIONS_BIT3
-#define OPTIONS_BIT3 (0x1 << 3)
+#define OPTIONS_BIT3 (0x1U << 3)
#else
#define OPTIONS_BIT3 0x0
#endif
+#if defined (SUPPORT_SID_INTERFACE)
+#define PVR_SECURE_HANDLES_SET_OFFSET OPTIONS_BIT4
+#define OPTIONS_BIT4 (0x1U << 4)
+#else
#if defined(PVR_SECURE_HANDLES) || defined (INTERNAL_TEST)
#define PVR_SECURE_HANDLES_SET_OFFSET OPTIONS_BIT4
-#define OPTIONS_BIT4 (0x1 << 4)
+#define OPTIONS_BIT4 (0x1U << 4)
#else
#define OPTIONS_BIT4 0x0
#endif
+#endif
#if defined(SGX_BYPASS_SYSTEM_CACHE) || defined (INTERNAL_TEST)
#define SGX_BYPASS_SYSTEM_CACHE_SET_OFFSET OPTIONS_BIT5
-#define OPTIONS_BIT5 (0x1 << 5)
+#define OPTIONS_BIT5 (0x1U << 5)
#else
#define OPTIONS_BIT5 0x0
#endif
#if defined(SGX_DMS_AGE_ENABLE) || defined (INTERNAL_TEST)
#define SGX_DMS_AGE_ENABLE_SET_OFFSET OPTIONS_BIT6
-#define OPTIONS_BIT6 (0x1 << 6)
+#define OPTIONS_BIT6 (0x1U << 6)
#else
#define OPTIONS_BIT6 0x0
#endif
#if defined(SGX_FAST_DPM_INIT) || defined (INTERNAL_TEST)
#define SGX_FAST_DPM_INIT_SET_OFFSET OPTIONS_BIT8
-#define OPTIONS_BIT8 (0x1 << 8)
+#define OPTIONS_BIT8 (0x1U << 8)
#else
#define OPTIONS_BIT8 0x0
#endif
#if defined(SGX_FEATURE_WRITEBACK_DCU) || defined (INTERNAL_TEST)
#define SGX_FEATURE_DCU_SET_OFFSET OPTIONS_BIT9
-#define OPTIONS_BIT9 (0x1 << 9)
+#define OPTIONS_BIT9 (0x1U << 9)
#else
#define OPTIONS_BIT9 0x0
#endif
#if defined(SGX_FEATURE_MP) || defined (INTERNAL_TEST)
#define SGX_FEATURE_MP_SET_OFFSET OPTIONS_BIT10
-#define OPTIONS_BIT10 (0x1 << 10)
+#define OPTIONS_BIT10 (0x1U << 10)
#else
#define OPTIONS_BIT10 0x0
#endif
#if defined(SGX_FEATURE_MULTITHREADED_UKERNEL) || defined (INTERNAL_TEST)
#define SGX_FEATURE_MULTITHREADED_UKERNEL_SET_OFFSET OPTIONS_BIT11
-#define OPTIONS_BIT11 (0x1 << 11)
+#define OPTIONS_BIT11 (0x1U << 11)
#else
#define OPTIONS_BIT11 0x0
#endif
@@ -107,7 +112,7 @@
#if defined(SGX_FEATURE_OVERLAPPED_SPM) || defined (INTERNAL_TEST)
#define SGX_FEATURE_OVERLAPPED_SPM_SET_OFFSET OPTIONS_BIT12
-#define OPTIONS_BIT12 (0x1 << 12)
+#define OPTIONS_BIT12 (0x1U << 12)
#else
#define OPTIONS_BIT12 0x0
#endif
@@ -115,14 +120,14 @@
#if defined(SGX_FEATURE_SYSTEM_CACHE) || defined (INTERNAL_TEST)
#define SGX_FEATURE_SYSTEM_CACHE_SET_OFFSET OPTIONS_BIT13
-#define OPTIONS_BIT13 (0x1 << 13)
+#define OPTIONS_BIT13 (0x1U << 13)
#else
#define OPTIONS_BIT13 0x0
#endif
#if defined(SGX_SUPPORT_HWPROFILING) || defined (INTERNAL_TEST)
#define SGX_SUPPORT_HWPROFILING_SET_OFFSET OPTIONS_BIT14
-#define OPTIONS_BIT14 (0x1 << 14)
+#define OPTIONS_BIT14 (0x1U << 14)
#else
#define OPTIONS_BIT14 0x0
#endif
@@ -131,28 +136,28 @@
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT) || defined (INTERNAL_TEST)
#define SUPPORT_ACTIVE_POWER_MANAGEMENT_SET_OFFSET OPTIONS_BIT15
-#define OPTIONS_BIT15 (0x1 << 15)
+#define OPTIONS_BIT15 (0x1U << 15)
#else
#define OPTIONS_BIT15 0x0
#endif
#if defined(SUPPORT_DISPLAYCONTROLLER_TILING) || defined (INTERNAL_TEST)
#define SUPPORT_DISPLAYCONTROLLER_TILING_SET_OFFSET OPTIONS_BIT16
-#define OPTIONS_BIT16 (0x1 << 16)
+#define OPTIONS_BIT16 (0x1U << 16)
#else
#define OPTIONS_BIT16 0x0
#endif
#if defined(SUPPORT_PERCONTEXT_PB) || defined (INTERNAL_TEST)
#define SUPPORT_PERCONTEXT_PB_SET_OFFSET OPTIONS_BIT17
-#define OPTIONS_BIT17 (0x1 << 17)
+#define OPTIONS_BIT17 (0x1U << 17)
#else
#define OPTIONS_BIT17 0x0
#endif
#if defined(SUPPORT_SGX_HWPERF) || defined (INTERNAL_TEST)
#define SUPPORT_SGX_HWPERF_SET_OFFSET OPTIONS_BIT18
-#define OPTIONS_BIT18 (0x1 << 18)
+#define OPTIONS_BIT18 (0x1U << 18)
#else
#define OPTIONS_BIT18 0x0
#endif
@@ -161,38 +166,45 @@
#if defined(SUPPORT_SGX_MMU_DUMMY_PAGE) || defined (INTERNAL_TEST)
#define SUPPORT_SGX_MMU_DUMMY_PAGE_SET_OFFSET OPTIONS_BIT19
-#define OPTIONS_BIT19 (0x1 << 19)
+#define OPTIONS_BIT19 (0x1U << 19)
#else
#define OPTIONS_BIT19 0x0
#endif
#if defined(SUPPORT_SGX_PRIORITY_SCHEDULING) || defined (INTERNAL_TEST)
#define SUPPORT_SGX_PRIORITY_SCHEDULING_SET_OFFSET OPTIONS_BIT20
-#define OPTIONS_BIT20 (0x1 << 20)
+#define OPTIONS_BIT20 (0x1U << 20)
#else
#define OPTIONS_BIT20 0x0
#endif
#if defined(SUPPORT_SGX_LOW_LATENCY_SCHEDULING) || defined (INTERNAL_TEST)
#define SUPPORT_SGX_LOW_LATENCY_SCHEDULING_SET_OFFSET OPTIONS_BIT21
-#define OPTIONS_BIT21 (0x1 << 21)
+#define OPTIONS_BIT21 (0x1U << 21)
#else
#define OPTIONS_BIT21 0x0
#endif
#if defined(USE_SUPPORT_NO_TA3D_OVERLAP) || defined (INTERNAL_TEST)
#define USE_SUPPORT_NO_TA3D_OVERLAP_SET_OFFSET OPTIONS_BIT22
-#define OPTIONS_BIT22 (0x1 << 22)
+#define OPTIONS_BIT22 (0x1U << 22)
#else
#define OPTIONS_BIT22 0x0
#endif
-
#if defined(SGX_FEATURE_MP) || defined (INTERNAL_TEST)
+#if defined(SGX_FEATURE_MP_CORE_COUNT)
#define OPTIONS_HIGHBYTE ((SGX_FEATURE_MP_CORE_COUNT-1) << SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET)
#define SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET 28UL
#define SGX_FEATURE_MP_CORE_COUNT_SET_MASK 0xFF
#else
+#define OPTIONS_HIGHBYTE (((SGX_FEATURE_MP_CORE_COUNT_TA-1) << SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET) |\
+ ((SGX_FEATURE_MP_CORE_COUNT_3D-1) << SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET_3D))
+#define SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET 24UL
+#define SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET_3D 28UL
+#define SGX_FEATURE_MP_CORE_COUNT_SET_MASK 0xFF
+#endif
+#else
#define OPTIONS_HIGHBYTE 0x0
#endif