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author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2009-06-05 15:38:41 +0800 |
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committer | Eric Anholt <eric@anholt.net> | 2009-06-05 11:34:30 +0000 |
commit | 2cce0d8740f0d1454d012401257d96c513ce358f (patch) | |
tree | 805f344d0c1e4d7704b0095684f52ef624c50289 /drivers/gpu | |
parent | e170b030dcd6aed11dde2d124c09991ec771f529 (diff) | |
download | kernel_samsung_tuna-2cce0d8740f0d1454d012401257d96c513ce358f.zip kernel_samsung_tuna-2cce0d8740f0d1454d012401257d96c513ce358f.tar.gz kernel_samsung_tuna-2cce0d8740f0d1454d012401257d96c513ce358f.tar.bz2 |
drm/i915: Disable tiling on IGDNG for now
Swizzle bit detection not working right on it.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_tiling.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index 540dd33..07d976b 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c @@ -170,6 +170,13 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev) } } + /* FIXME: check with memory config on IGDNG */ + if (IS_IGDNG(dev)) { + DRM_ERROR("disable tiling on IGDNG...\n"); + swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN; + swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN; + } + dev_priv->mm.bit_6_swizzle_x = swizzle_x; dev_priv->mm.bit_6_swizzle_y = swizzle_y; } |