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| author | Gustavo Diaz Prado <x0083741@ti.com> | 2011-01-31 18:40:13 -0600 |
|---|---|---|
| committer | Colin Cross <ccross@android.com> | 2011-06-14 09:06:47 -0700 |
| commit | 7d430f7c7ca91a24ee6601419828e2a2cb31762f (patch) | |
| tree | e3eb7cd877d443f8dcd96b43c404b158a621ed3b /drivers/gpu | |
| parent | a3c42a059c0f94b6beb530ad13f512122bfa6c43 (diff) | |
| download | kernel_samsung_tuna-7d430f7c7ca91a24ee6601419828e2a2cb31762f.zip kernel_samsung_tuna-7d430f7c7ca91a24ee6601419828e2a2cb31762f.tar.gz kernel_samsung_tuna-7d430f7c7ca91a24ee6601419828e2a2cb31762f.tar.bz2 | |
SGX: UDD: Use correct stride when TILER memory is used
This patch prevents a crash when TILER memory is being used. When
the framebuffer is using TILER the container physical stride of the
buffer should be used (depending on the bpp) instead of the 4K/8K
virtual stride since the SGX currently uses the physical address
of the buffer. This is a workaround to prevent such crash.
Change-Id: I14631743bb575b88cdc7fb2c0927d64c954eb744
Signed-off-by: Gustavo Diaz Prado <x0083741@ti.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c b/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c index 84ad658..cc07824 100644 --- a/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c +++ b/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c @@ -49,6 +49,12 @@ #include <linux/string.h> #include <linux/notifier.h> +#ifdef CONFIG_TILER_OMAP +#include <mach/tiler.h> +#define TILER_MIN_PADDR 0x60000000 +#define TILER_MAX_PADDR 0x7fffffff +#endif + #include "img_defs.h" #include "servicesext.h" #include "kerneldisplay.h" @@ -1441,6 +1447,23 @@ static OMAP_ERROR InitDev(OMAPLFB_DEVINFO *psDevInfo, int fb_idx) psPVRFBInfo->ulHeight = psLINFBInfo->var.yres; psPVRFBInfo->ulByteStride = psLINFBInfo->fix.line_length; psPVRFBInfo->ulFBSize = FBSize; + +#ifdef CONFIG_TILER_OMAP + /* If TILER is being used, use correct physical stride and FB size */ + if ((psPVRFBInfo->sSysAddr.uiAddr >= TILER_MIN_PADDR) && + (psPVRFBInfo->sSysAddr.uiAddr <= TILER_MAX_PADDR)) { + unsigned long max_rows; + u32 tiler_naddr; + /* Get the number of maximum pixel rows */ + max_rows = psPVRFBInfo->ulFBSize / psPVRFBInfo->ulByteStride; + /* Get the physical stride according to the TILER container */ + tiler_naddr = tiler_get_natural_addr( + (void *)psPVRFBInfo->sSysAddr.uiAddr); + psPVRFBInfo->ulByteStride = tiler_stride(tiler_naddr); + /* Calculate the whole TILER region to map in bytes */ + psPVRFBInfo->ulFBSize = max_rows * psPVRFBInfo->ulByteStride; + } +#endif psPVRFBInfo->ulBufferSize = psPVRFBInfo->ulHeight * psPVRFBInfo->ulByteStride; /* Get physical display size for DPI calculation */ |