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| author | Tony Lofthouse <a0741364@ti.com> | 2012-03-01 18:16:54 -0600 |
|---|---|---|
| committer | Ziyann <jaraidaniel@gmail.com> | 2014-10-01 13:00:08 +0200 |
| commit | 9a8bb91da66c26ec7d1fb2ce3eabf5cb97dfad94 (patch) | |
| tree | 6aeacaf5732fbfdd7ba139a3c25a2a92854f2469 /drivers/gpu | |
| parent | b94c552ad1b83abe4eb0cd884111d995f4ae5a49 (diff) | |
| download | kernel_samsung_tuna-9a8bb91da66c26ec7d1fb2ce3eabf5cb97dfad94.zip kernel_samsung_tuna-9a8bb91da66c26ec7d1fb2ce3eabf5cb97dfad94.tar.gz kernel_samsung_tuna-9a8bb91da66c26ec7d1fb2ce3eabf5cb97dfad94.tar.bz2 | |
omaplfb: If the framebuffer is in VRAM avoid mapping into Tiler1D
Calculate whether we get an address which lies in the range of the frame
buffer, if we do pass this on directly to dsscomp.
Previously the framebuffer was accidentally being mapped into Tiler1D,
which could cause some composition scenarios to fail to render because
HWC calculations assumed exclusive use of the tiler 1d slot for itself.
Change-Id: I7c90e4adb9bee25e6a3825d456653af088803f83
Signed-off-by: Tony Lofthouse <a0741364@ti.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c b/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c index a70b454..729ff55 100644 --- a/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c +++ b/drivers/gpu/pvr/omaplfb/omaplfb_displayclass.c @@ -926,6 +926,13 @@ static IMG_BOOL ProcessFlipV2(IMG_HANDLE hCmdCookie, continue; } + if (phyAddr.uiAddr >= psDevInfo->psLINFBInfo->fix.smem_start && + phyAddr.uiAddr < (psDevInfo->psLINFBInfo->fix.smem_start + psDevInfo->psLINFBInfo->fix.smem_len)) + { + asMemInfo[k].uiAddr = phyAddr.uiAddr; + continue; + } + /* normal gralloc layer */ psTilerInfo = kzalloc(sizeof(*psTilerInfo), GFP_KERNEL); if(!psTilerInfo) |