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| author | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-30 00:37:34 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-30 00:37:34 +0200 |
| commit | f1a28c02843efcfcc41982149880bac3ac180234 (patch) | |
| tree | b15ca1a140e463ef3cde6b9a8591e7be172ee1f1 /drivers/mtd/nand/nand_base.c | |
| parent | 9a1fcdfd4bee27c418424cac47abf7c049541297 (diff) | |
| download | kernel_samsung_tuna-f1a28c02843efcfcc41982149880bac3ac180234.zip kernel_samsung_tuna-f1a28c02843efcfcc41982149880bac3ac180234.tar.gz kernel_samsung_tuna-f1a28c02843efcfcc41982149880bac3ac180234.tar.bz2 | |
[MTD] NAND Expose the new raw mode function and status info to userspace
The raw read/write access to NAND (without ECC) has been changed in the
NAND rework. Expose the new way - setting the file mode via ioctl - to
userspace. Also allow to read out the ecc statistics information so userspace
tools can see that bitflips happened and whether errors where correctable
or not. Also expose the number of bad blocks for the partition, so nandwrite
can check if the data fits into the parition before writing to it.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/mtd/nand/nand_base.c')
| -rw-r--r-- | drivers/mtd/nand/nand_base.c | 26 |
1 files changed, 16 insertions, 10 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 7a3a449..ea6d2c3 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -347,7 +347,7 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) { struct nand_chip *chip = mtd->priv; uint8_t buf[2] = { 0, 0 }; - int block; + int block, ret; /* Get block number */ block = ((int)ofs) >> chip->bbt_erase_shift; @@ -356,16 +356,22 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) /* Do we have a flash based bad block table ? */ if (chip->options & NAND_USE_FLASH_BBT) - return nand_update_bbt(mtd, ofs); - - /* We write two bytes, so we dont have to mess with 16 bit access */ - ofs += mtd->oobsize; - chip->ops.len = 2; - chip->ops.datbuf = NULL; - chip->ops.oobbuf = buf; - chip->ops.ooboffs = chip->badblockpos & ~0x01; + ret = nand_update_bbt(mtd, ofs); + else { + /* We write two bytes, so we dont have to mess with 16 bit + * access + */ + ofs += mtd->oobsize; + chip->ops.len = 2; + chip->ops.datbuf = NULL; + chip->ops.oobbuf = buf; + chip->ops.ooboffs = chip->badblockpos & ~0x01; - return nand_do_write_oob(mtd, ofs, &chip->ops); + ret = nand_do_write_oob(mtd, ofs, &chip->ops); + } + if (!ret) + mtd->ecc_stats.badblocks++; + return ret; } /** |