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| author | Michael Chan <mchan@broadcom.com> | 2007-01-08 19:57:20 -0800 |
|---|---|---|
| committer | David S. Miller <davem@sunset.davemloft.net> | 2007-01-09 00:30:06 -0800 |
| commit | c1d2a1965a00693bddaddf75d57488a0d8e891af (patch) | |
| tree | 5658caed34980b6edb302b3fc0103a5d61e7dbb4 /drivers/net/tg3.h | |
| parent | d6aa4acebafe3acb0aade7704ec5b2f03742ea14 (diff) | |
| download | kernel_samsung_tuna-c1d2a1965a00693bddaddf75d57488a0d8e891af.zip kernel_samsung_tuna-c1d2a1965a00693bddaddf75d57488a0d8e891af.tar.gz kernel_samsung_tuna-c1d2a1965a00693bddaddf75d57488a0d8e891af.tar.bz2 | |
[TG3]: Add PHY workaround for 5755M.
Some PHY trim values need to be fine-tuned on 5755M to be
IEEE-compliant.
Update version to 3.72.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
| -rw-r--r-- | drivers/net/tg3.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index cf78a7e..80f59ac 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h @@ -1658,6 +1658,9 @@ #define MII_TG3_EPHY_TEST 0x1f /* 5906 PHY register */ #define MII_TG3_EPHY_SHADOW_EN 0x80 +#define MII_TG3_TEST1 0x1e +#define MII_TG3_TEST1_TRIM_EN 0x0010 + /* There are two ways to manage the TX descriptors on the tigon3. * Either the descriptors are in host DMA'able memory, or they * exist only in the cards on-chip SRAM. All 16 send bds are under @@ -2256,6 +2259,7 @@ struct tg3 { #define TG3_FLG2_1SHOT_MSI 0x10000000 #define TG3_FLG2_PHY_JITTER_BUG 0x20000000 #define TG3_FLG2_NO_FWARE_REPORTED 0x40000000 +#define TG3_FLG2_PHY_ADJUST_TRIM 0x80000000 u32 split_mode_max_reqs; #define SPLIT_MODE_5704_MAX_REQ 3 |