diff options
| author | Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> | 2008-04-25 14:39:14 -0700 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2008-04-25 14:39:14 -0700 |
| commit | b7aa1f1603bea4fdec49a915712dea280cfd07e8 (patch) | |
| tree | d0821e8110b96cd793384b79c470d951d9e7bb19 /drivers/pci | |
| parent | ef0ff95f136f0f2d035667af5d18b824609de320 (diff) | |
| download | kernel_samsung_tuna-b7aa1f1603bea4fdec49a915712dea280cfd07e8.zip kernel_samsung_tuna-b7aa1f1603bea4fdec49a915712dea280cfd07e8.tar.gz kernel_samsung_tuna-b7aa1f1603bea4fdec49a915712dea280cfd07e8.tar.bz2 | |
pciehp: Fix command write
Current implementation of pciehp_write_cmd() always enables command
completed interrupt. But pciehp_write_cmd() is also used for clearing
command completed interrupt enable bit. In this case, we must not set
the command completed interrupt enable bit. To fix this bug, this
patch add the check to see if caller wants to change command complete
interrupt enable bit.
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/hotplug/pciehp_hpc.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 3efb129..49883c5 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -301,7 +301,10 @@ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask) } slot_ctrl &= ~mask; - slot_ctrl |= ((cmd & mask) | CMD_CMPL_INTR_ENABLE); + slot_ctrl |= (cmd & mask); + /* Don't enable command completed if caller is changing it. */ + if (!(mask & CMD_CMPL_INTR_ENABLE)) + slot_ctrl |= CMD_CMPL_INTR_ENABLE; ctrl->cmd_busy = 1; smp_mb(); |