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authorJongpill Lee <boyko.lee@samsung.com>2010-07-16 15:07:37 +0900
committerKukjin Kim <kgene.kim@samsung.com>2010-08-05 18:32:42 +0900
commitacfdc56d541517266eeeeca3a4e5baafaa01c2a1 (patch)
treea3eda861cc3c7cce2f575ba503de32070d469df1 /drivers/serial/s5pv210.c
parentb1d69cc6704fc6d20a4425af9b6ced5a18620b2d (diff)
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ARM: S5PV310: Add serial port support
This patch adds UART serial port support for S5PV310. In the case of that serial device has just one clock source, driver can not control clock source. So add check function in get_clksrc and set_clksrc. Signed-off-by: Jongpill Lee <boyko.lee@samsung.com> Acked-by: Changhwan Youn <chaos.youn@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'drivers/serial/s5pv210.c')
-rw-r--r--drivers/serial/s5pv210.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/serial/s5pv210.c b/drivers/serial/s5pv210.c
index 4a789e5..6ebccd7 100644
--- a/drivers/serial/s5pv210.c
+++ b/drivers/serial/s5pv210.c
@@ -28,8 +28,12 @@
static int s5pv210_serial_setsource(struct uart_port *port,
struct s3c24xx_uart_clksrc *clk)
{
+ struct s3c2410_uartcfg *cfg = port->dev->platform_data;
unsigned long ucon = rd_regl(port, S3C2410_UCON);
+ if ((cfg->clocks_size) == 1)
+ return 0;
+
if (strcmp(clk->name, "pclk") == 0)
ucon &= ~S5PV210_UCON_CLKMASK;
else if (strcmp(clk->name, "uclk1") == 0)
@@ -47,10 +51,14 @@ static int s5pv210_serial_setsource(struct uart_port *port,
static int s5pv210_serial_getsource(struct uart_port *port,
struct s3c24xx_uart_clksrc *clk)
{
+ struct s3c2410_uartcfg *cfg = port->dev->platform_data;
u32 ucon = rd_regl(port, S3C2410_UCON);
clk->divisor = 1;
+ if ((cfg->clocks_size) == 1)
+ return 0;
+
switch (ucon & S5PV210_UCON_CLKMASK) {
case S5PV210_UCON_PCLK:
clk->name = "pclk";