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authorDan Murphy <dmurphy@ti.com>2012-02-17 09:59:08 -0600
committerZiyann <jaraidaniel@gmail.com>2014-10-01 12:56:38 +0200
commitac6c52707f02b9cb289aad58ef6376aee3157c01 (patch)
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OMAP4460: TWL: disable PD on VCORE1 shutdown
When the PREQ goes low, both VCORE1(VDD_CORE) and VDDD_MPU start transitioning to 0 volt but VCORE1 discharge is faster than VDD_MPU discharge. This causes reliability concern from OMAP's perspective. So, we disable pulldown on VCORE1 to slow down VDD_CORE discharge to make it comparable to VDD_MPU. The Pulldown does not impact DVFS transition, and actual OFF timing is not changed as well. Change-Id: I707bb4c4ae50b3452304180e6b42db6b2bfdedd9 Signed-off-by: Nishanth Menon <nm@ti.com> Conflicts: arch/arm/mach-omap2/omap_twl.c
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