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| author | Chase Venters <chase.venters@clientec.com> | 2006-07-08 11:10:29 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-07-12 12:56:45 -0700 |
| commit | f6dc8c5b8e04ce28720155383e971561a23899d5 (patch) | |
| tree | df590e4e096ac332a7d95ef96275bebd57ce70c9 /include/asm-xtensa | |
| parent | 0f74964627e0ece4ac8da0e2cd01906ec322b4fe (diff) | |
| download | kernel_samsung_tuna-f6dc8c5b8e04ce28720155383e971561a23899d5.zip kernel_samsung_tuna-f6dc8c5b8e04ce28720155383e971561a23899d5.tar.gz kernel_samsung_tuna-f6dc8c5b8e04ce28720155383e971561a23899d5.tar.bz2 | |
[PATCH] Make cpu_relax() imply barrier() on all arches
During the recent discussion of taking 'volatile' off of the spinlock, I
noticed that while most arches #define cpu_relax() such that it implies
barrier(), some arches define cpu_relax() to be empty.
This patch changes the definition of cpu_relax() for frv, h8300, m68knommu,
sh, sh64, v850 and xtensa from an empty while(0) to the compiler barrier().
Signed-off-by: Chase Venters <chase.venters@clientec.com>
Acked-by: Arjan van de Ven <arjan@Linux.intel.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-xtensa')
| -rw-r--r-- | include/asm-xtensa/processor.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/asm-xtensa/processor.h b/include/asm-xtensa/processor.h index d1d72ad..8b96e77 100644 --- a/include/asm-xtensa/processor.h +++ b/include/asm-xtensa/processor.h @@ -20,6 +20,7 @@ #include <xtensa/config/tie.h> #include <xtensa/config/system.h> +#include <linux/compiler.h> #include <asm/ptrace.h> #include <asm/types.h> #include <asm/coprocessor.h> @@ -191,7 +192,7 @@ extern unsigned long get_wchan(struct task_struct *p); #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) #define KSTK_ESP(tsk) (task_pt_regs(tsk)->areg[1]) -#define cpu_relax() do { } while (0) +#define cpu_relax() barrier() /* Special register access. */ |