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author | Taras Kondratiuk <taras@ti.com> | 2012-08-08 00:21:27 -0500 |
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committer | Ziyan <jaraidaniel@gmail.com> | 2015-04-18 13:14:02 +0200 |
commit | 5048454e9af8262f70b161bbf3bb6092b90d22f2 (patch) | |
tree | 71b0228d8d0f4a2dfcefbf5a257bae969e80cc2b /include | |
parent | ca97ea9bdec8a9351d06e0cfc962890163ba6917 (diff) | |
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OMAPDSS: DSS: Scale DSS OPP according to pixel clock rate
Before enabling pixel clock DSS should set its OPP
for OPP framework to set correct VDD_CORE voltage level.
When pixel clock is disabled DSS can set the lowest OPP.
Change-Id: Ia1459614ae306dba9b048b149e474442e2880bba
Signed-off-by: Taras Kondratiuk <taras@ti.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/video/omapdss.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/video/omapdss.h b/include/video/omapdss.h index 352640d..b6928f6 100644 --- a/include/video/omapdss.h +++ b/include/video/omapdss.h @@ -303,6 +303,8 @@ static inline int omap_display_init(struct omap_dss_board_info *board_data) struct omap_display_platform_data { struct omap_dss_board_info *board_data; /* TODO: Additional members to be added when PM is considered */ + int (*device_scale) (struct device *req_dev, struct device *target_dev, + unsigned long rate); }; struct omap_video_timings { |