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| author | Guennadi Liakhovetski <g.liakhovetski@gmx.de> | 2010-11-02 11:27:24 +0000 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2010-11-08 09:35:26 +0900 |
| commit | 6af26c6c99f01e810f9944543df810e320284aa3 (patch) | |
| tree | 9eaca6f86d322b700484e13cd4ebb0b3f6fc0c97 /include | |
| parent | 5aefa34fada9d17a00635516688de34702451708 (diff) | |
| download | kernel_samsung_tuna-6af26c6c99f01e810f9944543df810e320284aa3.zip kernel_samsung_tuna-6af26c6c99f01e810f9944543df810e320284aa3.tar.gz kernel_samsung_tuna-6af26c6c99f01e810f9944543df810e320284aa3.tar.bz2 | |
sh: add clk_round_parent() to optimize parent clock rate
Sometimes it is possible and reasonable to adjust the parent clock rate to
improve precision of the child clock, e.g., if the child clock has no siblings.
clk_round_parent() is a new addition to the SH clock-framework API, that
implements such an optimization for child clocks with divisors, taking all
integer values in a range.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/sh_clk.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h index 4dca992..cea0c38 100644 --- a/include/linux/sh_clk.h +++ b/include/linux/sh_clk.h @@ -122,6 +122,10 @@ int clk_rate_table_find(struct clk *clk, long clk_rate_div_range_round(struct clk *clk, unsigned int div_min, unsigned int div_max, unsigned long rate); +long clk_round_parent(struct clk *clk, unsigned long target, + unsigned long *best_freq, unsigned long *parent_freq, + unsigned int div_min, unsigned int div_max); + #define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \ { \ .parent = _parent, \ |