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| author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-26 15:01:05 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-26 15:01:05 -0700 |
| commit | f6e6e883730aff2718610d3eba7608fcf73328ed (patch) | |
| tree | ec595db5e2454ac5f505a2ce971e45d674f8d6b3 /include | |
| parent | ba262e4a4d4c23b5e6c15dbb3a99696b562e8035 (diff) | |
| parent | f964c303fe33b0d2ee563349bc8bea4d57d7a265 (diff) | |
| download | kernel_samsung_tuna-f6e6e883730aff2718610d3eba7608fcf73328ed.zip kernel_samsung_tuna-f6e6e883730aff2718610d3eba7608fcf73328ed.tar.gz kernel_samsung_tuna-f6e6e883730aff2718610d3eba7608fcf73328ed.tar.bz2 | |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 3657/1: S3C24XX: Documentation update of Overview.txt
[ARM] Update mach-types
[ARM] 3656/1: S3C2412: Add S3C2412 and S3C2413 documenation
[ARM] 3654/1: add ajeco 1arm sbc support
[ARM] fix drivers/mfd/ucb1x00-core.c IRQ probing bug
[ARM] 3651/1: S3C24XX: Make arch list more detailed
[ARM] 3650/1: S3C2412: Update s3c2410_defconfig
[ARM] 3649/1: S3C24XX: Fix capitalisation of CPU on SMDK2440
[ARM] 3612/1: make pci bus optional for ixp4xx platform
[ARM] Remove MODE_(SVC|IRQ|FIQ|USR) and DEFAULT_FIQ
[ARM] Remove save_lr/restore_pc macros
[ARM] Remove partial non-v6 binutils compatibility
[ARM] Remove LOADREGS macro
[ARM] Remove RETINSTR macro
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-arm/assembler.h | 36 |
1 files changed, 0 insertions, 36 deletions
diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h index d53bafa..fce8328 100644 --- a/include/asm-arm/assembler.h +++ b/include/asm-arm/assembler.h @@ -55,30 +55,6 @@ #define PLD(code...) #endif -#define MODE_USR USR_MODE -#define MODE_FIQ FIQ_MODE -#define MODE_IRQ IRQ_MODE -#define MODE_SVC SVC_MODE - -#define DEFAULT_FIQ MODE_FIQ - -/* - * LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc}) - */ -#ifdef __STDC__ -#define LOADREGS(cond, base, reglist...)\ - ldm##cond base,reglist -#else -#define LOADREGS(cond, base, reglist...)\ - ldm/**/cond base,reglist -#endif - -/* - * Build a return instruction for this processor type. - */ -#define RETINSTR(instr, regs...)\ - instr regs - /* * Enable and disable interrupts */ @@ -117,18 +93,6 @@ msr cpsr_c, \oldcpsr .endm -/* - * These two are used to save LR/restore PC over a user-based access. - * The old 26-bit architecture requires that we do. On 32-bit - * architecture, we can safely ignore this requirement. - */ - .macro save_lr - .endm - - .macro restore_pc - mov pc, lr - .endm - #define USER(x...) \ 9999: x; \ .section __ex_table,"a"; \ |