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Diffstat (limited to 'arch/arm/mach-omap2/clock44xx_data.c')
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c42
1 files changed, 21 insertions, 21 deletions
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index f06eedd..b95bd2e 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -334,7 +334,7 @@ static struct clk dpll_abe_m2x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE,
.clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -405,7 +405,7 @@ static struct clk dpll_abe_m3x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M3_DPLL_ABE,
.clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -480,7 +480,7 @@ static struct clk dpll_core_m6x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M6_DPLL_CORE,
.clksel_mask = OMAP4430_HSDIVIDER_CLKOUT3_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -512,7 +512,7 @@ static struct clk dpll_core_m2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_CORE,
.clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap4_core_dpll_m2_set_rate,
@@ -534,7 +534,7 @@ static struct clk dpll_core_m5x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M5_DPLL_CORE,
.clksel_mask = OMAP4430_HSDIVIDER_CLKOUT2_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -613,7 +613,7 @@ static struct clk dpll_core_m4x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M4_DPLL_CORE,
.clksel_mask = OMAP4430_HSDIVIDER_CLKOUT1_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -640,7 +640,7 @@ static struct clk dpll_abe_m2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE,
.clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -655,7 +655,7 @@ static struct clk dpll_core_m3x2_ck = {
.ops = &clkops_omap4_dflt_wait,
.enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE,
.enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -668,7 +668,7 @@ static struct clk dpll_core_m7x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M7_DPLL_CORE,
.clksel_mask = OMAP4430_HSDIVIDER_CLKOUT4_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -745,7 +745,7 @@ static struct clk dpll_iva_m4x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M4_DPLL_IVA,
.clksel_mask = OMAP4430_HSDIVIDER_CLKOUT1_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -758,7 +758,7 @@ static struct clk dpll_iva_m5x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M5_DPLL_IVA,
.clksel_mask = OMAP4430_HSDIVIDER_CLKOUT2_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -808,7 +808,7 @@ static struct clk dpll_mpu_m2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_MPU,
.clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -894,7 +894,7 @@ static struct clk dpll_per_m2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER,
.clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -922,7 +922,7 @@ static struct clk dpll_per_m2x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER,
.clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -937,7 +937,7 @@ static struct clk dpll_per_m3x2_ck = {
.ops = &clkops_omap4_dflt_wait,
.enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER,
.enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -950,7 +950,7 @@ static struct clk dpll_per_m4x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M4_DPLL_PER,
.clksel_mask = OMAP4430_HSDIVIDER_CLKOUT1_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -963,7 +963,7 @@ static struct clk dpll_per_m5x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M5_DPLL_PER,
.clksel_mask = OMAP4430_HSDIVIDER_CLKOUT2_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -976,7 +976,7 @@ static struct clk dpll_per_m6x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M6_DPLL_PER,
.clksel_mask = OMAP4430_HSDIVIDER_CLKOUT3_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -989,7 +989,7 @@ static struct clk dpll_per_m7x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M7_DPLL_PER,
.clksel_mask = OMAP4430_HSDIVIDER_CLKOUT4_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -1049,7 +1049,7 @@ static struct clk dpll_unipro_m2x2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO,
.clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
@@ -1127,7 +1127,7 @@ static struct clk dpll_usb_m2_ck = {
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_USB,
.clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_0_6_MASK,
.ops = &clkops_omap4_dpllmx_ops,
- .recalc = &omap2_clksel_recalc,
+ .recalc = &omap3_clkout_mn_recalc,
.speculate = &omap2_clksel_speculate,
.round_rate = &omap2_clksel_round_rate,
.set_rate = &omap2_clksel_set_rate,
generated by cgit v1.1 at 2025-08-15 03:05:57 +0000