diff options
Diffstat (limited to 'include/asm-mips')
| -rw-r--r-- | include/asm-mips/cacheops.h | 4 | ||||
| -rw-r--r-- | include/asm-mips/cpu.h | 7 | ||||
| -rw-r--r-- | include/asm-mips/module.h | 2 |
3 files changed, 12 insertions, 1 deletions
diff --git a/include/asm-mips/cacheops.h b/include/asm-mips/cacheops.h index c4a1ec3..df7f2de 100644 --- a/include/asm-mips/cacheops.h +++ b/include/asm-mips/cacheops.h @@ -20,7 +20,11 @@ #define Index_Load_Tag_D 0x05 #define Index_Store_Tag_I 0x08 #define Index_Store_Tag_D 0x09 +#if defined(CONFIG_CPU_LOONGSON2) +#define Hit_Invalidate_I 0x00 +#else #define Hit_Invalidate_I 0x10 +#endif #define Hit_Invalidate_D 0x11 #define Hit_Writeback_Inv_D 0x15 diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index 49c1f00..a362395 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h @@ -89,6 +89,8 @@ #define PRID_IMP_34K 0x9500 #define PRID_IMP_24KE 0x9600 #define PRID_IMP_74K 0x9700 +#define PRID_IMP_LOONGSON1 0x4200 +#define PRID_IMP_LOONGSON2 0x6300 /* * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE @@ -211,7 +213,10 @@ #define CPU_SB1A 62 #define CPU_74K 63 #define CPU_R14000 64 -#define CPU_LAST 64 +#define CPU_LOONGSON1 65 +#define CPU_LOONGSON2 66 + +#define CPU_LAST 66 /* * ISA Level encodings diff --git a/include/asm-mips/module.h b/include/asm-mips/module.h index c5ef324..de6d09e 100644 --- a/include/asm-mips/module.h +++ b/include/asm-mips/module.h @@ -112,6 +112,8 @@ search_module_dbetables(unsigned long addr) #define MODULE_PROC_FAMILY "RM9000 " #elif defined CONFIG_CPU_SB1 #define MODULE_PROC_FAMILY "SB1 " +#elif defined CONFIG_CPU_LOONGSON2 +#define MODULE_PROC_FAMILY "LOONGSON2 " #else #error MODULE_PROC_FAMILY undefined for your processor configuration #endif |