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| * davinci: add power management supportSekhar Nori2010-02-045-0/+438
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds core power management (suspend-to-RAM) support for DaVinci SoCs. The code depends on the the "deepsleep" feature to suspend the SoC and saves power by gating the input clock. The wakeup can be based on an external event as supported by the SoC. Assembly code (in sleep.S) is added to aid gating DDR2 clocks. Code doing this work should not be accessing DDR2. The assembly code is relocated to SRAM by the code in pm.c The support has been validated on DA850/OMAP-L138 only though the code is (hopefully) generic enough that other SoCs supporting deepsleep feature simply requires SoC specific code to start using this driver. Note that all the device drivers don't support suspend/resume still and are being worked on. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * DaVinci: DM365: Changing default queue for DM365.Sandeep Paulraj2010-02-041-1/+1
| | | | | | | | | | | | | | | | | | In DM365 Q0, Q1 and Q2 are used by codecs. LSP drivers should use Q3. This patch changes the default queue for DM365. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: clock: Check CLK_PSC flag before disabling PSCChaithrika U S2010-02-041-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Some modules do not have PSC to control their clocks. The 'lpsc' field in the clk structure is 0 for such clocks. In the clock disable function check for CLK PSC flag before disabling the PSC. If this is not taken care of then it may so happen that module controlled by LPSC 0 is erroneously disabled. Signed-off-by: Chaithrika U S <chaithrika@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * TI Davinci EMAC : Abstract Buffer address translation logic.Sriramakrishnan2010-02-042-17/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | When programming the DMA engine, the next pointers must be programmed with physical address as seen from the DMA master address space. This address may be different from physical address of the buffer RAM area. This patch abstracts the buffer address translation logic. Signed-off-by: Sriramakrishnan <srk@ti.com> Acked-by: Chaithrika U S <chaithrika@ti.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * TI Davinci EMAC : add platform specific interrupt enable/disable logic.Sriramakrishnan2010-02-042-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | On certain SOCs, the EMAC controller is interfaced with a wrapper logic for handling interrupts. This patch implements a platform specific hook to cater to platforms that require custom interrupt handling logic Signed-off-by: Sriramakrishnan <srk@ti.com> Acked-by: Chaithrika U S <chaithrika@ti.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * TI Davinci EMAC : Re-use driver for other platforms.Sriramakrishnan2010-02-048-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | The davinci EMAC peripheral is also available on other TI platforms -notably TI AM3517 SoC. This patch modifies the config option and the platform structure header files so that the driver can be reused on non-davinci platforms as well. Signed-off-by: Sriramakrishnan <srk@ti.com> Acked-by: Chaithrika U S <chaithrika@ti.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: da850/omap-l138: Enable 4-bit eccSudhakar Rajashekhara2010-02-041-0/+1
| | | | | | | | | | | | | | | | This patch initializes the platform data to enable 4-bit ecc support on DA850/OMAP-L138. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: da850/omap-l138: Modify NOR partition infoSudhakar Rajashekhara2010-02-041-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | On DA850/OMAP-L138, NOR flash partition was starting from offset ZERO erasing the UBL and u-boot when the complete NOR is erased. This patch moves the start of the partition to 512K, after the bootloaders and u-boot env variables. This patch also creates a new partition on NOR Flash to store Linux kernel image. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: move /proc/davinci_clocks to debugfsSekhar Nori2010-02-041-31/+11
| | | | | | | | | | | | | | | | | | | | | | Move /proc/davinci_clocks to /sys/kernel/debug/davinci_clocks (debugfs). debugfs is more suited for this since the clock dump is debug information. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: make /proc/davinci_clocks display multi-rooted clock treeSekhar Nori2010-02-041-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | This patch modifies clock dump to take care of clock tress rooted at multiple oscillators. Current code assumes the entire tree is rooted on a single oscillator. When using off-chip clock synthesizers, some of the clocks can be obtained from a different on-board oscillator. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: add support for DM6467T EVMSekhar Nori2010-02-044-2/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DM6467T (T for Turbo) is a newer and faster DM6467 part from TI. The new part supports 1080p video and has the ARM running at 495MHz. More SoC information: http://focus.ti.com/docs/prod/folders/print/tms320dm6467t.html Spectrum Digital, Inc has a new EVM for this part. It is _mostly_ same as the older DM6467 EVM except for a 33MHz crystal input and THS8200 video encoder for 1080p support. The meat of this patch is dedicated to initializing the crystal frequency from EVM board file. Additional notes: I did consider some alternative ways to make the crystal input board specific including - (1) having board code initialize the crystal frequency using the first member of soc_info->cpu_clks array (2) introducing a new ref_clk_rate member in soc_info structure. But, the current way seems to be the simplest and least intruding considering that both the clock array and SoC info structure are actually private to the SoC file. Also the fact that davinci_common_init() initializes both the soc_info and clocks in one go. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: board-dm646x-evm.c: arrange related code togetherSekhar Nori2010-02-041-45/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently all the #defines and static variables in the board-dm646x-evm.c file are located right at the start of the file because of which the related code is not together - making reading the code difficult. This patch moves around the code keeping related code together. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: explain CLOCK_TICK_RATE of 27MHz in include/mach/timex.hSekhar Nori2010-02-041-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | Leave a comment explaining the constant value of 27Mhz used in include/mach/timex.h for all DaVinci platforms. Many of the platforms actually run at 24MHz timer frequency (Eg. EVMs of DM355, DM365 and OMAP-L1). The comment also serves as a porting alert. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: da850/omap-l138: create static map for SRAMSekhar Nori2010-02-042-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Create static map for internal SRAM and populate SRAM base and size in soc_info structure to allow SRAM allocation functions from arch/arm/mach-davinci/sram.c to work. On DA850 SRAM is used for suspend-to-RAM implementation in places where DDR2 cannot be accessed as its clocks are stopped. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: da850/omap-l138: unlock PLL registers during initSekhar Nori2010-02-041-6/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On omap-l1 devices the PLL registers can be locked from writes. Currently the cpufreq rate setting code unlocks PLL0 before the write actually happens. With suspend support getting added PLL1 registers need be be unlocked as well. To facilitate this, unlock both PLLs during the init time itself. This also obviates the need to unlock PLL registers for each CPUFreq transtition. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: cpuidle: move mapping of DDR2 controller registers out of driverSekhar Nori2010-02-044-30/+21
| | | | | | | | | | | | | | | | | | | | | | When suspend is supported, both cpuidle and suspend code need to work on DDR2 registers. Instead of mapping the DDR2 registers twice, do it once outside of cpuidle driver and let cpuidle driver get the virtual base address of DDR2 registers. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: make it possible to include clock.h and psc.h in assembly codeSekhar Nori2010-02-042-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | psc.h contains register defines for PSC module which need to be accessed in assembly code which helps the DA850/OMAP-L138 SoC go to sleep. Shutting down DDR clock using PSC is a part of the sleep procedure. Also, the PLL related hardware definitions in clock.h are needed in assembly code to bypass the DDR2 PLL. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: move PSC register definitions from psc.c to psc.hSekhar Nori2010-02-042-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The motivation behind the change is to use the same definitions in the assembly code responsible for suspending the SoC, a part of which is to clock gate the DDR2 clock. Note that the assembly code cannot invoke the C function meant for this. The main reason being that stack in DDR2 cannot be accessed while DDR2 clock is being clock gated. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: move DDR2 controller defines to memory.hSekhar Nori2010-02-042-4/+5
| | | | | | | | | | | | | | | | | | | | | | Move defintions of DDR2 controller registers to memory.h from cpuidle.c. The motivation behind the change is to be able to use these defintions in assembly code that puts DDR2 in self-refresh and enables the SoC to enter suspend state. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: move PLL wait time values to clock.hSekhar Nori2010-02-042-12/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | As suspend support is added, the code supporting the suspend operation needs to bypass PLLs and needs to access the same wait time values as the PLL code in clock.c. To facilitate this, move the PLL wait times to clock.h where they can be accessed by suspend code. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * davinci: da8xx/omapl1: add support for the second sysconfig moduleSekhar Nori2010-02-046-19/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | OMAP-L138 adds a second SYSCFG region having useful functionality like deep sleep, pull up/down control and SATA clock stop. This patch makes provision for accessing registers from second SYSCFG region in da8xx code. Note that OMAP-L137 has a single SYSCFG region. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * DaVinci - Adding platform & board changes for vpfe capture on DM365Murali Karicheri2010-02-043-1/+174
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds following changes:- 1) add sub device configuration data for TVP5146 used by vpfe capture 2) registers platform devices for vpfe_capture, isif and vpss 3) defines hardware resources for the devices listed under 2) 4) defines clock aliase for isif driver 5) adding setup_pinmux() for isif Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | Merge branch 'upstream-linus' of ↵Linus Torvalds2010-03-0148-417/+663
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev * 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: (38 commits) sata_via: Delay on vt6420 when starting ATAPI DMA write ata: Detect Delkin Devices compact flash pata_efar: Enable parallel scanning pata_atiixp: enable parallel scan [libata] pata_atiixp: add locking for parallel scanning [libata] pata_efar: add locking for parallel scanning libata: Pass host flags into the pci helper [libata] pata_marvell: CONFIG_AHCI is really CONFIG_SATA_AHCI libata: Allow pata_legacy to be built on non-ISA but PCI systems pata_pdc202xx_old: fix UDMA mode for PDC2026x chipsets pata_pdc202xx_old: fix UDMA mode for Promise UDMA33 cards [libata] pata_at91: fix backslash-continued string pata_via: store UDMA masks in via_isa_bridges table pata_via: fix address setup timings underlocking pata_serverworks: fix error message pata_serverworks: fix PIO setup for the second channel pata_efar: fix secondary port support pata_cypress: fix PIO timings underclocking pata_cs5535: use correct values for PIO1 and PIO2 data timings pata_cmd64x: remove unused definitions ...
| * | sata_via: Delay on vt6420 when starting ATAPI DMA writeBart Hartgers2010-03-011-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When writing a disc on certain lite-on dvd-writers (also rebadged as optiarc/LG/...) connected to a vt6420, the ATAPI CDB ends up in the datastream and on the disc, causing silent corruption. Delaying between sending the CDB and starting DMA seems to prevent this. I do not know if there are burners that do not suffer from this, but the patch should be safe for those as well. There are many reports of this issue, but AFAICT no solution was found before. For example: http://lkml.indiana.edu/hypermail/linux/kernel/0802.3/0561.html Signed-off-by: Bart Hartgers <bart.hartgers@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | ata: Detect Delkin Devices compact flashBen Gardner2010-03-011-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I have a Delkin Devices compact flash card that isn't being recognized using the SATA/PATA drivers. The card is recognized and works with the deprecated ATA drivers. The error I am seeing is: ata1.00: failed to IDENTIFY (device reports invalid type, err_mask=0x0) I tracked it down to ata_id_is_cfa() in include/linux/ata.h. The Delkin card has id[0] set to 0x844a and id[83] set to 0. This isn't what the kernel expects and is probably incorrect. The simplest work-around is to add a check for 0x844a to ata_id_is_cfa(). Signed-off-by: Ben Gardner <gardner.ben@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_efar: Enable parallel scanningAlan Cox2010-03-011-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Again originally proposed by Bartlomiej but this does it by using the generic helper logic instead. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_atiixp: enable parallel scanAlan Cox2010-03-011-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was originally proposed by Bartlomiej but as a device specific expansion of the init_one function rather than making the helper more generic. Enable the parallel scan via the generic flags. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | [libata] pata_atiixp: add locking for parallel scanningBartlomiej Zolnierkiewicz2010-03-011-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is similar change as commit 60c3be3 for ata_piix host driver and while pata_atiixp doesn't enable parallel scan yet the race could probably also be triggered by requesting re-scanning of both ports at the same time using SCSI sysfs interface. [Ported to current tree without other patch dependancies by Alan Cox] Original is Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> This one is Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | [libata] pata_efar: add locking for parallel scanningBartlomiej Zolnierkiewicz2010-03-011-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clearing of UDMA enable bit also for PIO modes and then add extra locking for parallel scanning. This is similar change as commit 60c3be3 for ata_piix host driver and while pata_efar doesn't enable parallel scan yet the race could probably also be triggered by requesting re-scanning of both ports at the same time using SCSI sysfs interface. [Ported to current kernel without other patch dependancies by Alan Cox] Original is Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> This one is Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | libata: Pass host flags into the pci helperAlan Cox2010-03-0140-42/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows parallel scan and the like to be set without having to stop using the existing full helper functions. This patch merely adds the argument and fixes up the callers. It doesn't undo the special cases already in the tree or add any new parallel callers. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | [libata] pata_marvell: CONFIG_AHCI is really CONFIG_SATA_AHCIChristoph Egger2010-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The marvell driver comtains a fallback to ahci for the sata ports which is incorrectly checked as CONFIG_AHCI while the only AHCI config item is actually called SATA_AHCI (which also sounds sensible considering it's a fallback for the sata ports). Signed-off-by: Christoph Egger <siccegge@stud.informatik.uni-erlangen.de> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | libata: Allow pata_legacy to be built on non-ISA but PCI systemsAlan Cox2010-03-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is needed for some unsupported hardware setups on strange 64bit mainboards where crazy stuff has been done like putting flash ata adapters on the LPC bus, or where the real hardware is hidden/confused. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_pdc202xx_old: fix UDMA mode for PDC2026x chipsetsBartlomiej Zolnierkiewicz2010-03-011-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PDC2026x chipsets need the same treatment as PDC20246 one. This is completely untested but will hopefully fix UDMA issues that people have been reporting against pata_pdc202xx_old for the last couple of years. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_pdc202xx_old: fix UDMA mode for Promise UDMA33 cardsBartlomiej Zolnierkiewicz2010-03-011-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Monday 04 January 2010 02:30:24 pm Russell King wrote: > Found the problem - getting rid of the read of the alt status register > after the command has been written fixes the UDMA CRC errors on write: > > @@ -676,7 +676,8 @@ void ata_sff_exec_command(struct ata_port *ap, const struct > ata_taskfile *tf) > DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command); > > iowrite8(tf->command, ap->ioaddr.command_addr); > - ata_sff_pause(ap); > + ndelay(400); > +// ata_sff_pause(ap); > } > EXPORT_SYMBOL_GPL(ata_sff_exec_command); > > > This rather makes sense. The PDC20247 handles the UDMA part of the > protocol. It has no way to tell the PDC20246 to wait while it suspends > UDMA, so that a normal register access can take place - the 246 ploughs > on with the register access without any regard to the state of the 247. > > If the drive immediately starts the UDMA protocol after a write to the > command register (as it probably will for the DMA WRITE command), then > we'll be accessing the taskfile in the middle of the UDMA setup, which > can't be good. It's certainly a violation of the ATA specs. Fix it by adding custom ->sff_exec_command method for UDMA33 chipsets. Debugged-by: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | [libata] pata_at91: fix backslash-continued stringJeff Garzik2010-03-011-2/+2
| | | | | | | | | | | | | | | | | | Noticed and rough patch by Joe Perches. Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_via: store UDMA masks in via_isa_bridges tableBartlomiej Zolnierkiewicz2010-03-011-110/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * store UDMA masks in via_isa_bridges[] and while at it make "flags" field to be u8 instead of u16 * convert the driver to use UDMA masks from via_isa_bridges[] * remove no longer needed VIA_UDMA* defines Make some minor documentation and CodingStyle fixes while at it. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_via: fix address setup timings underlockingBartlomiej Zolnierkiewicz2010-03-011-2/+2
| | | | | | | | | | | | | | | | | | | | | Correct via_do_set_mode() documentation while at it. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_serverworks: fix error messageBartlomiej Zolnierkiewicz2010-03-011-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_serverworks: fix PIO setup for the second channelBartlomiej Zolnierkiewicz2010-03-011-1/+2
| | | | | | | | | | | | | | | Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_efar: fix secondary port supportBartlomiej Zolnierkiewicz2010-03-011-2/+2
| | | | | | | | | | | | | | | Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_cypress: fix PIO timings underclockingBartlomiej Zolnierkiewicz2010-03-011-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | Timing registers should be programmed with the desired number of clocks minus one clock. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_cs5535: use correct values for PIO1 and PIO2 data timingsBartlomiej Zolnierkiewicz2010-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | There shouldn't be any problems with it as IDE cs5535 host driver has been using those values for years and they match values given in the (publicly available) datasheet. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_cmd64x: remove unused definitionsBartlomiej Zolnierkiewicz2010-03-011-11/+1
| | | | | | | | | | | | | | | | | | | | | s/ARTIM2/ARTTIM23/ in cmd648_bmdma_stop() while at it Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_cmd64x: cmd648_bmdma_stop() fixBartlomiej Zolnierkiewicz2010-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Clear the primary channel pending interrupt bit instead of the reserved one. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_cmd64x: fix handling of address setup timingsBartlomiej Zolnierkiewicz2010-03-011-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Account for the requirements of the DMA mode currently used by the pair device. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_cmd64x: fix PIO setupBartlomiej Zolnierkiewicz2010-03-011-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix incorrect handling of recovery clocks value == 16 resulting in overclocked recovery timings & potentially underclocked active timings. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | pata_ali: documentation fixesBartlomiej Zolnierkiewicz2010-03-011-5/+3
| | | | | | | | | | | | | | | Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | libata: fix CFA handling in ide_timing_compute()Bartlomiej Zolnierkiewicz2010-03-011-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use standard cycle timing for CFA PIO5 and PIO6 modes. Based on commit 74638c8 for IDE subsystem. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | sata_via: Correctly setup PIO/DMA for pata slave on vt6421.Bart Hartgers2010-03-011-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before only the timings for master were set. Datasheet can be found here: ftp://ftp.vtbridge.org/Docs/Storage/DS_VT6421A_100_CCPL.PDF Surprisingly, a slave drive works without this patch. According to the datasheet, the controller by default derives the DMA mode from the Set Features command issued to a drive. Not sure about the PIO timings, though. The real problem is that the timings for the master effectively are the ones tuned for the slave. If these support different UDMA-settings, there is trouble, especially when the slave supports a higher UDMA than the master. Anyhow, using the same mechanism for both master and slave seems like a good idea. Signed-off-by: Bart Hartgers <bart.hartgers@gmail.com> Acked-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | libata: make functions/variables staticRobert Hancock2010-03-012-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | Make some variables in ahci and a function in pata_pcmcia static, as found using sparse. Signed-off-by: Robert Hancock <hancockrwd@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
generated by cgit v1.1 at 2025-03-24 07:26:36 +0000