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* KVM: Add kvm_read_guest_atomic()Marcelo Tosatti2008-01-303-12/+38
| | | | | | | | In preparation for a mmu spinlock, add kvm_read_guest_atomic() and use it in fetch() and prefetch_page(). Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Concurrent guest walkersMarcelo Tosatti2008-01-305-71/+117
| | | | | | | | | | | | | | | | | | Do not hold kvm->lock mutex across the entire pagefault code, only acquire it in places where it is necessary, such as mmu hash list, active list, rmap and parent pte handling. Allow concurrent guest walkers by switching walk_addr() to use mmap_sem in read-mode. And get rid of the lockless __gfn_to_page. [avi: move kvm_mmu_pte_write() locking inside the function] [avi: add locking for real mode] [avi: fix cmpxchg locking] Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Disable vapic support on Intel machines with FlexPriorityAvi Kivity2008-01-304-2/+12
| | | | | | FlexPriority accelerates the tpr without any patching. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Accelerated apic supportAvi Kivity2008-01-305-1/+120
| | | | | | | | | This adds a mechanism for exposing the virtual apic tpr to the guest, and a protocol for letting the guest update the tpr without causing a vmexit if conditions allow (e.g. there is no interrupt pending with a higher priority than the new tpr). Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: local APIC TPR access reporting facilityAvi Kivity2008-01-305-1/+65
| | | | | | | | Add a facility to report on accesses to the local apic tpr even if the local apic is emulated in the kernel. This is basically a hack that allows userspace to patch Windows which tends to bang on the tpr a lot. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Print data for unimplemented wrmsrAvi Kivity2008-01-301-1/+1
| | | | | | | This can help diagnosing what the guest is trying to do. In many cases we can get away with partial emulation of msrs. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Add cache miss statisticAvi Kivity2008-01-303-0/+3
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Coalesce remote tlb flushesEddie Dong2008-01-301-2/+6
| | | | | | | | Host side TLB flush can be merged together if multiple spte need to be write-protected. Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Expose ioapic to ia64 save/restore APIsZhang Xiantao2008-01-301-0/+2
| | | | | | | IA64 also needs to see ioapic structure in irqchip. Signed-off-by: xiantao.zhang@intel.com <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Move kvm_vcpu_kick() to x86.cZhang Xiantao2008-01-304-22/+21
| | | | | | | | Moving kvm_vcpu_kick() to x86.c. Since it should be common for all archs, put its declarations in <linux/kvm_host.h> Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Move ioapic code to common directory.Zhang Xiantao2008-01-303-5/+4
| | | | | | | Move ioapic code to common, since IA64 also needs it. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Move irqchip declarations into new ioapic.h and lapic.hZhang Xiantao2008-01-304-111/+148
| | | | | | | This allows reuse of ioapic in ia64. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Move drivers/kvm/* to virt/kvm/Avi Kivity2008-01-303-2/+2
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Move arch dependent files to new directory arch/x86/kvm/Avi Kivity2008-01-3028-41/+35
| | | | | | | This paves the way for multiple architecture support. Note that while ioapic.c could potentially be shared with ia64, it is also moved. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Add printk_ratelimit in vmx_intr_assistRyan Harper2008-01-301-1/+2
| | | | | | | | | Add printk_ratelimit check in front of printk. This prevents spamming of the message during 32-bit ubuntu 6.06server install. Previously, it would hang during the partition formatting stage. Signed-off-by: Ryan Harper <ryanh@us.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Portability: Move kvm_vm_stat to x86.hZhang Xiantao2008-01-302-10/+10
| | | | | | | | | This patch moves kvm_vm_stat to x86.h, and every arch can define its own kvm_vm_stat in $arch.h Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Acked-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Portability: Move round_robin_prev_vcpu and tss_addr to kvm_archZhang Xiantao2008-01-304-11/+12
| | | | | | | | This patches moves two fields round_robin_prev_vcpu and tss to kvm_arch. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Acked-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Portability: move vpic and vioapic to kvm_archZhang Xiantao2008-01-305-13/+13
| | | | | | | | This patches moves two fields vpid and vioapic to kvm_arch Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Acked-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Portability: Move mmu-related fields to kvm_archZhang Xiantao2008-01-305-41/+44
| | | | | | | | This patches moves mmu-related fields to kvm_arch. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Acked-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Portability: Move memslot aliases to new struct kvm_archZhang Xiantao2008-01-303-14/+19
| | | | | | | | | This patches create kvm_arch to hold arch-specific kvm fileds and moves fields naliases and aliases to kvm_arch. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Acked-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Portability: Move kvm_vcpu_stat to x86.hZhang Xiantao2008-01-302-22/+21
| | | | | | | | | This patches moves kvm_vcpu_stat to x86.h, so every arch can define its own kvm_vcpu_stat structure. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Acked-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Portability: Expand the KVM_VCPU_COMM in kvm_vcpu structure.Zhang Xiantao2008-01-301-31/+22
| | | | | | | | | This patches removes KVM_COMM macro, original it is hold kvm_vcpu common fields. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Acked-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Portability: Move kvm_vcpu definition back to kvm.hZhang Xiantao2008-01-304-113/+117
| | | | | | | | | This patches moves kvm_vcpu definition to kvm.h, and finally kvm.h includes x86.h. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Acked-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Portability: Split mmu-related static inline functions to mmu.hZhang Xiantao2008-01-307-44/+55
| | | | | | | | | Since these functions need to know the details of kvm or kvm_vcpu structure, it can't be put in x86.h. Create mmu.h to hold them. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Acked-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Portability: Introduce kvm_vcpu_archZhang Xiantao2008-01-3010-581/+586
| | | | | | | | | Move all the architecture-specific fields in kvm_vcpu into a new struct kvm_vcpu_arch. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Acked-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Portability: Move kvm{pic,ioapic} accesors to x86 specific codeZhang Xiantao2008-01-303-18/+19
| | | | | Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: emulated cmpxchg8b should be atomic on i386Marcelo Tosatti2008-01-301-0/+26
| | | | | | | | | | Emulate cmpxchg8b atomically on i386. This is required to avoid a guest pte walker from seeing a splitted write. [avi: make it compile] Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: SVM: support writing 0 to K8 performance counter control registersJoerg Roedel2008-01-301-0/+13
| | | | | | | | | | | | | This lets SVM ignore writes of the value 0 to the performance counter control registers. Thus enabling them will still fail in the guest, but a write of 0 which keeps them disabled is accepted. This is required to boot Windows Vista 64bit. [avi: avoid fall-thru in switch statement] Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Markus Rechberger <markus.rechberger@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: LAPIC: minor debugging compile fixJoerg Roedel2008-01-301-1/+1
| | | | | | | | This patch fixes a compile error of the LAPIC code with APIC debugging enabled. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Markus Rechberger <markus.rechberger@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Fix SMP shadow instantiation raceMarcelo Tosatti2008-01-302-12/+29
| | | | | | | | | | | There is a race where VCPU0 is shadowing a pagetable entry while VCPU1 is updating it, which results in a stale shadow copy. Fix that by comparing the contents of the cached guest pte with the current guest pte after write-protecting the guest pagetable. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: SVM: Exit to userspace if write to cr8 and not using in-kernel apicJoerg Roedel2008-01-301-1/+10
| | | | | | | | | With this patch KVM on SVM will exit to userspace if the guest writes to CR8 and the in-kernel APIC is disabled. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Markus Rechberger <markus.rechberger@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Use mmu_set_spte() for real-mode shadowsAvi Kivity2008-01-301-31/+10
| | | | | | | | | | In addition to removing some duplicated code, this also handles the unlikely case of real-mode code updating a guest page table. This can happen when one vcpu (in real mode) touches a second vcpu's (in protected mode) page tables, or if a vcpu switches to real mode, touches page tables, and switches back. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Adjust mmu_set_spte() debug code for gpte removalAvi Kivity2008-01-301-2/+2
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Move set_pte() into guest paging mode independent codeAvi Kivity2008-01-302-88/+88
| | | | | | | | As set_pte() no longer references either a gpte or the guest walker, we can move it out of paging mode dependent code (which compiles twice and is generally nasty). Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Remove walker argument to set_pte()Avi Kivity2008-01-301-4/+3
| | | | | | Unused. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Pass pte dirty flag to set_pte() instead of calculating it on-siteAvi Kivity2008-01-301-10/+7
| | | | | | This allows us to remove its dependency on pt_element_t. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: No need to pick up nx bit from guest pteAvi Kivity2008-01-301-1/+0
| | | | | | We already set it according to cumulative access permissions. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Fix inherited permissions for emulated guest pte updatesAvi Kivity2008-01-303-5/+7
| | | | | | | | When we emulate a guest pte write, we fail to apply the correct inherited permissions from the parent ptes. Now that we store inherited permissions in the shadow page, we can use that to update the pte permissions correctly. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Move pte access calculation into a helper functionAvi Kivity2008-01-301-7/+13
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Set nx bit correctly on shadow ptesAvi Kivity2008-01-301-0/+2
| | | | | | | | | | | | While the page table walker correctly generates a guest page fault if a guest tries to execute a non-executable page, the shadow code does not mark it non-executable. This means that if a guest accesses an nx page first with a read access, then subsequent code fetch accesses will succeed. Fix by setting the nx bit on shadow ptes. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Simplify calculation of pte accessAvi Kivity2008-01-302-29/+43
| | | | | | | | | | | The nx bit is awkwardly placed in the 63rd bit position; furthermore it has a reversed meaning compared to the other bits, which means we can't use a bitwise and to calculate compounded access masks. So, we simplify things by creating a new 3-bit exec/write/user access word, and doing all calculations in that. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: MMU: Use cmpxchg for pte updates on walk_addr()Marcelo Tosatti2008-01-301-2/+34
| | | | | | | | | | | | In preparation for multi-threaded guest pte walking, use cmpxchg() when updating guest pte's. This guarantees that the assignment of the dirty bit can't be lost if two CPU's are faulting the same address simultaneously. [avi: fix kunmap_atomic() parameters] Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: SVM: Trap access to the cr8 registerAvi Kivity2008-01-302-2/+7
| | | | | | | Later we may be able to use the virtual tpr feature, but for now, just trap it. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: Fix stack instructions on 64-bit modeAvi Kivity2008-01-301-12/+15
| | | | | | | | | | | | Stack instructions are always 64-bit on 64-bit mode; many of the emulated stack instructions did not take that into account. Fix by adding a 'Stack' bitflag and setting the operand size appropriately during the decode stage (except for 'push r/m', which is in a group with a few other instructions, so it gets its own treatment). This fixes random crashes on Vista x64. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: SVM: Emulate read/write access to cr8Joerg Roedel2008-01-301-0/+5
| | | | | | | | | | This patch adds code to emulate the access to the cr8 register to the x86 instruction emulator in kvm. This is needed on svm, where there is no hardware decode for control register access. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Markus Rechberger <markus.rechberger@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: VMX: Avoid exit when setting cr8 if the local apic is in the kernelAvi Kivity2008-01-301-0/+2
| | | | | | | | | With apic in userspace, we must exit to userspace after a cr8 write in order to update the tpr. But if the apic is in the kernel, the exit is unnecessary. Noticed by Joerg Roedel. Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: x86 emulator: fix eflags preparation for emulationAvi Kivity2008-01-301-15/+15
| | | | | | | | | We prepare eflags for the emulated instruction, then clobber it with an 'andl'. Fix by popping eflags as the last thing in the sequence. Patch taken from Xen (16143:959b4b92b6bf) Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Use generalized exception queue for injecting #UDAvi Kivity2008-01-302-20/+3
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Replace #GP injection by the generalized exception queueAvi Kivity2008-01-305-59/+30
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
* KVM: Replace page fault injection by the generalized exception queueAvi Kivity2008-01-305-71/+19
| | | | Signed-off-by: Avi Kivity <avi@qumranet.com>
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