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author | Andy McFadden <fadden@android.com> | 2010-03-05 15:58:31 -0800 |
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committer | Andy McFadden <fadden@android.com> | 2010-03-15 16:41:42 -0700 |
commit | 9f013cac04b2b24101ee97b92944706140a81760 (patch) | |
tree | 653ee4a1e9debac968f487f83d87cda2fbf6cf06 | |
parent | abab857fb5c77a2f68f7ba6f6e721f177393b774 (diff) | |
download | libcore-9f013cac04b2b24101ee97b92944706140a81760.zip libcore-9f013cac04b2b24101ee97b92944706140a81760.tar.gz libcore-9f013cac04b2b24101ee97b92944706140a81760.tar.bz2 |
Make wide-volatile loads and stores atomic.
This implements the four wide-volatile instructions added in a previous
change, and modifies the verifier to substitute the opcodes into the
instruction stream when appropriate.
For mterp, the ARM wide get/put instructions now have conditional code
that replaces ldrd/strd with a call to the quasiatomic functions. The
C version does essentially the same thing. ARMv4T lacks ldrd/stdrd, and
uses separate implementations for the wide field accesses, so those were
updated as well. x86 will just use stubs.
The JIT should punt these to the interpreter.
Change-Id: Ife88559ed1a698c3267d43c454896f6b12081c0f
Also:
- We don't seem to be using the negative widths in the instruction
table. Not sure they're useful anymore.
- Tabs -> spaces in x86-atom throw-verification-error impl.
0 files changed, 0 insertions, 0 deletions