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| author | Andrew Hsieh <andrewhsieh@google.com> | 2013-11-11 16:01:46 +0800 |
|---|---|---|
| committer | Andrew Hsieh <andrewhsieh@google.com> | 2013-11-12 15:05:12 +0800 |
| commit | 7b0de5ae35083554f258e68dcfb0c9ada702e70a (patch) | |
| tree | 6db6ed333d1275a724874c1f9d9d28d200397706 /9/platforms/android-16/arch-mips/usr/include/asm | |
| parent | e9808d310fa92e2aa27a9208fe59144a43a8d4b6 (diff) | |
| download | prebuilts_ndk-7b0de5ae35083554f258e68dcfb0c9ada702e70a.zip prebuilts_ndk-7b0de5ae35083554f258e68dcfb0c9ada702e70a.tar.gz prebuilts_ndk-7b0de5ae35083554f258e68dcfb0c9ada702e70a.tar.bz2 | |
Refresh prebuilts/ndk/9/platforms with r9b+, part 2/2
Part 2: add new API level 12, 13, 15, 16, 17 and 19
Change-Id: I305970f7766b3ed3e5faf2532952eaa03398fcbd
Diffstat (limited to '9/platforms/android-16/arch-mips/usr/include/asm')
158 files changed, 18883 insertions, 0 deletions
diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/a.out.h b/9/platforms/android-16/arch-mips/usr/include/asm/a.out.h new file mode 100644 index 0000000..33c075c --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/a.out.h @@ -0,0 +1,39 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_A_OUT_H +#define _ASM_A_OUT_H +struct exec +{ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long a_info; + unsigned a_text; + unsigned a_data; + unsigned a_bss; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned a_syms; + unsigned a_entry; + unsigned a_trsize; + unsigned a_drsize; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define N_TRSIZE(a) ((a).a_trsize) +#define N_DRSIZE(a) ((a).a_drsize) +#define N_SYMSIZE(a) ((a).a_syms) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/addrspace.h b/9/platforms/android-16/arch-mips/usr/include/asm/addrspace.h new file mode 100644 index 0000000..69abbd4 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/addrspace.h @@ -0,0 +1,93 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_ADDRSPACE_H +#define _ASM_ADDRSPACE_H +#include <spaces.h> +#ifdef __ASSEMBLY__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _ATYPE_ +#define _ATYPE32_ +#define _ATYPE64_ +#define _CONST64_(x) x +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#else +#define _ATYPE_ __PTRDIFF_TYPE__ +#define _ATYPE32_ int +#define _ATYPE64_ __s64 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _CONST64_(x) x ## LL +#endif +#ifdef __ASSEMBLY__ +#define _ACAST32_ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _ACAST64_ +#else +#define _ACAST32_ (_ATYPE_)(_ATYPE32_) +#define _ACAST64_ (_ATYPE64_) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define KSEGX(a) ((_ACAST32_ (a)) & 0xe0000000) +#define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff) +#define XPHYSADDR(a) ((_ACAST64_(a)) & _CONST64_(0x000000ffffffffff)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) +#define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) +#define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) +#define CKSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) +#define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) +#define KSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) +#define KSEG3ADDR(a) (CPHYSADDR(a) | KSEG3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KUSEG 0x00000000 +#define KSEG0 0x80000000 +#define KSEG1 0xa0000000 +#define KSEG2 0xc0000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KSEG3 0xe0000000 +#define CKUSEG 0x00000000 +#define CKSEG0 0x80000000 +#define CKSEG1 0xa0000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CKSEG2 0xc0000000 +#define CKSEG3 0xe0000000 +#define K_CALG_COH_EXCL1_NOL2 0 +#define K_CALG_COH_SHRL1_NOL2 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_CALG_UNCACHED 2 +#define K_CALG_NONCOHERENT 3 +#define K_CALG_COH_EXCL 4 +#define K_CALG_COH_SHAREABLE 5 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_CALG_NOTUSED 6 +#define K_CALG_UNCACHED_ACCEL 7 +#define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p)) +#define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) +#define PHYS_TO_XKPHYS(cm, a) (_CONST64_(0x8000000000000000) | (_CONST64_(cm) << 59) | (a)) +#define TO_PHYS_MASK _CONST64_(0x07ffffffffffffff) +#define COMPAT_K1BASE32 _CONST64_(0xffffffffa0000000) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PHYS_TO_COMPATK1(x) ((x) | COMPAT_K1BASE32) +#define KDM_TO_PHYS(x) (_ACAST64_ (x) & TO_PHYS_MASK) +#define PHYS_TO_K0(x) (_ACAST64_ (x) | CAC_BASE) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/asm.h b/9/platforms/android-16/arch-mips/usr/include/asm/asm.h new file mode 100644 index 0000000..dd80aef --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/asm.h @@ -0,0 +1,263 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_ASM_H +#define __ASM_ASM_H +#include <asm/sgidefs.h> +#ifndef CAT +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifdef __STDC__ +#define __CAT(str1, str2) str1##str2 +#else +#define __CAT(str1, str2) str1 str2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define CAT(str1, str2) __CAT(str1, str2) +#endif +#ifdef __PIC__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CPRESTORE(register) .cprestore register +#define CPADD(register) .cpadd register +#define CPLOAD(register) .cpload register +#else +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CPRESTORE(register) +#define CPADD(register) +#define CPLOAD(register) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LEAF(symbol) .globl symbol; .align 2; .type symbol, @function; .ent symbol, 0; symbol: .frame sp, 0, ra +#define NESTED(symbol, framesize, rpc) .globl symbol; .align 2; .type symbol, @function; .ent symbol, 0; symbol: .frame sp, framesize, rpc +#define END(function) .end function; .size function, .-function +#define EXPORT(symbol) .globl symbol; symbol: +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FEXPORT(symbol) .globl symbol; .type symbol, @function; symbol: +#define ABS(symbol,value) .globl symbol; symbol = value +#define PANIC(msg) .set push; .set reorder; PTR_LA a0, 8f; jal panic; 9: b 9b; .set pop; TEXT(msg) +#define PRINT(string) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TEXT(msg) .pushsection .data; 8: .asciiz msg; .popsection; +#define TTABLE(string) .pushsection .text; .word 1f; .popsection .pushsection .data; 1: .asciiz string; .popsection +#define PREF(hint, addr) +#define PREFX(hint, addr) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if _MIPS_ISA == _MIPS_ISA_MIPS1 +#define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: +#define MOVZ(rd, rs, rt) .set push; .set reorder; bnez rt, 9f; move rd, rs; .set pop; 9: +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if _MIPS_ISA == _MIPS_ISA_MIPS2 || _MIPS_ISA == _MIPS_ISA_MIPS3 +#define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; 9: +#define MOVZ(rd, rs, rt) .set push; .set noreorder; beqzl rt, 9f; move rd, rs; .set pop; 9: +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if _MIPS_ISA == _MIPS_ISA_MIPS4 || _MIPS_ISA == _MIPS_ISA_MIPS5 || _MIPS_ISA == _MIPS_ISA_MIPS32 || _MIPS_ISA == _MIPS_ISA_MIPS64 +#define MOVN(rd, rs, rt) movn rd, rs, rt +#define MOVZ(rd, rs, rt) movz rd, rs, rt +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if _MIPS_SIM == _MIPS_SIM_ABI32 +#define ALSZ 7 +#define ALMASK ~7 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if _MIPS_SIM == _MIPS_SIM_NABI32 || _MIPS_SIM == _MIPS_SIM_ABI64 +#define ALSZ 15 +#define ALMASK ~15 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifdef __mips64 +#define SZREG 8 +#else +#define SZREG 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#if _MIPS_SIM == _MIPS_SIM_ABI32 +#define REG_S sw +#define REG_L lw +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define REG_SUBU subu +#define REG_ADDU addu +#endif +#if _MIPS_SIM == _MIPS_SIM_NABI32 || _MIPS_SIM == _MIPS_SIM_ABI64 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define REG_S sd +#define REG_L ld +#define REG_SUBU dsubu +#define REG_ADDU daddu +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#if _MIPS_SZINT == 32 +#define INT_ADD add +#define INT_ADDU addu +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INT_ADDI addi +#define INT_ADDIU addiu +#define INT_SUB sub +#define INT_SUBU subu +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INT_L lw +#define INT_S sw +#define INT_SLL sll +#define INT_SLLV sllv +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INT_SRL srl +#define INT_SRLV srlv +#define INT_SRA sra +#define INT_SRAV srav +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#if _MIPS_SZINT == 64 +#define INT_ADD dadd +#define INT_ADDU daddu +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INT_ADDI daddi +#define INT_ADDIU daddiu +#define INT_SUB dsub +#define INT_SUBU dsubu +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INT_L ld +#define INT_S sd +#define INT_SLL dsll +#define INT_SLLV dsllv +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INT_SRL dsrl +#define INT_SRLV dsrlv +#define INT_SRA dsra +#define INT_SRAV dsrav +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#if _MIPS_SZLONG == 32 +#define LONG_ADD add +#define LONG_ADDU addu +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LONG_ADDI addi +#define LONG_ADDIU addiu +#define LONG_SUB sub +#define LONG_SUBU subu +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LONG_L lw +#define LONG_S sw +#define LONG_SLL sll +#define LONG_SLLV sllv +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LONG_SRL srl +#define LONG_SRLV srlv +#define LONG_SRA sra +#define LONG_SRAV srav +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LONG .word +#define LONGSIZE 4 +#define LONGMASK 3 +#define LONGLOG 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#if _MIPS_SZLONG == 64 +#define LONG_ADD dadd +#define LONG_ADDU daddu +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LONG_ADDI daddi +#define LONG_ADDIU daddiu +#define LONG_SUB dsub +#define LONG_SUBU dsubu +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LONG_L ld +#define LONG_S sd +#define LONG_SLL dsll +#define LONG_SLLV dsllv +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LONG_SRL dsrl +#define LONG_SRLV dsrlv +#define LONG_SRA dsra +#define LONG_SRAV dsrav +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LONG .dword +#define LONGSIZE 8 +#define LONGMASK 7 +#define LONGLOG 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#if _MIPS_SZPTR == 32 +#define PTR_ADD add +#define PTR_ADDU addu +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTR_ADDI addi +#define PTR_ADDIU addiu +#define PTR_SUB sub +#define PTR_SUBU subu +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTR_L lw +#define PTR_S sw +#define PTR_LA la +#define PTR_LI li +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTR_SLL sll +#define PTR_SLLV sllv +#define PTR_SRL srl +#define PTR_SRLV srlv +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTR_SRA sra +#define PTR_SRAV srav +#define PTR_SCALESHIFT 2 +#define PTR .word +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTRSIZE 4 +#define PTRLOG 2 +#endif +#if _MIPS_SZPTR == 64 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTR_ADD dadd +#define PTR_ADDU daddu +#define PTR_ADDI daddi +#define PTR_ADDIU daddiu +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTR_SUB dsub +#define PTR_SUBU dsubu +#define PTR_L ld +#define PTR_S sd +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTR_LA dla +#define PTR_LI dli +#define PTR_SLL dsll +#define PTR_SLLV dsllv +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTR_SRL dsrl +#define PTR_SRLV dsrlv +#define PTR_SRA dsra +#define PTR_SRAV dsrav +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTR_SCALESHIFT 3 +#define PTR .dword +#define PTRSIZE 8 +#define PTRLOG 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#if _MIPS_SIM == _MIPS_SIM_ABI32 +#define MFC0 mfc0 +#define MTC0 mtc0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#if _MIPS_SIM == _MIPS_SIM_NABI32 || _MIPS_SIM == _MIPS_SIM_ABI64 +#define MFC0 dmfc0 +#define MTC0 dmtc0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define SSNOP sll zero, zero, 1 +#define R10KCBARRIER(addr) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/atomic.h b/9/platforms/android-16/arch-mips/usr/include/asm/atomic.h new file mode 100644 index 0000000..eea1e59 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/atomic.h @@ -0,0 +1,54 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_ATOMIC_H +#define _ASM_ATOMIC_H +#include <linux/irqflags.h> +#include <asm/barrier.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/cpu-features.h> +#include <asm/war.h> +#include <asm/system.h> +typedef struct { volatile int counter; } atomic_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ATOMIC_INIT(i) { (i) } +#define atomic_read(v) ((v)->counter) +#define atomic_set(v, i) ((v)->counter = (i)) +#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define atomic_xchg(v, new) (xchg(&((v)->counter), (new))) +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) +#define atomic_dec_return(v) atomic_sub_return(1, (v)) +#define atomic_inc_return(v) atomic_add_return(1, (v)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0) +#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) +#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) +#define atomic_dec_if_positive(v) atomic_sub_if_positive(1, v) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define atomic_inc(v) atomic_add(1, (v)) +#define atomic_dec(v) atomic_sub(1, (v)) +#define atomic_add_negative(i, v) (atomic_add_return(i, (v)) < 0) +#define smp_mb__before_atomic_dec() smp_llsc_mb() +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define smp_mb__after_atomic_dec() smp_llsc_mb() +#define smp_mb__before_atomic_inc() smp_llsc_mb() +#define smp_mb__after_atomic_inc() smp_llsc_mb() +#include <asm-generic/atomic.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/auxvec.h b/9/platforms/android-16/arch-mips/usr/include/asm/auxvec.h new file mode 100644 index 0000000..0c04901 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/auxvec.h @@ -0,0 +1,21 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_AUXVEC_H +#define _ASM_AUXVEC_H +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/barrier.h b/9/platforms/android-16/arch-mips/usr/include/asm/barrier.h new file mode 100644 index 0000000..4aed9a7 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/barrier.h @@ -0,0 +1,48 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_BARRIER_H +#define __ASM_BARRIER_H +#define read_barrier_depends() do { } while(0) +#define smp_read_barrier_depends() do { } while(0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __sync() do { } while(0) +#define __fast_iob() __asm__ __volatile__( ".set push\n\t" ".set noreorder\n\t" "lw $0,%0\n\t" "nop\n\t" ".set pop" : : "m" (*(int *)CKSEG1) : "memory") +#define fast_wmb() __sync() +#define fast_rmb() __sync() +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define fast_mb() __sync() +#define fast_iob() do { __sync(); __fast_iob(); } while (0) +#define wmb() fast_wmb() +#define rmb() fast_rmb() +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define mb() fast_mb() +#define iob() fast_iob() +#define __WEAK_ORDERING_MB " \n" +#define __WEAK_LLSC_MB " \n" +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define smp_mb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") +#define smp_rmb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") +#define smp_wmb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") +#define set_mb(var, value) do { var = value; smp_mb(); } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define smp_llsc_mb() __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory") +#define smp_llsc_rmb() __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory") +#define smp_llsc_wmb() __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory") +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/bitops.h b/9/platforms/android-16/arch-mips/usr/include/asm/bitops.h new file mode 100644 index 0000000..749caaa --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/bitops.h @@ -0,0 +1,68 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_BITOPS_H +#define _ASM_BITOPS_H +#ifndef _LINUX_BITOPS_H +#error only <linux/bitops.h> can be included directly +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#include <linux/compiler.h> +#include <linux/irqflags.h> +#include <linux/types.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/barrier.h> +#include <asm/bug.h> +#include <asm/byteorder.h> +#include <asm/cpu-features.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/sgidefs.h> +#include <asm/war.h> +#if _MIPS_SZLONG == 32 +#define SZLONG_LOG 5 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SZLONG_MASK 31UL +#define __LL "ll " +#define __SC "sc " +#define __INS "ins " +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __EXT "ext " +#elif _MIPS_SZLONG == 64 +#define SZLONG_LOG 6 +#define SZLONG_MASK 63UL +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __LL "lld " +#define __SC "scd " +#define __INS "dins " +#define __EXT "dext " +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define smp_mb__before_clear_bit() smp_llsc_mb() +#define smp_mb__after_clear_bit() smp_llsc_mb() +#include <asm-generic/bitops/non-atomic.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm-generic/bitops/__ffs.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/ffs.h> +#include <asm-generic/bitops/fls.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/ffz.h> +#include <asm-generic/bitops/find.h> +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/bootinfo.h b/9/platforms/android-16/arch-mips/usr/include/asm/bootinfo.h new file mode 100644 index 0000000..97368ea --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/bootinfo.h @@ -0,0 +1,66 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_BOOTINFO_H +#define _ASM_BOOTINFO_H +#include <linux/types.h> +#include <asm/setup.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACH_UNKNOWN 0 +#define MACH_DSUNKNOWN 0 +#define MACH_DS23100 1 +#define MACH_DS5100 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACH_DS5000_200 3 +#define MACH_DS5000_1XX 4 +#define MACH_DS5000_XX 5 +#define MACH_DS5000_2X0 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACH_DS5400 7 +#define MACH_DS5500 8 +#define MACH_DS5800 9 +#define MACH_DS5900 10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACH_MSP4200_EVAL 0 +#define MACH_MSP4200_GW 1 +#define MACH_MSP4200_FPGA 2 +#define MACH_MSP7120_EVAL 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACH_MSP7120_GW 4 +#define MACH_MSP7120_FPGA 5 +#define MACH_MSP_OTHER 255 +#define MACH_MIKROTIK_RB532 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACH_MIKROTIK_RB532A 1 +#define CL_SIZE COMMAND_LINE_SIZE +#define BOOT_MEM_MAP_MAX 32 +#define BOOT_MEM_RAM 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BOOT_MEM_ROM_DATA 2 +#define BOOT_MEM_RESERVED 3 +struct boot_mem_map { + int nr_map; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct boot_mem_map_entry { + phys_t addr; + phys_t size; + long type; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } map[BOOT_MEM_MAP_MAX]; +}; +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/bug.h b/9/platforms/android-16/arch-mips/usr/include/asm/bug.h new file mode 100644 index 0000000..eac3da4 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/bug.h @@ -0,0 +1,24 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_BUG_H +#define __ASM_BUG_H +#include <asm/sgidefs.h> +#include <asm-generic/bug.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/byteorder.h b/9/platforms/android-16/arch-mips/usr/include/asm/byteorder.h new file mode 100644 index 0000000..bb964d8 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/byteorder.h @@ -0,0 +1,40 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_BYTEORDER_H +#define _ASM_BYTEORDER_H +#include <linux/compiler.h> +#include <asm/types.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifdef __GNUC__ +#ifndef __STRICT_ANSI__ +#define __BYTEORDER_HAS_U64__ +#define __SWAB_64_THRU_32__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#endif +#ifdef __MIPSEB__ +#include <linux/byteorder/big_endian.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#elif defined(__MIPSEL__) +#include <linux/byteorder/little_endian.h> +#else +#error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???" +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/cache.h b/9/platforms/android-16/arch-mips/usr/include/asm/cache.h new file mode 100644 index 0000000..64f1982 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/cache.h @@ -0,0 +1,28 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_CACHE_H +#define _ASM_CACHE_H +#include <kmalloc.h> +#define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) +#define SMP_CACHE_SHIFT L1_CACHE_SHIFT +#define SMP_CACHE_BYTES L1_CACHE_BYTES +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/cachectl.h b/9/platforms/android-16/arch-mips/usr/include/asm/cachectl.h new file mode 100644 index 0000000..458c00d --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/cachectl.h @@ -0,0 +1,28 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_CACHECTL +#define _ASM_CACHECTL +#define ICACHE (1<<0) +#define DCACHE (1<<1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BCACHE (ICACHE|DCACHE) +#define CACHEABLE 0 +#define UNCACHEABLE 1 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/cacheflush.h b/9/platforms/android-16/arch-mips/usr/include/asm/cacheflush.h new file mode 100644 index 0000000..00b2220 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/cacheflush.h @@ -0,0 +1,34 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_CACHEFLUSH_H +#define _ASM_CACHEFLUSH_H +#include <linux/mm.h> +#include <asm/cpu-features.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define flush_cache_dup_mm(mm) do { (void) (mm); } while (0) +#define flush_dcache_mmap_lock(mapping) do { } while (0) +#define flush_dcache_mmap_unlock(mapping) do { } while (0) +#define ARCH_HAS_FLUSH_ANON_PAGE +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PG_dcache_dirty PG_arch_1 +#define Page_dcache_dirty(page) test_bit(PG_dcache_dirty, &(page)->flags) +#define SetPageDcacheDirty(page) set_bit(PG_dcache_dirty, &(page)->flags) +#define ClearPageDcacheDirty(page) clear_bit(PG_dcache_dirty, &(page)->flags) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/cacheops.h b/9/platforms/android-16/arch-mips/usr/include/asm/cacheops.h new file mode 100644 index 0000000..4484774 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/cacheops.h @@ -0,0 +1,71 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_CACHEOPS_H +#define __ASM_CACHEOPS_H +#define Index_Invalidate_I 0x00 +#define Index_Writeback_Inv_D 0x01 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define Index_Load_Tag_I 0x04 +#define Index_Load_Tag_D 0x05 +#define Index_Store_Tag_I 0x08 +#define Index_Store_Tag_D 0x09 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define Hit_Invalidate_I 0x10 +#define Hit_Invalidate_D 0x11 +#define Hit_Writeback_Inv_D 0x15 +#define Create_Dirty_Excl_D 0x0d +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define Fill 0x14 +#define Hit_Writeback_I 0x18 +#define Hit_Writeback_D 0x19 +#define Index_Invalidate_SI 0x02 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define Index_Writeback_Inv_SD 0x03 +#define Index_Load_Tag_SI 0x06 +#define Index_Load_Tag_SD 0x07 +#define Index_Store_Tag_SI 0x0A +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define Index_Store_Tag_SD 0x0B +#define Create_Dirty_Excl_SD 0x0f +#define Hit_Invalidate_SI 0x12 +#define Hit_Invalidate_SD 0x13 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define Hit_Writeback_Inv_SD 0x17 +#define Hit_Writeback_SD 0x1b +#define Hit_Set_Virtual_SI 0x1e +#define Hit_Set_Virtual_SD 0x1f +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R5K_Page_Invalidate_S 0x17 +#define Page_Invalidate_T 0x16 +#define Index_Writeback_Inv_S 0x03 +#define Index_Load_Tag_S 0x07 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define Index_Store_Tag_S 0x0B +#define Hit_Invalidate_S 0x13 +#define Cache_Barrier 0x14 +#define Hit_Writeback_Inv_S 0x17 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define Index_Load_Data_I 0x18 +#define Index_Load_Data_D 0x19 +#define Index_Load_Data_S 0x1b +#define Index_Store_Data_I 0x1c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define Index_Store_Data_D 0x1d +#define Index_Store_Data_S 0x1f +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/checksum.h b/9/platforms/android-16/arch-mips/usr/include/asm/checksum.h new file mode 100644 index 0000000..df48b2a --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/checksum.h @@ -0,0 +1,30 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_CHECKSUM_H +#define _ASM_CHECKSUM_H +#include <linux/in6.h> +#include <asm/uaccess.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HAVE_CSUM_COPY_USER +#ifdef __MIPSEL__ +#else +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _HAVE_ARCH_IPV6_CSUM +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/cmpxchg.h b/9/platforms/android-16/arch-mips/usr/include/asm/cmpxchg.h new file mode 100644 index 0000000..16ba605 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/cmpxchg.h @@ -0,0 +1,33 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_CMPXCHG_H +#define __ASM_CMPXCHG_H +#include <linux/irqflags.h> +#define __HAVE_ARCH_CMPXCHG 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __cmpxchg_asm(ld, st, m, old, new) ({ __typeof(*(m)) __ret; if (cpu_has_llsc && R10000_LLSC_WAR) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqzl $1, 1b \n" "2: \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else if (cpu_has_llsc) { __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips3 \n" "1: " ld " %0, %2 # __cmpxchg_asm \n" " bne %0, %z3, 2f \n" " .set mips0 \n" " move $1, %z4 \n" " .set mips3 \n" " " st " $1, %1 \n" " beqz $1, 3f \n" "2: \n" " .subsection 2 \n" "3: b 1b \n" " .previous \n" " .set pop \n" : "=&r" (__ret), "=R" (*m) : "R" (*m), "Jr" (old), "Jr" (new) : "memory"); } else { unsigned long __flags; raw_local_irq_save(__flags); __ret = *m; if (__ret == old) *m = new; raw_local_irq_restore(__flags); } __ret; }) +#define __cmpxchg(ptr, old, new, barrier) ({ __typeof__(ptr) __ptr = (ptr); __typeof__(*(ptr)) __old = (old); __typeof__(*(ptr)) __new = (new); __typeof__(*(ptr)) __res = 0; barrier; switch (sizeof(*(__ptr))) { case 4: __res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); break; case 8: if (sizeof(long) == 8) { __res = __cmpxchg_asm("lld", "scd", __ptr, __old, __new); break; } default: __cmpxchg_called_with_bad_pointer(); break; } barrier; __res; }) +#define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb()) +#define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new, ) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cmpxchg64(ptr, o, n) ({ BUILD_BUG_ON(sizeof(*(ptr)) != 8); cmpxchg((ptr), (o), (n)); }) +#include <asm-generic/cmpxchg-local.h> +#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/compiler.h b/9/platforms/android-16/arch-mips/usr/include/asm/compiler.h new file mode 100644 index 0000000..e31f272 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/compiler.h @@ -0,0 +1,30 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_COMPILER_H +#define _ASM_COMPILER_H +#if __GNUC__ > (3 || __GNUC__ == (3 && __GNUC_MINOR__ >= 4)) +#define GCC_IMM_ASM() "n" +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GCC_REG_ACCUM "$0" +#else +#define GCC_IMM_ASM() "rn" +#define GCC_REG_ACCUM "accum" +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/cpu-features.h b/9/platforms/android-16/arch-mips/usr/include/asm/cpu-features.h new file mode 100644 index 0000000..50ce572 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/cpu-features.h @@ -0,0 +1,205 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_CPU_FEATURES_H +#define __ASM_CPU_FEATURES_H +#include <asm/cpu.h> +#include <asm/cpu-info.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <cpu-feature-overrides.h> +#ifndef current_cpu_type +#define current_cpu_type() current_cpu_data.cputype +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef cpu_has_tlb +#define cpu_has_tlb (cpu_data[0].options & MIPS_CPU_TLB) +#endif +#ifndef cpu_has_4kex +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_has_4kex (cpu_data[0].options & MIPS_CPU_4KEX) +#endif +#ifndef cpu_has_3k_cache +#define cpu_has_3k_cache (cpu_data[0].options & MIPS_CPU_3K_CACHE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define cpu_has_6k_cache 0 +#define cpu_has_8k_cache 0 +#ifndef cpu_has_4k_cache +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_has_4k_cache (cpu_data[0].options & MIPS_CPU_4K_CACHE) +#endif +#ifndef cpu_has_tx39_cache +#define cpu_has_tx39_cache (cpu_data[0].options & MIPS_CPU_TX39_CACHE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef cpu_has_fpu +#define cpu_has_fpu (current_cpu_data.options & MIPS_CPU_FPU) +#define raw_cpu_has_fpu (raw_current_cpu_data.options & MIPS_CPU_FPU) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#else +#define raw_cpu_has_fpu cpu_has_fpu +#endif +#ifndef cpu_has_32fpr +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_has_32fpr (cpu_data[0].options & MIPS_CPU_32FPR) +#endif +#ifndef cpu_has_counter +#define cpu_has_counter (cpu_data[0].options & MIPS_CPU_COUNTER) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef cpu_has_watch +#define cpu_has_watch (cpu_data[0].options & MIPS_CPU_WATCH) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef cpu_has_divec +#define cpu_has_divec (cpu_data[0].options & MIPS_CPU_DIVEC) +#endif +#ifndef cpu_has_vce +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_has_vce (cpu_data[0].options & MIPS_CPU_VCE) +#endif +#ifndef cpu_has_cache_cdex_p +#define cpu_has_cache_cdex_p (cpu_data[0].options & MIPS_CPU_CACHE_CDEX_P) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef cpu_has_cache_cdex_s +#define cpu_has_cache_cdex_s (cpu_data[0].options & MIPS_CPU_CACHE_CDEX_S) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef cpu_has_prefetch +#define cpu_has_prefetch (cpu_data[0].options & MIPS_CPU_PREFETCH) +#endif +#ifndef cpu_has_mcheck +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_has_mcheck (cpu_data[0].options & MIPS_CPU_MCHECK) +#endif +#ifndef cpu_has_ejtag +#define cpu_has_ejtag (cpu_data[0].options & MIPS_CPU_EJTAG) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef cpu_has_llsc +#define cpu_has_llsc (cpu_data[0].options & MIPS_CPU_LLSC) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef cpu_has_mips16 +#define cpu_has_mips16 (cpu_data[0].ases & MIPS_ASE_MIPS16) +#endif +#ifndef cpu_has_mdmx +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_has_mdmx (cpu_data[0].ases & MIPS_ASE_MDMX) +#endif +#ifndef cpu_has_mips3d +#define cpu_has_mips3d (cpu_data[0].ases & MIPS_ASE_MIPS3D) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef cpu_has_smartmips +#define cpu_has_smartmips (cpu_data[0].ases & MIPS_ASE_SMARTMIPS) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef cpu_has_vtag_icache +#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG) +#endif +#ifndef cpu_has_dc_aliases +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_has_dc_aliases (cpu_data[0].dcache.flags & MIPS_CACHE_ALIASES) +#endif +#ifndef cpu_has_ic_fills_f_dc +#define cpu_has_ic_fills_f_dc (cpu_data[0].icache.flags & MIPS_CACHE_IC_F_DC) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef cpu_has_pindexed_dcache +#define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef cpu_icache_snoops_remote_store +#define cpu_icache_snoops_remote_store 1 +#endif +#ifndef cpu_has_mips32r1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1) +#endif +#ifndef cpu_has_mips32r2 +#define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef cpu_has_mips64r1 +#define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef cpu_has_mips64r2 +#define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2) +#endif +#define cpu_has_mips32 (cpu_has_mips32r1 | cpu_has_mips32r2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_has_mips64 (cpu_has_mips64r1 | cpu_has_mips64r2) +#define cpu_has_mips_r1 (cpu_has_mips32r1 | cpu_has_mips64r1) +#define cpu_has_mips_r2 (cpu_has_mips32r2 | cpu_has_mips64r2) +#ifndef cpu_has_dsp +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP) +#endif +#ifndef cpu_has_mipsmt +#define cpu_has_mipsmt (cpu_data[0].ases & MIPS_ASE_MIPSMT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef cpu_has_userlocal +#define cpu_has_userlocal (cpu_data[0].options & MIPS_CPU_ULRI) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef cpu_has_nofpuex +#define cpu_has_nofpuex (cpu_data[0].options & MIPS_CPU_NOFPUEX) +#endif +#ifndef cpu_has_64bits +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_has_64bits (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT) +#endif +#ifndef cpu_has_64bit_zero_reg +#define cpu_has_64bit_zero_reg (cpu_data[0].isa_level & MIPS_CPU_ISA_64BIT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef cpu_has_64bit_gp_regs +#define cpu_has_64bit_gp_regs 0 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef cpu_has_64bit_addresses +#define cpu_has_64bit_addresses 0 +#endif +#ifndef cpu_has_vint +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_has_vint 0 +#endif +#ifndef cpu_has_veic +#define cpu_has_veic 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef cpu_has_inclusive_pcaches +#define cpu_has_inclusive_pcaches (cpu_data[0].options & MIPS_CPU_INCLUSIVE_CACHES) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef cpu_dcache_line_size +#define cpu_dcache_line_size() cpu_data[0].dcache.linesz +#endif +#ifndef cpu_icache_line_size +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_icache_line_size() cpu_data[0].icache.linesz +#endif +#ifndef cpu_scache_line_size +#define cpu_scache_line_size() cpu_data[0].scache.linesz +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/cpu-info.h b/9/platforms/android-16/arch-mips/usr/include/asm/cpu-info.h new file mode 100644 index 0000000..d8bd122 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/cpu-info.h @@ -0,0 +1,66 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_CPU_INFO_H +#define __ASM_CPU_INFO_H +#include <asm/cache.h> +struct cache_desc { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int waysize; + unsigned short sets; + unsigned char ways; + unsigned char linesz; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char waybit; + unsigned char flags; +}; +#define MIPS_CACHE_NOT_PRESENT 0x00000001 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CACHE_VTAG 0x00000002 +#define MIPS_CACHE_ALIASES 0x00000004 +#define MIPS_CACHE_IC_F_DC 0x00000008 +#define MIPS_IC_SNOOPS_REMOTE 0x00000010 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CACHE_PINDEX 0x00000020 +struct cpuinfo_mips { + unsigned long udelay_val; + unsigned long asid_cache; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long options; + unsigned long ases; + unsigned int processor_id; + unsigned int fpu_id; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int cputype; + int isa_level; + int tlbsize; + struct cache_desc icache; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct cache_desc dcache; + struct cache_desc scache; + struct cache_desc tcache; + int srsets; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int core; + void *data; +} __attribute__((aligned(SMP_CACHE_BYTES))); +#define current_cpu_data cpu_data[smp_processor_id()] +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define raw_current_cpu_data cpu_data[raw_smp_processor_id()] +#define cpu_name_string() __cpu_name[smp_processor_id()] +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/cpu.h b/9/platforms/android-16/arch-mips/usr/include/asm/cpu.h new file mode 100644 index 0000000..7b4b2d3 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/cpu.h @@ -0,0 +1,195 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_CPU_H +#define _ASM_CPU_H +#define PRID_COMP_LEGACY 0x000000 +#define PRID_COMP_MIPS 0x010000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_COMP_BROADCOM 0x020000 +#define PRID_COMP_ALCHEMY 0x030000 +#define PRID_COMP_SIBYTE 0x040000 +#define PRID_COMP_SANDCRAFT 0x050000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_COMP_NXP 0x060000 +#define PRID_COMP_TOSHIBA 0x070000 +#define PRID_COMP_LSI 0x080000 +#define PRID_COMP_LEXRA 0x0b0000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_IMP_R2000 0x0100 +#define PRID_IMP_AU1_REV1 0x0100 +#define PRID_IMP_AU1_REV2 0x0200 +#define PRID_IMP_R3000 0x0200 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_IMP_R6000 0x0300 +#define PRID_IMP_R4000 0x0400 +#define PRID_IMP_R6000A 0x0600 +#define PRID_IMP_R10000 0x0900 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_IMP_R4300 0x0b00 +#define PRID_IMP_VR41XX 0x0c00 +#define PRID_IMP_R12000 0x0e00 +#define PRID_IMP_R14000 0x0f00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_IMP_R8000 0x1000 +#define PRID_IMP_PR4450 0x1200 +#define PRID_IMP_R4600 0x2000 +#define PRID_IMP_R4700 0x2100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_IMP_TX39 0x2200 +#define PRID_IMP_R4640 0x2200 +#define PRID_IMP_R4650 0x2200 +#define PRID_IMP_R5000 0x2300 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_IMP_TX49 0x2d00 +#define PRID_IMP_SONIC 0x2400 +#define PRID_IMP_MAGIC 0x2500 +#define PRID_IMP_RM7000 0x2700 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_IMP_NEVADA 0x2800 +#define PRID_IMP_RM9000 0x3400 +#define PRID_IMP_LOONGSON1 0x4200 +#define PRID_IMP_R5432 0x5400 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_IMP_R5500 0x5500 +#define PRID_IMP_LOONGSON2 0x6300 +#define PRID_IMP_UNKNOWN 0xff00 +#define PRID_IMP_4KC 0x8000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_IMP_5KC 0x8100 +#define PRID_IMP_20KC 0x8200 +#define PRID_IMP_4KEC 0x8400 +#define PRID_IMP_4KSC 0x8600 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_IMP_25KF 0x8800 +#define PRID_IMP_5KE 0x8900 +#define PRID_IMP_4KECR2 0x9000 +#define PRID_IMP_4KEMPR2 0x9100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_IMP_4KSD 0x9200 +#define PRID_IMP_24K 0x9300 +#define PRID_IMP_34K 0x9500 +#define PRID_IMP_24KE 0x9600 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_IMP_74K 0x9700 +#define PRID_IMP_1004K 0x9900 +#define PRID_IMP_SB1 0x0100 +#define PRID_IMP_SB1A 0x1100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_IMP_SR71000 0x0400 +#define PRID_IMP_BCM4710 0x4000 +#define PRID_IMP_BCM3302 0x9000 +#define PRID_REV_MASK 0x00ff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_REV_TX4927 0x0022 +#define PRID_REV_TX4937 0x0030 +#define PRID_REV_R4400 0x0040 +#define PRID_REV_R3000A 0x0030 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_REV_R3000 0x0020 +#define PRID_REV_R2000A 0x0010 +#define PRID_REV_TX3912 0x0010 +#define PRID_REV_TX3922 0x0030 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_REV_TX3927 0x0040 +#define PRID_REV_VR4111 0x0050 +#define PRID_REV_VR4181 0x0050 +#define PRID_REV_VR4121 0x0060 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_REV_VR4122 0x0070 +#define PRID_REV_VR4181A 0x0070 +#define PRID_REV_VR4130 0x0080 +#define PRID_REV_34K_V1_0_2 0x0022 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRID_REV_ENCODE_44(ver, rev) ((ver) << 4 | (rev)) +#define PRID_REV_ENCODE_332(ver, rev, patch) ((ver) << 5 | (rev) << 2 | (patch)) +#define FPIR_IMP_NONE 0x0000 +enum cpu_type_enum { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + CPU_UNKNOWN, + CPU_R2000, CPU_R3000, CPU_R3000A, CPU_R3041, CPU_R3051, CPU_R3052, + CPU_R3081, CPU_R3081E, + CPU_R6000, CPU_R6000A, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + CPU_R4000PC, CPU_R4000SC, CPU_R4000MC, CPU_R4200, CPU_R4300, CPU_R4310, + CPU_R4400PC, CPU_R4400SC, CPU_R4400MC, CPU_R4600, CPU_R4640, CPU_R4650, + CPU_R4700, CPU_R5000, CPU_R5000A, CPU_R5500, CPU_NEVADA, CPU_R5432, + CPU_R10000, CPU_R12000, CPU_R14000, CPU_VR41XX, CPU_VR4111, CPU_VR4121, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + CPU_VR4122, CPU_VR4131, CPU_VR4133, CPU_VR4181, CPU_VR4181A, CPU_RM7000, + CPU_SR71000, CPU_RM9000, CPU_TX49XX, + CPU_R8000, + CPU_TX3912, CPU_TX3922, CPU_TX3927, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K, + CPU_AU1000, CPU_AU1100, CPU_AU1200, CPU_AU1210, CPU_AU1250, CPU_AU1500, + CPU_AU1550, CPU_PR4450, CPU_BCM3302, CPU_BCM4710, + CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + CPU_LAST +}; +#define MIPS_CPU_ISA_I 0x00000001 +#define MIPS_CPU_ISA_II 0x00000002 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CPU_ISA_III 0x00000004 +#define MIPS_CPU_ISA_IV 0x00000008 +#define MIPS_CPU_ISA_V 0x00000010 +#define MIPS_CPU_ISA_M32R1 0x00000020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CPU_ISA_M32R2 0x00000040 +#define MIPS_CPU_ISA_M64R1 0x00000080 +#define MIPS_CPU_ISA_M64R2 0x00000100 +#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_I | MIPS_CPU_ISA_II | MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 ) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III | MIPS_CPU_ISA_IV | MIPS_CPU_ISA_V | MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2) +#define MIPS_CPU_TLB 0x00000001 +#define MIPS_CPU_4KEX 0x00000002 +#define MIPS_CPU_3K_CACHE 0x00000004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CPU_4K_CACHE 0x00000008 +#define MIPS_CPU_TX39_CACHE 0x00000010 +#define MIPS_CPU_FPU 0x00000020 +#define MIPS_CPU_32FPR 0x00000040 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CPU_COUNTER 0x00000080 +#define MIPS_CPU_WATCH 0x00000100 +#define MIPS_CPU_DIVEC 0x00000200 +#define MIPS_CPU_VCE 0x00000400 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CPU_CACHE_CDEX_P 0x00000800 +#define MIPS_CPU_CACHE_CDEX_S 0x00001000 +#define MIPS_CPU_MCHECK 0x00002000 +#define MIPS_CPU_EJTAG 0x00004000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CPU_NOFPUEX 0x00008000 +#define MIPS_CPU_LLSC 0x00010000 +#define MIPS_CPU_INCLUSIVE_CACHES 0x00020000 +#define MIPS_CPU_PREFETCH 0x00040000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CPU_VINT 0x00080000 +#define MIPS_CPU_VEIC 0x00100000 +#define MIPS_CPU_ULRI 0x00200000 +#define MIPS_ASE_MIPS16 0x00000001 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_ASE_MDMX 0x00000002 +#define MIPS_ASE_MIPS3D 0x00000004 +#define MIPS_ASE_SMARTMIPS 0x00000008 +#define MIPS_ASE_DSP 0x00000010 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_ASE_MIPSMT 0x00000020 +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/cputime.h b/9/platforms/android-16/arch-mips/usr/include/asm/cputime.h new file mode 100644 index 0000000..5a71223 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/cputime.h @@ -0,0 +1,23 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __MIPS_CPUTIME_H +#define __MIPS_CPUTIME_H +#include <asm-generic/cputime.h> +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/current.h b/9/platforms/android-16/arch-mips/usr/include/asm/current.h new file mode 100644 index 0000000..439b61e --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/current.h @@ -0,0 +1,25 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_CURRENT_H +#define _ASM_CURRENT_H +#include <linux/thread_info.h> +struct task_struct; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define current get_current() +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/debug.h b/9/platforms/android-16/arch-mips/usr/include/asm/debug.h new file mode 100644 index 0000000..1345bdf --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/debug.h @@ -0,0 +1,28 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_DEBUG_H +#define _ASM_DEBUG_H +#define db_assert(x) +#define db_warn(x) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define db_verify(x, y) x +#define db_verify_warn(x, y) x +#define db_run(x) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/dec/ecc.h b/9/platforms/android-16/arch-mips/usr/include/asm/dec/ecc.h new file mode 100644 index 0000000..51342a5 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/dec/ecc.h @@ -0,0 +1,44 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_MIPS_DEC_ECC_H +#define __ASM_MIPS_DEC_ECC_H +#define KN0X_EAR_VALID (1<<31) +#define KN0X_EAR_CPU (1<<30) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KN0X_EAR_WRITE (1<<29) +#define KN0X_EAR_ECCERR (1<<28) +#define KN0X_EAR_RES_27 (1<<27) +#define KN0X_EAR_ADDRESS (0x7ffffff<<0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KN0X_ESR_VLDHI (1<<31) +#define KN0X_ESR_CHKHI (0x7f<<24) +#define KN0X_ESR_SNGHI (1<<23) +#define KN0X_ESR_SYNHI (0x7f<<16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KN0X_ESR_VLDLO (1<<15) +#define KN0X_ESR_CHKLO (0x7f<<8) +#define KN0X_ESR_SNGLO (1<<7) +#define KN0X_ESR_SYNLO (0x7f<<0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef __ASSEMBLY__ +#include <linux/interrupt.h> +struct pt_regs; +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/dec/ioasic_addrs.h b/9/platforms/android-16/arch-mips/usr/include/asm/dec/ioasic_addrs.h new file mode 100644 index 0000000..99774a1 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/dec/ioasic_addrs.h @@ -0,0 +1,124 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_MIPS_DEC_IOASIC_ADDRS_H +#define __ASM_MIPS_DEC_IOASIC_ADDRS_H +#define IOASIC_SLOT_SIZE 0x00040000 +#define IOASIC_SYS_ROM (0*IOASIC_SLOT_SIZE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOASIC_IOCTL (1*IOASIC_SLOT_SIZE) +#define IOASIC_ESAR (2*IOASIC_SLOT_SIZE) +#define IOASIC_LANCE (3*IOASIC_SLOT_SIZE) +#define IOASIC_SCC0 (4*IOASIC_SLOT_SIZE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOASIC_VDAC_HI (5*IOASIC_SLOT_SIZE) +#define IOASIC_SCC1 (6*IOASIC_SLOT_SIZE) +#define IOASIC_VDAC_LO (7*IOASIC_SLOT_SIZE) +#define IOASIC_TOY (8*IOASIC_SLOT_SIZE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOASIC_ISDN (9*IOASIC_SLOT_SIZE) +#define IOASIC_ERRADDR (9*IOASIC_SLOT_SIZE) +#define IOASIC_CHKSYN (10*IOASIC_SLOT_SIZE) +#define IOASIC_ACC_BUS (10*IOASIC_SLOT_SIZE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOASIC_MCR (11*IOASIC_SLOT_SIZE) +#define IOASIC_FLOPPY (11*IOASIC_SLOT_SIZE) +#define IOASIC_SCSI (12*IOASIC_SLOT_SIZE) +#define IOASIC_FDC_DMA (13*IOASIC_SLOT_SIZE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOASIC_SCSI_DMA (14*IOASIC_SLOT_SIZE) +#define IOASIC_RES_15 (15*IOASIC_SLOT_SIZE) +#define IO_REG_SCSI_DMA_P 0x00 +#define IO_REG_SCSI_DMA_BP 0x10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_REG_LANCE_DMA_P 0x20 +#define IO_REG_SCC0A_T_DMA_P 0x30 +#define IO_REG_SCC0A_R_DMA_P 0x40 +#define IO_REG_SCC1A_T_DMA_P 0x50 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_REG_SCC1A_R_DMA_P 0x60 +#define IO_REG_AB_T_DMA_P 0x50 +#define IO_REG_AB_R_DMA_P 0x60 +#define IO_REG_FLOPPY_DMA_P 0x70 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_REG_ISDN_T_DMA_P 0x80 +#define IO_REG_ISDN_T_DMA_BP 0x90 +#define IO_REG_ISDN_R_DMA_P 0xa0 +#define IO_REG_ISDN_R_DMA_BP 0xb0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_REG_DATA_0 0xc0 +#define IO_REG_DATA_1 0xd0 +#define IO_REG_DATA_2 0xe0 +#define IO_REG_DATA_3 0xf0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_REG_SSR 0x100 +#define IO_REG_SIR 0x110 +#define IO_REG_SIMR 0x120 +#define IO_REG_SAR 0x130 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_REG_ISDN_T_DATA 0x140 +#define IO_REG_ISDN_R_DATA 0x150 +#define IO_REG_LANCE_SLOT 0x160 +#define IO_REG_SCSI_SLOT 0x170 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_REG_SCC0A_SLOT 0x180 +#define IO_REG_SCC1A_SLOT 0x190 +#define IO_REG_AB_SLOT 0x190 +#define IO_REG_FLOPPY_SLOT 0x1a0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_REG_SCSI_SCR 0x1b0 +#define IO_REG_SCSI_SDR0 0x1c0 +#define IO_REG_SCSI_SDR1 0x1d0 +#define IO_REG_FCTR 0x1e0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_REG_RES_31 0x1f0 +#define IO_SSR_SCC0A_TX_DMA_EN (1<<31) +#define IO_SSR_SCC0A_RX_DMA_EN (1<<30) +#define IO_SSR_RES_27 (1<<27) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_SSR_RES_26 (1<<26) +#define IO_SSR_RES_25 (1<<25) +#define IO_SSR_RES_24 (1<<24) +#define IO_SSR_RES_23 (1<<23) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_SSR_SCSI_DMA_DIR (1<<18) +#define IO_SSR_SCSI_DMA_EN (1<<17) +#define IO_SSR_LANCE_DMA_EN (1<<16) +#define IO_SSR_SCC1A_TX_DMA_EN (1<<29) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_SSR_SCC1A_RX_DMA_EN (1<<28) +#define IO_SSR_RES_22 (1<<22) +#define IO_SSR_RES_21 (1<<21) +#define IO_SSR_RES_20 (1<<20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_SSR_RES_19 (1<<19) +#define IO_SSR_AB_TX_DMA_EN (1<<29) +#define IO_SSR_AB_RX_DMA_EN (1<<28) +#define IO_SSR_FLOPPY_DMA_DIR (1<<22) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_SSR_FLOPPY_DMA_EN (1<<21) +#define IO_SSR_ISDN_TX_DMA_EN (1<<20) +#define IO_SSR_ISDN_RX_DMA_EN (1<<19) +#define KN0X_IO_SSR_DIAGDN (1<<15) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KN0X_IO_SSR_SCC_RST (1<<11) +#define KN0X_IO_SSR_RTC_RST (1<<10) +#define KN0X_IO_SSR_ASC_RST (1<<9) +#define KN0X_IO_SSR_LANCE_RST (1<<8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/dec/kn02xa.h b/9/platforms/android-16/arch-mips/usr/include/asm/dec/kn02xa.h new file mode 100644 index 0000000..6078c8b --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/dec/kn02xa.h @@ -0,0 +1,61 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_MIPS_DEC_KN02XA_H +#define __ASM_MIPS_DEC_KN02XA_H +#include <asm/dec/ioasic_addrs.h> +#define KN02XA_SLOT_BASE 0x1c000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KN02XA_MER 0x0c400000 +#define KN02XA_MSR 0x0c800000 +#define KN02XA_MEM_CONF 0x0e000000 +#define KN02XA_EAR 0x0e000004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KN02XA_BOOT0 0x0e000008 +#define KN02XA_MEM_INTR 0x0e00000c +#define KN02XA_MER_RES_28 (0xf<<28) +#define KN02XA_MER_RES_17 (0x3ff<<17) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KN02XA_MER_PAGERR (1<<16) +#define KN02XA_MER_TRANSERR (1<<15) +#define KN02XA_MER_PARDIS (1<<14) +#define KN02XA_MER_SIZE (1<<13) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KN02XA_MER_RES_12 (1<<12) +#define KN02XA_MER_BYTERR (0xf<<8) +#define KN02XA_MER_BYTERR_3 (0x8<<8) +#define KN02XA_MER_BYTERR_2 (0x4<<8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KN02XA_MER_BYTERR_1 (0x2<<8) +#define KN02XA_MER_BYTERR_0 (0x1<<8) +#define KN02XA_MER_RES_0 (0xff<<0) +#define KN02XA_MSR_RES_27 (0x1f<<27) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KN02XA_MSR_RES_14 (0x7<<14) +#define KN02XA_MSR_SIZE (1<<13) +#define KN02XA_MSR_RES_0 (0x1fff<<0) +#define KN02XA_EAR_RES_29 (0x7<<29) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KN02XA_EAR_ADDRESS (0x7ffffff<<2) +#define KN02XA_EAR_RES_0 (0x3<<0) +#ifndef __ASSEMBLY__ +#include <linux/interrupt.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct pt_regs; +#endif +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/dec/system.h b/9/platforms/android-16/arch-mips/usr/include/asm/dec/system.h new file mode 100644 index 0000000..94cf431 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/dec/system.h @@ -0,0 +1,21 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_DEC_SYSTEM_H +#define __ASM_DEC_SYSTEM_H +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/delay.h b/9/platforms/android-16/arch-mips/usr/include/asm/delay.h new file mode 100644 index 0000000..a184a93 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/delay.h @@ -0,0 +1,38 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_DELAY_H +#define _ASM_DELAY_H +#include <linux/param.h> +#include <linux/smp.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/compiler.h> +#include <asm/war.h> +#define __udelay_val cpu_data[raw_smp_processor_id()].udelay_val +#define udelay(usecs) __udelay((usecs), __udelay_val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if HZ >= 1000 +#define MAX_UDELAY_MS 1 +#elif HZ <= 200 +#define MAX_UDELAY_MS 5 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#else +#define MAX_UDELAY_MS (1000 / HZ) +#endif +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/device.h b/9/platforms/android-16/arch-mips/usr/include/asm/device.h new file mode 100644 index 0000000..535031e --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/device.h @@ -0,0 +1,19 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#include <asm-generic/device.h> diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/div64.h b/9/platforms/android-16/arch-mips/usr/include/asm/div64.h new file mode 100644 index 0000000..a542b46 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/div64.h @@ -0,0 +1,33 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_DIV64_H +#define _ASM_DIV64_H +#include <linux/types.h> +#if _MIPS_SZLONG == 32 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/compiler.h> +#define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; }) +#define do_div(n, base) ({ unsigned long long __quot; unsigned long __mod; unsigned long long __div; unsigned long __upper, __low, __high, __base; __div = (n); __base = (base); __high = __div >> 32; __low = __div; __upper = __high; if (__high) __asm__("divu $0, %z2, %z3" : "=h" (__upper), "=l" (__high) : "Jr" (__high), "Jr" (__base) : GCC_REG_ACCUM); __mod = do_div64_32(__low, __upper, __low, __base); __quot = __high; __quot = __quot << 32 | __low; (n) = __quot; __mod; }) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if _MIPS_SZLONG == 64 +#define do_div(n, base) ({ unsigned long __quot; unsigned int __mod; unsigned long __div; unsigned int __base; __div = (n); __base = (base); __mod = __div % __base; __quot = __div / __base; (n) = __quot; __mod; }) +#endif +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/dma-mapping.h b/9/platforms/android-16/arch-mips/usr/include/asm/dma-mapping.h new file mode 100644 index 0000000..e521fd7 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/dma-mapping.h @@ -0,0 +1,24 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_DMA_MAPPING_H +#define _ASM_DMA_MAPPING_H +#include <asm/scatterlist.h> +#include <asm/cache.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/dma.h b/9/platforms/android-16/arch-mips/usr/include/asm/dma.h new file mode 100644 index 0000000..aedb5dd --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/dma.h @@ -0,0 +1,101 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_DMA_H +#define _ASM_DMA_H +#include <asm/io.h> +#include <linux/spinlock.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <linux/delay.h> +#include <asm/system.h> +#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER +#define dma_outb outb_p +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#else +#define dma_outb outb +#endif +#define dma_inb inb +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAX_DMA_CHANNELS 8 +#define MAX_DMA_ADDRESS (PAGE_OFFSET + 0x01000000) +#define MAX_DMA_PFN PFN_DOWN(virt_to_phys((void *)MAX_DMA_ADDRESS)) +#define MAX_DMA32_PFN (1UL << (32 - PAGE_SHIFT)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO_DMA1_BASE 0x00 +#define IO_DMA2_BASE 0xC0 +#define DMA1_CMD_REG 0x08 +#define DMA1_STAT_REG 0x08 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DMA1_REQ_REG 0x09 +#define DMA1_MASK_REG 0x0A +#define DMA1_MODE_REG 0x0B +#define DMA1_CLEAR_FF_REG 0x0C +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DMA1_TEMP_REG 0x0D +#define DMA1_RESET_REG 0x0D +#define DMA1_CLR_MASK_REG 0x0E +#define DMA1_MASK_ALL_REG 0x0F +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DMA2_CMD_REG 0xD0 +#define DMA2_STAT_REG 0xD0 +#define DMA2_REQ_REG 0xD2 +#define DMA2_MASK_REG 0xD4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DMA2_MODE_REG 0xD6 +#define DMA2_CLEAR_FF_REG 0xD8 +#define DMA2_TEMP_REG 0xDA +#define DMA2_RESET_REG 0xDA +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DMA2_CLR_MASK_REG 0xDC +#define DMA2_MASK_ALL_REG 0xDE +#define DMA_ADDR_0 0x00 +#define DMA_ADDR_1 0x02 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DMA_ADDR_2 0x04 +#define DMA_ADDR_3 0x06 +#define DMA_ADDR_4 0xC0 +#define DMA_ADDR_5 0xC4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DMA_ADDR_6 0xC8 +#define DMA_ADDR_7 0xCC +#define DMA_CNT_0 0x01 +#define DMA_CNT_1 0x03 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DMA_CNT_2 0x05 +#define DMA_CNT_3 0x07 +#define DMA_CNT_4 0xC2 +#define DMA_CNT_5 0xC6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DMA_CNT_6 0xCA +#define DMA_CNT_7 0xCE +#define DMA_PAGE_0 0x87 +#define DMA_PAGE_1 0x83 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DMA_PAGE_2 0x81 +#define DMA_PAGE_3 0x82 +#define DMA_PAGE_5 0x8B +#define DMA_PAGE_6 0x89 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DMA_PAGE_7 0x8A +#define DMA_MODE_READ 0x44 +#define DMA_MODE_WRITE 0x48 +#define DMA_MODE_CASCADE 0xC0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DMA_AUTOINIT 0x10 +#define isa_dma_bridge_buggy (0) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/ds1286.h b/9/platforms/android-16/arch-mips/usr/include/asm/ds1286.h new file mode 100644 index 0000000..319f219 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/ds1286.h @@ -0,0 +1,23 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_DS1286_H +#define _ASM_DS1286_H +#include <ds1286.h> +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/dsp.h b/9/platforms/android-16/arch-mips/usr/include/asm/dsp.h new file mode 100644 index 0000000..3d60be5 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/dsp.h @@ -0,0 +1,36 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_DSP_H +#define _ASM_DSP_H +#include <asm/cpu.h> +#include <asm/cpu-features.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/hazards.h> +#include <asm/mipsregs.h> +#define DSP_DEFAULT 0x00000000 +#define DSP_MASK 0x3ff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __enable_dsp_hazard() do { asm("_ehb"); } while (0) +#define __save_dsp(tsk) do { tsk->thread.dsp.dspr[0] = mfhi1(); tsk->thread.dsp.dspr[1] = mflo1(); tsk->thread.dsp.dspr[2] = mfhi2(); tsk->thread.dsp.dspr[3] = mflo2(); tsk->thread.dsp.dspr[4] = mfhi3(); tsk->thread.dsp.dspr[5] = mflo3(); tsk->thread.dsp.dspcontrol = rddsp(DSP_MASK); } while (0) +#define save_dsp(tsk) do { if (cpu_has_dsp) __save_dsp(tsk); } while (0) +#define __restore_dsp(tsk) do { mthi1(tsk->thread.dsp.dspr[0]); mtlo1(tsk->thread.dsp.dspr[1]); mthi2(tsk->thread.dsp.dspr[2]); mtlo2(tsk->thread.dsp.dspr[3]); mthi3(tsk->thread.dsp.dspr[4]); mtlo3(tsk->thread.dsp.dspr[5]); wrdsp(tsk->thread.dsp.dspcontrol, DSP_MASK); } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define restore_dsp(tsk) do { if (cpu_has_dsp) __restore_dsp(tsk); } while (0) +#define __get_dsp_regs(tsk) ({ if (tsk == current) __save_dsp(current); tsk->thread.dsp.dspr; }) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/elf.h b/9/platforms/android-16/arch-mips/usr/include/asm/elf.h new file mode 100644 index 0000000..6f79694 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/elf.h @@ -0,0 +1,218 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_ELF_H +#define _ASM_ELF_H +#define EF_MIPS_ARCH_1 0x00000000 +#define EF_MIPS_ARCH_2 0x10000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_MIPS_ARCH_3 0x20000000 +#define EF_MIPS_ARCH_4 0x30000000 +#define EF_MIPS_ARCH_5 0x40000000 +#define EF_MIPS_ARCH_32 0x50000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_MIPS_ARCH_64 0x60000000 +#define EF_MIPS_ARCH_32R2 0x70000000 +#define EF_MIPS_ARCH_64R2 0x80000000 +#define EF_MIPS_ABI_O32 0x00001000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_MIPS_ABI_O64 0x00002000 +#define PT_MIPS_REGINFO 0x70000000 +#define PT_MIPS_RTPROC 0x70000001 +#define PT_MIPS_OPTIONS 0x70000002 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_MIPS_NOREORDER 0x00000001 +#define EF_MIPS_PIC 0x00000002 +#define EF_MIPS_CPIC 0x00000004 +#define EF_MIPS_ABI2 0x00000020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_MIPS_OPTIONS_FIRST 0x00000080 +#define EF_MIPS_32BITMODE 0x00000100 +#define EF_MIPS_ABI 0x0000f000 +#define EF_MIPS_ARCH 0xf0000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DT_MIPS_RLD_VERSION 0x70000001 +#define DT_MIPS_TIME_STAMP 0x70000002 +#define DT_MIPS_ICHECKSUM 0x70000003 +#define DT_MIPS_IVERSION 0x70000004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DT_MIPS_FLAGS 0x70000005 +#define RHF_NONE 0x00000000 +#define RHF_HARDWAY 0x00000001 +#define RHF_NOTPOT 0x00000002 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define RHF_SGI_ONLY 0x00000010 +#define DT_MIPS_BASE_ADDRESS 0x70000006 +#define DT_MIPS_CONFLICT 0x70000008 +#define DT_MIPS_LIBLIST 0x70000009 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DT_MIPS_LOCAL_GOTNO 0x7000000a +#define DT_MIPS_CONFLICTNO 0x7000000b +#define DT_MIPS_LIBLISTNO 0x70000010 +#define DT_MIPS_SYMTABNO 0x70000011 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DT_MIPS_UNREFEXTNO 0x70000012 +#define DT_MIPS_GOTSYM 0x70000013 +#define DT_MIPS_HIPAGENO 0x70000014 +#define DT_MIPS_RLD_MAP 0x70000016 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R_MIPS_NONE 0 +#define R_MIPS_16 1 +#define R_MIPS_32 2 +#define R_MIPS_REL32 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R_MIPS_26 4 +#define R_MIPS_HI16 5 +#define R_MIPS_LO16 6 +#define R_MIPS_GPREL16 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R_MIPS_LITERAL 8 +#define R_MIPS_GOT16 9 +#define R_MIPS_PC16 10 +#define R_MIPS_CALL16 11 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R_MIPS_GPREL32 12 +#define R_MIPS_UNUSED1 13 +#define R_MIPS_UNUSED2 14 +#define R_MIPS_UNUSED3 15 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R_MIPS_SHIFT5 16 +#define R_MIPS_SHIFT6 17 +#define R_MIPS_64 18 +#define R_MIPS_GOT_DISP 19 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R_MIPS_GOT_PAGE 20 +#define R_MIPS_GOT_OFST 21 +#define R_MIPS_GOTHI16 22 +#define R_MIPS_GOTLO16 23 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R_MIPS_SUB 24 +#define R_MIPS_INSERT_A 25 +#define R_MIPS_INSERT_B 26 +#define R_MIPS_DELETE 27 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R_MIPS_HIGHER 28 +#define R_MIPS_HIGHEST 29 +#define R_MIPS_CALLHI16 30 +#define R_MIPS_CALLLO16 31 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R_MIPS_LOVENDOR 100 +#define R_MIPS_HIVENDOR 127 +#define SHN_MIPS_ACCOMON 0xff00 +#define SHN_MIPS_TEXT 0xff01 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHN_MIPS_DATA 0xff02 +#define SHN_MIPS_SCOMMON 0xff03 +#define SHN_MIPS_SUNDEFINED 0xff04 +#define SHT_MIPS_LIST 0x70000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHT_MIPS_CONFLICT 0x70000002 +#define SHT_MIPS_GPTAB 0x70000003 +#define SHT_MIPS_UCODE 0x70000004 +#define SHT_MIPS_DEBUG 0x70000005 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHT_MIPS_REGINFO 0x70000006 +#define SHT_MIPS_PACKAGE 0x70000007 +#define SHT_MIPS_PACKSYM 0x70000008 +#define SHT_MIPS_RELD 0x70000009 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHT_MIPS_IFACE 0x7000000b +#define SHT_MIPS_CONTENT 0x7000000c +#define SHT_MIPS_OPTIONS 0x7000000d +#define SHT_MIPS_SHDR 0x70000010 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHT_MIPS_FDESC 0x70000011 +#define SHT_MIPS_EXTSYM 0x70000012 +#define SHT_MIPS_DENSE 0x70000013 +#define SHT_MIPS_PDESC 0x70000014 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHT_MIPS_LOCSYM 0x70000015 +#define SHT_MIPS_AUXSYM 0x70000016 +#define SHT_MIPS_OPTSYM 0x70000017 +#define SHT_MIPS_LOCSTR 0x70000018 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHT_MIPS_LINE 0x70000019 +#define SHT_MIPS_RFDESC 0x7000001a +#define SHT_MIPS_DELTASYM 0x7000001b +#define SHT_MIPS_DELTAINST 0x7000001c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHT_MIPS_DELTACLASS 0x7000001d +#define SHT_MIPS_DWARF 0x7000001e +#define SHT_MIPS_DELTADECL 0x7000001f +#define SHT_MIPS_SYMBOL_LIB 0x70000020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHT_MIPS_EVENTS 0x70000021 +#define SHT_MIPS_TRANSLATE 0x70000022 +#define SHT_MIPS_PIXIE 0x70000023 +#define SHT_MIPS_XLATE 0x70000024 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHT_MIPS_XLATE_DEBUG 0x70000025 +#define SHT_MIPS_WHIRL 0x70000026 +#define SHT_MIPS_EH_REGION 0x70000027 +#define SHT_MIPS_XLATE_OLD 0x70000028 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHT_MIPS_PDR_EXCEPTION 0x70000029 +#define SHF_MIPS_GPREL 0x10000000 +#define SHF_MIPS_MERGE 0x20000000 +#define SHF_MIPS_ADDR 0x40000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHF_MIPS_STRING 0x80000000 +#define SHF_MIPS_NOSTRIP 0x08000000 +#define SHF_MIPS_LOCAL 0x04000000 +#define SHF_MIPS_NAMES 0x02000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHF_MIPS_NODUPES 0x01000000 +#ifndef ELF_ARCH +#define ELF_NGREG 45 +#define ELF_NFPREG 33 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef unsigned long elf_greg_t; +typedef elf_greg_t elf_gregset_t[ELF_NGREG]; +typedef double elf_fpreg_t; +typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define elf_check_arch(hdr) ({ int __res = 1; struct elfhdr *__h = (hdr); if (__h->e_machine != EM_MIPS) __res = 0; if (__h->e_ident[EI_CLASS] != ELFCLASS32) __res = 0; if ((__h->e_flags & EF_MIPS_ABI2) != 0) __res = 0; if (((__h->e_flags & EF_MIPS_ABI) != 0) && ((__h->e_flags & EF_MIPS_ABI) != EF_MIPS_ABI_O32)) __res = 0; __res; }) +#define ELF_CLASS ELFCLASS32 +#ifdef __MIPSEB__ +#define ELF_DATA ELFDATA2MSB +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#elif __MIPSEL__ +#define ELF_DATA ELFDATA2LSB +#endif +#define ELF_ARCH EM_MIPS +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +struct mips_abi; +#define SET_PERSONALITY(ex, ibcs2) do { if (ibcs2) set_personality(PER_SVR4); set_personality(PER_LINUX); current->thread.abi = &mips_abi; } while (0) +struct task_struct; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ELF_CORE_COPY_REGS(elf_regs, regs) elf_dump_regs((elf_greg_t *)&(elf_regs), regs); +#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs) +#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs) +#define USE_ELF_CORE_DUMP +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ELF_EXEC_PAGESIZE PAGE_SIZE +#define ELF_HWCAP (0) +#define ELF_PLATFORM (NULL) +#define ELF_PLAT_INIT(_r, load_addr) do { _r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; _r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0; _r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0; _r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0; _r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0; _r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0; _r->regs[25] = _r->regs[26] = _r->regs[27] = _r->regs[28] = 0; _r->regs[30] = _r->regs[31] = 0; } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef ELF_ET_DYN_BASE +#define ELF_ET_DYN_BASE (TASK_SIZE / 3 * 2) +#endif +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/errno.h b/9/platforms/android-16/arch-mips/usr/include/asm/errno.h new file mode 100644 index 0000000..f8ba438 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/errno.h @@ -0,0 +1,146 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_ERRNO_H +#define _ASM_ERRNO_H +#include <asm-generic/errno-base.h> +#define ENOMSG 35 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EIDRM 36 +#define ECHRNG 37 +#define EL2NSYNC 38 +#define EL3HLT 39 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EL3RST 40 +#define ELNRNG 41 +#define EUNATCH 42 +#define ENOCSI 43 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EL2HLT 44 +#define EDEADLK 45 +#define ENOLCK 46 +#define EBADE 50 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EBADR 51 +#define EXFULL 52 +#define ENOANO 53 +#define EBADRQC 54 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EBADSLT 55 +#define EDEADLOCK 56 +#define EBFONT 59 +#define ENOSTR 60 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ENODATA 61 +#define ETIME 62 +#define ENOSR 63 +#define ENONET 64 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ENOPKG 65 +#define EREMOTE 66 +#define ENOLINK 67 +#define EADV 68 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ESRMNT 69 +#define ECOMM 70 +#define EPROTO 71 +#define EDOTDOT 73 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EMULTIHOP 74 +#define EBADMSG 77 +#define ENAMETOOLONG 78 +#define EOVERFLOW 79 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ENOTUNIQ 80 +#define EBADFD 81 +#define EREMCHG 82 +#define ELIBACC 83 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ELIBBAD 84 +#define ELIBSCN 85 +#define ELIBMAX 86 +#define ELIBEXEC 87 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EILSEQ 88 +#define ENOSYS 89 +#define ELOOP 90 +#define ERESTART 91 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ESTRPIPE 92 +#define ENOTEMPTY 93 +#define EUSERS 94 +#define ENOTSOCK 95 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EDESTADDRREQ 96 +#define EMSGSIZE 97 +#define EPROTOTYPE 98 +#define ENOPROTOOPT 99 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EPROTONOSUPPORT 120 +#define ESOCKTNOSUPPORT 121 +#define EOPNOTSUPP 122 +#define EPFNOSUPPORT 123 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EAFNOSUPPORT 124 +#define EADDRINUSE 125 +#define EADDRNOTAVAIL 126 +#define ENETDOWN 127 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ENETUNREACH 128 +#define ENETRESET 129 +#define ECONNABORTED 130 +#define ECONNRESET 131 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ENOBUFS 132 +#define EISCONN 133 +#define ENOTCONN 134 +#define EUCLEAN 135 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ENOTNAM 137 +#define ENAVAIL 138 +#define EISNAM 139 +#define EREMOTEIO 140 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EINIT 141 +#define EREMDEV 142 +#define ESHUTDOWN 143 +#define ETOOMANYREFS 144 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ETIMEDOUT 145 +#define ECONNREFUSED 146 +#define EHOSTDOWN 147 +#define EHOSTUNREACH 148 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EWOULDBLOCK EAGAIN +#define EALREADY 149 +#define EINPROGRESS 150 +#define ESTALE 151 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ECANCELED 158 +#define ENOMEDIUM 159 +#define EMEDIUMTYPE 160 +#define ENOKEY 161 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EKEYEXPIRED 162 +#define EKEYREVOKED 163 +#define EKEYREJECTED 164 +#define EOWNERDEAD 165 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ENOTRECOVERABLE 166 +#define EDQUOT 1133 +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/fcntl.h b/9/platforms/android-16/arch-mips/usr/include/asm/fcntl.h new file mode 100644 index 0000000..73de4ad --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/fcntl.h @@ -0,0 +1,60 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_FCNTL_H +#define _ASM_FCNTL_H +#define O_APPEND 0x0008 +#define O_SYNC 0x0010 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define O_NONBLOCK 0x0080 +#define O_CREAT 0x0100 +#define O_TRUNC 0x0200 +#define O_EXCL 0x0400 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define O_NOCTTY 0x0800 +#define FASYNC 0x1000 +#define O_LARGEFILE 0x2000 +#define O_DIRECT 0x8000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define F_GETLK 14 +#define F_SETLK 6 +#define F_SETLKW 7 +#define F_SETOWN 24 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define F_GETOWN 23 +#ifndef __mips64 +#define F_GETLK64 33 +#define F_SETLK64 34 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define F_SETLKW64 35 +#endif +struct flock { + short l_type; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + short l_whence; + off_t l_start; + off_t l_len; + long l_sysid; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __kernel_pid_t l_pid; + long pad[4]; +}; +#define HAVE_ARCH_STRUCT_FLOCK +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm-generic/fcntl.h> +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/fixmap.h b/9/platforms/android-16/arch-mips/usr/include/asm/fixmap.h new file mode 100644 index 0000000..659d51d --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/fixmap.h @@ -0,0 +1,36 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_FIXMAP_H +#define _ASM_FIXMAP_H +#include <asm/page.h> +enum fixed_addresses { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FIX_N_COLOURS 8 + FIX_CMAP_BEGIN, + FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS, + __end_of_fixed_addresses +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define FIXADDR_TOP ((unsigned long)(long)(int)0xfffe0000) +#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) +#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) +#define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/floppy.h b/9/platforms/android-16/arch-mips/usr/include/asm/floppy.h new file mode 100644 index 0000000..769b3f9 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/floppy.h @@ -0,0 +1,34 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_FLOPPY_H +#define _ASM_FLOPPY_H +#include <linux/dma-mapping.h> +#define MAX_BUFFER_SECTORS 24 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FLOPPY0_TYPE fd_drive_type(0) +#define FLOPPY1_TYPE fd_drive_type(1) +#define FDC1 fd_getfdaddr1(); +#define N_FDC 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define N_DRIVE 8 +#define CROSS_64KB(a, s) ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64) +#define EXTRA_FLOPPY_PARAMS +#include <floppy.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/fpregdef.h b/9/platforms/android-16/arch-mips/usr/include/asm/fpregdef.h new file mode 100644 index 0000000..046f750 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/fpregdef.h @@ -0,0 +1,110 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_FPREGDEF_H +#define _ASM_FPREGDEF_H +#include <asm/sgidefs.h> +#if _MIPS_SIM == _MIPS_SIM_ABI32 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define fv0 $f0 +#define fv0f $f1 +#define fv1 $f2 +#define fv1f $f3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define fa0 $f12 +#define fa0f $f13 +#define fa1 $f14 +#define fa1f $f15 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ft0 $f4 +#define ft0f $f5 +#define ft1 $f6 +#define ft1f $f7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ft2 $f8 +#define ft2f $f9 +#define ft3 $f10 +#define ft3f $f11 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ft4 $f16 +#define ft4f $f17 +#define ft5 $f18 +#define ft5f $f19 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define fs0 $f20 +#define fs0f $f21 +#define fs1 $f22 +#define fs1f $f23 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define fs2 $f24 +#define fs2f $f25 +#define fs3 $f26 +#define fs3f $f27 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define fs4 $f28 +#define fs4f $f29 +#define fs5 $f30 +#define fs5f $f31 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define fcr31 $31 +#endif +#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 +#define fv0 $f0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define fv1 $f2 +#define fa0 $f12 +#define fa1 $f13 +#define fa2 $f14 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define fa3 $f15 +#define fa4 $f16 +#define fa5 $f17 +#define fa6 $f18 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define fa7 $f19 +#define ft0 $f4 +#define ft1 $f5 +#define ft2 $f6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ft3 $f7 +#define ft4 $f8 +#define ft5 $f9 +#define ft6 $f10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ft7 $f11 +#define ft8 $f20 +#define ft9 $f21 +#define ft10 $f22 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ft11 $f23 +#define ft12 $f1 +#define ft13 $f3 +#define fs0 $f24 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define fs1 $f25 +#define fs2 $f26 +#define fs3 $f27 +#define fs4 $f28 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define fs5 $f29 +#define fs6 $f30 +#define fs7 $f31 +#define fcr31 $31 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/fw/arc/types.h b/9/platforms/android-16/arch-mips/usr/include/asm/fw/arc/types.h new file mode 100644 index 0000000..62f89f8 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/fw/arc/types.h @@ -0,0 +1,45 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_ARC_TYPES_H +#define _ASM_ARC_TYPES_H +typedef CHAR *PCHAR; +typedef SHORT *PSHORT; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef LARGE_INTEGER *PLARGE_INTEGER; +typedef LONG *PLONG; +typedef UCHAR *PUCHAR; +typedef USHORT *PUSHORT; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef ULONG *PULONG; +typedef VOID *PVOID; +typedef struct { + USHORT CursorXPosition; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + USHORT CursorYPosition; + USHORT CursorMaxXPosition; + USHORT CursorMaxYPosition; + USHORT ForegroundColor; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + USHORT BackgroundColor; + UCHAR HighIntensity; + UCHAR Underscored; + UCHAR ReverseVideo; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +} DISPLAY_STATUS; +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/gt64120.h b/9/platforms/android-16/arch-mips/usr/include/asm/gt64120.h new file mode 100644 index 0000000..d4cda0d --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/gt64120.h @@ -0,0 +1,530 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_GT64120_H +#define _ASM_GT64120_H +#include <linux/clocksource.h> +#include <asm/addrspace.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/byteorder.h> +#define MSK(n) ((1 << (n)) - 1) +#define GT_CPU_OFS 0x000 +#define GT_MULTI_OFS 0x120 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SCS10LD_OFS 0x008 +#define GT_SCS10HD_OFS 0x010 +#define GT_SCS32LD_OFS 0x018 +#define GT_SCS32HD_OFS 0x020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_CS20LD_OFS 0x028 +#define GT_CS20HD_OFS 0x030 +#define GT_CS3BOOTLD_OFS 0x038 +#define GT_CS3BOOTHD_OFS 0x040 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0IOLD_OFS 0x048 +#define GT_PCI0IOHD_OFS 0x050 +#define GT_PCI0M0LD_OFS 0x058 +#define GT_PCI0M0HD_OFS 0x060 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_ISD_OFS 0x068 +#define GT_PCI0M1LD_OFS 0x080 +#define GT_PCI0M1HD_OFS 0x088 +#define GT_PCI1IOLD_OFS 0x090 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI1IOHD_OFS 0x098 +#define GT_PCI1M0LD_OFS 0x0a0 +#define GT_PCI1M0HD_OFS 0x0a8 +#define GT_PCI1M1LD_OFS 0x0b0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI1M1HD_OFS 0x0b8 +#define GT_PCI1M1LD_OFS 0x0b0 +#define GT_PCI1M1HD_OFS 0x0b8 +#define GT_SCS10AR_OFS 0x0d0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SCS32AR_OFS 0x0d8 +#define GT_CS20R_OFS 0x0e0 +#define GT_CS3BOOTR_OFS 0x0e8 +#define GT_PCI0IOREMAP_OFS 0x0f0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0M0REMAP_OFS 0x0f8 +#define GT_PCI0M1REMAP_OFS 0x100 +#define GT_PCI1IOREMAP_OFS 0x108 +#define GT_PCI1M0REMAP_OFS 0x110 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI1M1REMAP_OFS 0x118 +#define GT_CPUERR_ADDRLO_OFS 0x070 +#define GT_CPUERR_ADDRHI_OFS 0x078 +#define GT_CPUERR_DATALO_OFS 0x128 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_CPUERR_DATAHI_OFS 0x130 +#define GT_CPUERR_PARITY_OFS 0x138 +#define GT_PCI0SYNC_OFS 0x0c0 +#define GT_PCI1SYNC_OFS 0x0c8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SCS0LD_OFS 0x400 +#define GT_SCS0HD_OFS 0x404 +#define GT_SCS1LD_OFS 0x408 +#define GT_SCS1HD_OFS 0x40c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SCS2LD_OFS 0x410 +#define GT_SCS2HD_OFS 0x414 +#define GT_SCS3LD_OFS 0x418 +#define GT_SCS3HD_OFS 0x41c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_CS0LD_OFS 0x420 +#define GT_CS0HD_OFS 0x424 +#define GT_CS1LD_OFS 0x428 +#define GT_CS1HD_OFS 0x42c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_CS2LD_OFS 0x430 +#define GT_CS2HD_OFS 0x434 +#define GT_CS3LD_OFS 0x438 +#define GT_CS3HD_OFS 0x43c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_BOOTLD_OFS 0x440 +#define GT_BOOTHD_OFS 0x444 +#define GT_ADERR_OFS 0x470 +#define GT_SDRAM_CFG_OFS 0x448 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_OPMODE_OFS 0x474 +#define GT_SDRAM_BM_OFS 0x478 +#define GT_SDRAM_ADDRDECODE_OFS 0x47c +#define GT_SDRAM_B0_OFS 0x44c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_B1_OFS 0x450 +#define GT_SDRAM_B2_OFS 0x454 +#define GT_SDRAM_B3_OFS 0x458 +#define GT_DEV_B0_OFS 0x45c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_DEV_B1_OFS 0x460 +#define GT_DEV_B2_OFS 0x464 +#define GT_DEV_B3_OFS 0x468 +#define GT_DEV_BOOT_OFS 0x46c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_ECC_ERRDATALO 0x480 +#define GT_ECC_ERRDATAHI 0x484 +#define GT_ECC_MEM 0x488 +#define GT_ECC_CALC 0x48c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_ECC_ERRADDR 0x490 +#define GT_DMA0_CNT_OFS 0x800 +#define GT_DMA1_CNT_OFS 0x804 +#define GT_DMA2_CNT_OFS 0x808 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_DMA3_CNT_OFS 0x80c +#define GT_DMA0_SA_OFS 0x810 +#define GT_DMA1_SA_OFS 0x814 +#define GT_DMA2_SA_OFS 0x818 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_DMA3_SA_OFS 0x81c +#define GT_DMA0_DA_OFS 0x820 +#define GT_DMA1_DA_OFS 0x824 +#define GT_DMA2_DA_OFS 0x828 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_DMA3_DA_OFS 0x82c +#define GT_DMA0_NEXT_OFS 0x830 +#define GT_DMA1_NEXT_OFS 0x834 +#define GT_DMA2_NEXT_OFS 0x838 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_DMA3_NEXT_OFS 0x83c +#define GT_DMA0_CUR_OFS 0x870 +#define GT_DMA1_CUR_OFS 0x874 +#define GT_DMA2_CUR_OFS 0x878 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_DMA3_CUR_OFS 0x87c +#define GT_DMA0_CTRL_OFS 0x840 +#define GT_DMA1_CTRL_OFS 0x844 +#define GT_DMA2_CTRL_OFS 0x848 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_DMA3_CTRL_OFS 0x84c +#define GT_DMA_ARB_OFS 0x860 +#define GT_TC0_OFS 0x850 +#define GT_TC1_OFS 0x854 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_TC2_OFS 0x858 +#define GT_TC3_OFS 0x85c +#define GT_TC_CONTROL_OFS 0x864 +#define GT_PCI0_CMD_OFS 0xc00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_TOR_OFS 0xc04 +#define GT_PCI0_BS_SCS10_OFS 0xc08 +#define GT_PCI0_BS_SCS32_OFS 0xc0c +#define GT_PCI0_BS_CS20_OFS 0xc10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_BS_CS3BT_OFS 0xc14 +#define GT_PCI1_IACK_OFS 0xc30 +#define GT_PCI0_IACK_OFS 0xc34 +#define GT_PCI0_BARE_OFS 0xc3c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_PREFMBR_OFS 0xc40 +#define GT_PCI0_SCS10_BAR_OFS 0xc48 +#define GT_PCI0_SCS32_BAR_OFS 0xc4c +#define GT_PCI0_CS20_BAR_OFS 0xc50 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_CS3BT_BAR_OFS 0xc54 +#define GT_PCI0_SSCS10_BAR_OFS 0xc58 +#define GT_PCI0_SSCS32_BAR_OFS 0xc5c +#define GT_PCI0_SCS3BT_BAR_OFS 0xc64 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI1_CMD_OFS 0xc80 +#define GT_PCI1_TOR_OFS 0xc84 +#define GT_PCI1_BS_SCS10_OFS 0xc88 +#define GT_PCI1_BS_SCS32_OFS 0xc8c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI1_BS_CS20_OFS 0xc90 +#define GT_PCI1_BS_CS3BT_OFS 0xc94 +#define GT_PCI1_BARE_OFS 0xcbc +#define GT_PCI1_PREFMBR_OFS 0xcc0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI1_SCS10_BAR_OFS 0xcc8 +#define GT_PCI1_SCS32_BAR_OFS 0xccc +#define GT_PCI1_CS20_BAR_OFS 0xcd0 +#define GT_PCI1_CS3BT_BAR_OFS 0xcd4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI1_SSCS10_BAR_OFS 0xcd8 +#define GT_PCI1_SSCS32_BAR_OFS 0xcdc +#define GT_PCI1_SCS3BT_BAR_OFS 0xce4 +#define GT_PCI1_CFGADDR_OFS 0xcf0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI1_CFGDATA_OFS 0xcf4 +#define GT_PCI0_CFGADDR_OFS 0xcf8 +#define GT_PCI0_CFGDATA_OFS 0xcfc +#define GT_INTRCAUSE_OFS 0xc18 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_INTRMASK_OFS 0xc1c +#define GT_PCI0_ICMASK_OFS 0xc24 +#define GT_PCI0_SERR0MASK_OFS 0xc28 +#define GT_CPU_INTSEL_OFS 0xc70 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_INTSEL_OFS 0xc74 +#define GT_HINTRCAUSE_OFS 0xc98 +#define GT_HINTRMASK_OFS 0xc9c +#define GT_PCI0_HICMASK_OFS 0xca4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI1_SERR1MASK_OFS 0xca8 +#define INBOUND_MESSAGE_REGISTER0_PCI_SIDE 0x010 +#define INBOUND_MESSAGE_REGISTER1_PCI_SIDE 0x014 +#define OUTBOUND_MESSAGE_REGISTER0_PCI_SIDE 0x018 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define OUTBOUND_MESSAGE_REGISTER1_PCI_SIDE 0x01c +#define INBOUND_DOORBELL_REGISTER_PCI_SIDE 0x020 +#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE 0x024 +#define INBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE 0x028 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define OUTBOUND_DOORBELL_REGISTER_PCI_SIDE 0x02c +#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI_SIDE 0x030 +#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI_SIDE 0x034 +#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE 0x040 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI_SIDE 0x044 +#define QUEUE_CONTROL_REGISTER_PCI_SIDE 0x050 +#define QUEUE_BASE_ADDRESS_REGISTER_PCI_SIDE 0x054 +#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE 0x060 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE 0x064 +#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE 0x068 +#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE 0x06c +#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI_SIDE 0x070 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI_SIDE 0x074 +#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI_SIDE 0x078 +#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI_SIDE 0x07c +#define INBOUND_MESSAGE_REGISTER0_CPU_SIDE 0x1c10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INBOUND_MESSAGE_REGISTER1_CPU_SIDE 0x1c14 +#define OUTBOUND_MESSAGE_REGISTER0_CPU_SIDE 0x1c18 +#define OUTBOUND_MESSAGE_REGISTER1_CPU_SIDE 0x1c1c +#define INBOUND_DOORBELL_REGISTER_CPU_SIDE 0x1c20 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE 0x1c24 +#define INBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE 0x1c28 +#define OUTBOUND_DOORBELL_REGISTER_CPU_SIDE 0x1c2c +#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU_SIDE 0x1c30 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU_SIDE 0x1c34 +#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE 0x1c40 +#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU_SIDE 0x1c44 +#define QUEUE_CONTROL_REGISTER_CPU_SIDE 0x1c50 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define QUEUE_BASE_ADDRESS_REGISTER_CPU_SIDE 0x1c54 +#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c60 +#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c64 +#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c68 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c6c +#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c70 +#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c74 +#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU_SIDE 0x1c78 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU_SIDE 0x1c7c +#define GT_CPU_ENDIAN_SHF 12 +#define GT_CPU_ENDIAN_MSK (MSK(1) << GT_CPU_ENDIAN_SHF) +#define GT_CPU_ENDIAN_BIT GT_CPU_ENDIAN_MSK +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_CPU_WR_SHF 16 +#define GT_CPU_WR_MSK (MSK(1) << GT_CPU_WR_SHF) +#define GT_CPU_WR_BIT GT_CPU_WR_MSK +#define GT_CPU_WR_DXDXDXDX 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_CPU_WR_DDDD 1 +#define GT_PCI_DCRM_SHF 21 +#define GT_PCI_LD_SHF 0 +#define GT_PCI_LD_MSK (MSK(15) << GT_PCI_LD_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI_HD_SHF 0 +#define GT_PCI_HD_MSK (MSK(7) << GT_PCI_HD_SHF) +#define GT_PCI_REMAP_SHF 0 +#define GT_PCI_REMAP_MSK (MSK(11) << GT_PCI_REMAP_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_CFGADDR_CFGEN_SHF 31 +#define GT_CFGADDR_CFGEN_MSK (MSK(1) << GT_CFGADDR_CFGEN_SHF) +#define GT_CFGADDR_CFGEN_BIT GT_CFGADDR_CFGEN_MSK +#define GT_CFGADDR_BUSNUM_SHF 16 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_CFGADDR_BUSNUM_MSK (MSK(8) << GT_CFGADDR_BUSNUM_SHF) +#define GT_CFGADDR_DEVNUM_SHF 11 +#define GT_CFGADDR_DEVNUM_MSK (MSK(5) << GT_CFGADDR_DEVNUM_SHF) +#define GT_CFGADDR_FUNCNUM_SHF 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_CFGADDR_FUNCNUM_MSK (MSK(3) << GT_CFGADDR_FUNCNUM_SHF) +#define GT_CFGADDR_REGNUM_SHF 2 +#define GT_CFGADDR_REGNUM_MSK (MSK(6) << GT_CFGADDR_REGNUM_SHF) +#define GT_SDRAM_BM_ORDER_SHF 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_BM_ORDER_MSK (MSK(1) << GT_SDRAM_BM_ORDER_SHF) +#define GT_SDRAM_BM_ORDER_BIT GT_SDRAM_BM_ORDER_MSK +#define GT_SDRAM_BM_ORDER_SUB 1 +#define GT_SDRAM_BM_ORDER_LIN 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_BM_RSVD_ALL1 0xffb +#define GT_SDRAM_ADDRDECODE_ADDR_SHF 0 +#define GT_SDRAM_ADDRDECODE_ADDR_MSK (MSK(3) << GT_SDRAM_ADDRDECODE_ADDR_SHF) +#define GT_SDRAM_ADDRDECODE_ADDR_0 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_ADDRDECODE_ADDR_1 1 +#define GT_SDRAM_ADDRDECODE_ADDR_2 2 +#define GT_SDRAM_ADDRDECODE_ADDR_3 3 +#define GT_SDRAM_ADDRDECODE_ADDR_4 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_ADDRDECODE_ADDR_5 5 +#define GT_SDRAM_ADDRDECODE_ADDR_6 6 +#define GT_SDRAM_ADDRDECODE_ADDR_7 7 +#define GT_SDRAM_B0_CASLAT_SHF 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_B0_CASLAT_MSK (MSK(2) << GT_SDRAM_B0__SHF) +#define GT_SDRAM_B0_CASLAT_2 1 +#define GT_SDRAM_B0_CASLAT_3 2 +#define GT_SDRAM_B0_FTDIS_SHF 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_B0_FTDIS_MSK (MSK(1) << GT_SDRAM_B0_FTDIS_SHF) +#define GT_SDRAM_B0_FTDIS_BIT GT_SDRAM_B0_FTDIS_MSK +#define GT_SDRAM_B0_SRASPRCHG_SHF 3 +#define GT_SDRAM_B0_SRASPRCHG_MSK (MSK(1) << GT_SDRAM_B0_SRASPRCHG_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_B0_SRASPRCHG_BIT GT_SDRAM_B0_SRASPRCHG_MSK +#define GT_SDRAM_B0_SRASPRCHG_2 0 +#define GT_SDRAM_B0_SRASPRCHG_3 1 +#define GT_SDRAM_B0_B0COMPAB_SHF 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_B0_B0COMPAB_MSK (MSK(1) << GT_SDRAM_B0_B0COMPAB_SHF) +#define GT_SDRAM_B0_B0COMPAB_BIT GT_SDRAM_B0_B0COMPAB_MSK +#define GT_SDRAM_B0_64BITINT_SHF 5 +#define GT_SDRAM_B0_64BITINT_MSK (MSK(1) << GT_SDRAM_B0_64BITINT_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_B0_64BITINT_BIT GT_SDRAM_B0_64BITINT_MSK +#define GT_SDRAM_B0_64BITINT_2 0 +#define GT_SDRAM_B0_64BITINT_4 1 +#define GT_SDRAM_B0_BW_SHF 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_B0_BW_MSK (MSK(1) << GT_SDRAM_B0_BW_SHF) +#define GT_SDRAM_B0_BW_BIT GT_SDRAM_B0_BW_MSK +#define GT_SDRAM_B0_BW_32 0 +#define GT_SDRAM_B0_BW_64 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_B0_BLODD_SHF 7 +#define GT_SDRAM_B0_BLODD_MSK (MSK(1) << GT_SDRAM_B0_BLODD_SHF) +#define GT_SDRAM_B0_BLODD_BIT GT_SDRAM_B0_BLODD_MSK +#define GT_SDRAM_B0_PAR_SHF 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_B0_PAR_MSK (MSK(1) << GT_SDRAM_B0_PAR_SHF) +#define GT_SDRAM_B0_PAR_BIT GT_SDRAM_B0_PAR_MSK +#define GT_SDRAM_B0_BYPASS_SHF 9 +#define GT_SDRAM_B0_BYPASS_MSK (MSK(1) << GT_SDRAM_B0_BYPASS_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_B0_BYPASS_BIT GT_SDRAM_B0_BYPASS_MSK +#define GT_SDRAM_B0_SRAS2SCAS_SHF 10 +#define GT_SDRAM_B0_SRAS2SCAS_MSK (MSK(1) << GT_SDRAM_B0_SRAS2SCAS_SHF) +#define GT_SDRAM_B0_SRAS2SCAS_BIT GT_SDRAM_B0_SRAS2SCAS_MSK +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_B0_SRAS2SCAS_2 0 +#define GT_SDRAM_B0_SRAS2SCAS_3 1 +#define GT_SDRAM_B0_SIZE_SHF 11 +#define GT_SDRAM_B0_SIZE_MSK (MSK(1) << GT_SDRAM_B0_SIZE_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_B0_SIZE_BIT GT_SDRAM_B0_SIZE_MSK +#define GT_SDRAM_B0_SIZE_16M 0 +#define GT_SDRAM_B0_SIZE_64M 1 +#define GT_SDRAM_B0_EXTPAR_SHF 12 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_B0_EXTPAR_MSK (MSK(1) << GT_SDRAM_B0_EXTPAR_SHF) +#define GT_SDRAM_B0_EXTPAR_BIT GT_SDRAM_B0_EXTPAR_MSK +#define GT_SDRAM_B0_BLEN_SHF 13 +#define GT_SDRAM_B0_BLEN_MSK (MSK(1) << GT_SDRAM_B0_BLEN_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_B0_BLEN_BIT GT_SDRAM_B0_BLEN_MSK +#define GT_SDRAM_B0_BLEN_8 0 +#define GT_SDRAM_B0_BLEN_4 1 +#define GT_SDRAM_CFG_REFINT_SHF 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_CFG_REFINT_MSK (MSK(14) << GT_SDRAM_CFG_REFINT_SHF) +#define GT_SDRAM_CFG_NINTERLEAVE_SHF 14 +#define GT_SDRAM_CFG_NINTERLEAVE_MSK (MSK(1) << GT_SDRAM_CFG_NINTERLEAVE_SHF) +#define GT_SDRAM_CFG_NINTERLEAVE_BIT GT_SDRAM_CFG_NINTERLEAVE_MSK +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_CFG_RMW_SHF 15 +#define GT_SDRAM_CFG_RMW_MSK (MSK(1) << GT_SDRAM_CFG_RMW_SHF) +#define GT_SDRAM_CFG_RMW_BIT GT_SDRAM_CFG_RMW_MSK +#define GT_SDRAM_CFG_NONSTAGREF_SHF 16 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_CFG_NONSTAGREF_MSK (MSK(1) << GT_SDRAM_CFG_NONSTAGREF_SHF) +#define GT_SDRAM_CFG_NONSTAGREF_BIT GT_SDRAM_CFG_NONSTAGREF_MSK +#define GT_SDRAM_CFG_DUPCNTL_SHF 19 +#define GT_SDRAM_CFG_DUPCNTL_MSK (MSK(1) << GT_SDRAM_CFG_DUPCNTL_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_CFG_DUPCNTL_BIT GT_SDRAM_CFG_DUPCNTL_MSK +#define GT_SDRAM_CFG_DUPBA_SHF 20 +#define GT_SDRAM_CFG_DUPBA_MSK (MSK(1) << GT_SDRAM_CFG_DUPBA_SHF) +#define GT_SDRAM_CFG_DUPBA_BIT GT_SDRAM_CFG_DUPBA_MSK +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_CFG_DUPEOT0_SHF 21 +#define GT_SDRAM_CFG_DUPEOT0_MSK (MSK(1) << GT_SDRAM_CFG_DUPEOT0_SHF) +#define GT_SDRAM_CFG_DUPEOT0_BIT GT_SDRAM_CFG_DUPEOT0_MSK +#define GT_SDRAM_CFG_DUPEOT1_SHF 22 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_CFG_DUPEOT1_MSK (MSK(1) << GT_SDRAM_CFG_DUPEOT1_SHF) +#define GT_SDRAM_CFG_DUPEOT1_BIT GT_SDRAM_CFG_DUPEOT1_MSK +#define GT_SDRAM_OPMODE_OP_SHF 0 +#define GT_SDRAM_OPMODE_OP_MSK (MSK(3) << GT_SDRAM_OPMODE_OP_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_OPMODE_OP_NORMAL 0 +#define GT_SDRAM_OPMODE_OP_NOP 1 +#define GT_SDRAM_OPMODE_OP_PRCHG 2 +#define GT_SDRAM_OPMODE_OP_MODE 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_SDRAM_OPMODE_OP_CBR 4 +#define GT_TC_CONTROL_ENTC0_SHF 0 +#define GT_TC_CONTROL_ENTC0_MSK (MSK(1) << GT_TC_CONTROL_ENTC0_SHF) +#define GT_TC_CONTROL_ENTC0_BIT GT_TC_CONTROL_ENTC0_MSK +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_TC_CONTROL_SELTC0_SHF 1 +#define GT_TC_CONTROL_SELTC0_MSK (MSK(1) << GT_TC_CONTROL_SELTC0_SHF) +#define GT_TC_CONTROL_SELTC0_BIT GT_TC_CONTROL_SELTC0_MSK +#define GT_PCI0_BARE_SWSCS3BOOTDIS_SHF 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_BARE_SWSCS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS3BOOTDIS_SHF) +#define GT_PCI0_BARE_SWSCS3BOOTDIS_BIT GT_PCI0_BARE_SWSCS3BOOTDIS_MSK +#define GT_PCI0_BARE_SWSCS32DIS_SHF 1 +#define GT_PCI0_BARE_SWSCS32DIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS32DIS_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_BARE_SWSCS32DIS_BIT GT_PCI0_BARE_SWSCS32DIS_MSK +#define GT_PCI0_BARE_SWSCS10DIS_SHF 2 +#define GT_PCI0_BARE_SWSCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SWSCS10DIS_SHF) +#define GT_PCI0_BARE_SWSCS10DIS_BIT GT_PCI0_BARE_SWSCS10DIS_MSK +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_BARE_INTIODIS_SHF 3 +#define GT_PCI0_BARE_INTIODIS_MSK (MSK(1) << GT_PCI0_BARE_INTIODIS_SHF) +#define GT_PCI0_BARE_INTIODIS_BIT GT_PCI0_BARE_INTIODIS_MSK +#define GT_PCI0_BARE_INTMEMDIS_SHF 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_BARE_INTMEMDIS_MSK (MSK(1) << GT_PCI0_BARE_INTMEMDIS_SHF) +#define GT_PCI0_BARE_INTMEMDIS_BIT GT_PCI0_BARE_INTMEMDIS_MSK +#define GT_PCI0_BARE_CS3BOOTDIS_SHF 5 +#define GT_PCI0_BARE_CS3BOOTDIS_MSK (MSK(1) << GT_PCI0_BARE_CS3BOOTDIS_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_BARE_CS3BOOTDIS_BIT GT_PCI0_BARE_CS3BOOTDIS_MSK +#define GT_PCI0_BARE_CS20DIS_SHF 6 +#define GT_PCI0_BARE_CS20DIS_MSK (MSK(1) << GT_PCI0_BARE_CS20DIS_SHF) +#define GT_PCI0_BARE_CS20DIS_BIT GT_PCI0_BARE_CS20DIS_MSK +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_BARE_SCS32DIS_SHF 7 +#define GT_PCI0_BARE_SCS32DIS_MSK (MSK(1) << GT_PCI0_BARE_SCS32DIS_SHF) +#define GT_PCI0_BARE_SCS32DIS_BIT GT_PCI0_BARE_SCS32DIS_MSK +#define GT_PCI0_BARE_SCS10DIS_SHF 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_BARE_SCS10DIS_MSK (MSK(1) << GT_PCI0_BARE_SCS10DIS_SHF) +#define GT_PCI0_BARE_SCS10DIS_BIT GT_PCI0_BARE_SCS10DIS_MSK +#define GT_INTRCAUSE_MASABORT0_SHF 18 +#define GT_INTRCAUSE_MASABORT0_MSK (MSK(1) << GT_INTRCAUSE_MASABORT0_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_INTRCAUSE_MASABORT0_BIT GT_INTRCAUSE_MASABORT0_MSK +#define GT_INTRCAUSE_TARABORT0_SHF 19 +#define GT_INTRCAUSE_TARABORT0_MSK (MSK(1) << GT_INTRCAUSE_TARABORT0_SHF) +#define GT_INTRCAUSE_TARABORT0_BIT GT_INTRCAUSE_TARABORT0_MSK +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_CFGADDR_REGNUM_SHF 2 +#define GT_PCI0_CFGADDR_REGNUM_MSK (MSK(6) << GT_PCI0_CFGADDR_REGNUM_SHF) +#define GT_PCI0_CFGADDR_FUNCTNUM_SHF 8 +#define GT_PCI0_CFGADDR_FUNCTNUM_MSK (MSK(3) << GT_PCI0_CFGADDR_FUNCTNUM_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_CFGADDR_DEVNUM_SHF 11 +#define GT_PCI0_CFGADDR_DEVNUM_MSK (MSK(5) << GT_PCI0_CFGADDR_DEVNUM_SHF) +#define GT_PCI0_CFGADDR_BUSNUM_SHF 16 +#define GT_PCI0_CFGADDR_BUSNUM_MSK (MSK(8) << GT_PCI0_CFGADDR_BUSNUM_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_CFGADDR_CONFIGEN_SHF 31 +#define GT_PCI0_CFGADDR_CONFIGEN_MSK (MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF) +#define GT_PCI0_CFGADDR_CONFIGEN_BIT GT_PCI0_CFGADDR_CONFIGEN_MSK +#define GT_PCI0_CMD_MBYTESWAP_SHF 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_CMD_MBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF) +#define GT_PCI0_CMD_MBYTESWAP_BIT GT_PCI0_CMD_MBYTESWAP_MSK +#define GT_PCI0_CMD_MWORDSWAP_SHF 10 +#define GT_PCI0_CMD_MWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_MWORDSWAP_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_CMD_MWORDSWAP_BIT GT_PCI0_CMD_MWORDSWAP_MSK +#define GT_PCI0_CMD_SBYTESWAP_SHF 16 +#define GT_PCI0_CMD_SBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_SBYTESWAP_SHF) +#define GT_PCI0_CMD_SBYTESWAP_BIT GT_PCI0_CMD_SBYTESWAP_MSK +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_PCI0_CMD_SWORDSWAP_SHF 11 +#define GT_PCI0_CMD_SWORDSWAP_MSK (MSK(1) << GT_PCI0_CMD_SWORDSWAP_SHF) +#define GT_PCI0_CMD_SWORDSWAP_BIT GT_PCI0_CMD_SWORDSWAP_MSK +#define GT_INTR_T0EXP_SHF 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_INTR_T0EXP_MSK (MSK(1) << GT_INTR_T0EXP_SHF) +#define GT_INTR_T0EXP_BIT GT_INTR_T0EXP_MSK +#define GT_INTR_RETRYCTR0_SHF 20 +#define GT_INTR_RETRYCTR0_MSK (MSK(1) << GT_INTR_RETRYCTR0_SHF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_INTR_RETRYCTR0_BIT GT_INTR_RETRYCTR0_MSK +#define GT_DEF_PCI0_IO_BASE 0x10000000UL +#define GT_DEF_PCI0_IO_SIZE 0x02000000UL +#define GT_DEF_PCI0_MEM0_BASE 0x12000000UL +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_DEF_PCI0_MEM0_SIZE 0x02000000UL +#define GT_DEF_BASE 0x14000000UL +#define GT_MAX_BANKSIZE (256 * 1024 * 1024) +#define GT_LATTIM_MIN 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <mach-gt64120.h> +#define __GT_READ(ofs) (*(volatile u32 *)(GT64120_BASE+(ofs))) +#define __GT_WRITE(ofs, data) do { *(volatile u32 *)(GT64120_BASE+(ofs)) = (data); } while (0) +#define GT_READ(ofs) le32_to_cpu(__GT_READ(ofs)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT_WRITE(ofs, data) __GT_WRITE(ofs, cpu_to_le32(data)) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/hardirq.h b/9/platforms/android-16/arch-mips/usr/include/asm/hardirq.h new file mode 100644 index 0000000..f3a05b4 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/hardirq.h @@ -0,0 +1,29 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_HARDIRQ_H +#define _ASM_HARDIRQ_H +#include <linux/threads.h> +#include <linux/irq.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef struct { + unsigned int __softirq_pending; +} ____cacheline_aligned irq_cpustat_t; +#include <linux/irq_cpustat.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/hazards.h b/9/platforms/android-16/arch-mips/usr/include/asm/hazards.h new file mode 100644 index 0000000..dc6b205 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/hazards.h @@ -0,0 +1,30 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_HAZARDS_H +#define _ASM_HAZARDS_H +#ifdef __ASSEMBLY__ +#define ASMMACRO(name, code...) .macro name; code; .endm +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#else +#include <asm/cpu-features.h> +#define ASMMACRO(name, code...) __asm__(".macro " #name "; " #code "; .endm"); static inline void name(void) { __asm__ __volatile__ (#name); } +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define instruction_hazard() do { } while (0) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/hw_irq.h b/9/platforms/android-16/arch-mips/usr/include/asm/hw_irq.h new file mode 100644 index 0000000..60f0e7b --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/hw_irq.h @@ -0,0 +1,23 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_HW_IRQ_H +#define __ASM_HW_IRQ_H +#include <asm/atomic.h> +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/i8253.h b/9/platforms/android-16/arch-mips/usr/include/asm/i8253.h new file mode 100644 index 0000000..735d79f --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/i8253.h @@ -0,0 +1,28 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_I8253_H +#define __ASM_I8253_H +#include <linux/spinlock.h> +#define PIT_MODE 0x43 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PIT_CH0 0x40 +#define PIT_CH2 0x42 +#define PIT_TICK_RATE 1193182UL +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/i8259.h b/9/platforms/android-16/arch-mips/usr/include/asm/i8259.h new file mode 100644 index 0000000..a78521b --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/i8259.h @@ -0,0 +1,40 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_I8259_H +#define _ASM_I8259_H +#include <linux/compiler.h> +#include <linux/spinlock.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/io.h> +#include <irq.h> +#define PIC_MASTER_CMD 0x20 +#define PIC_MASTER_IMR 0x21 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PIC_MASTER_ISR PIC_MASTER_CMD +#define PIC_MASTER_POLL PIC_MASTER_ISR +#define PIC_MASTER_OCW3 PIC_MASTER_ISR +#define PIC_SLAVE_CMD 0xa0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PIC_SLAVE_IMR 0xa1 +#define PIC_CASCADE_IR 2 +#define MASTER_ICW4_DEFAULT 0x01 +#define SLAVE_ICW4_DEFAULT 0x01 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PIC_ICW4_AEOI 2 +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/ide.h b/9/platforms/android-16/arch-mips/usr/include/asm/ide.h new file mode 100644 index 0000000..aa45292 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/ide.h @@ -0,0 +1,23 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_IDE_H +#define __ASM_IDE_H +#include <ide.h> +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/io.h b/9/platforms/android-16/arch-mips/usr/include/asm/io.h new file mode 100644 index 0000000..b30e51a --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/io.h @@ -0,0 +1,113 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_IO_H +#define _ASM_IO_H +#include <linux/compiler.h> +#include <linux/kernel.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <linux/types.h> +#include <asm/addrspace.h> +#include <asm/byteorder.h> +#include <asm/cpu.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/cpu-features.h> +#include <asm-generic/iomap.h> +#include <asm/page.h> +#include <asm/pgtable-bits.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/processor.h> +#include <asm/string.h> +#include <ioremap.h> +#include <mangle-port.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#undef CONF_SLOWDOWN_IO +#define __raw_ioswabb(a, x) (x) +#define __raw_ioswabw(a, x) (x) +#define __raw_ioswabl(a, x) (x) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __raw_ioswabq(a, x) (x) +#define ____raw_ioswabq(a, x) (x) +#define IO_SPACE_LIMIT 0xffff +#define __SLOW_DOWN_IO __asm__ __volatile__( "sb\t$0,0x80(%0)" : : "r" (mips_io_port_base)); +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifdef CONF_SLOWDOWN_IO +#ifdef REALLY_SLOW_IO +#define SLOW_DOWN_IO { __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; } +#else +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SLOW_DOWN_IO __SLOW_DOWN_IO +#endif +#else +#define SLOW_DOWN_IO +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define isa_page_to_bus page_to_phys +#define virt_to_bus virt_to_phys +#define bus_to_virt phys_to_virt +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) +#define __IS_LOW512(addr) (!((phys_t)(addr) & (phys_t) ~0x1fffffffULL)) +#undef __IS_LOW512 +#define ioremap(offset, size) __ioremap_mode((offset), (size), _CACHE_UNCACHED) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ioremap_nocache(offset, size) __ioremap_mode((offset), (size), _CACHE_UNCACHED) +#define ioremap_cachable(offset, size) __ioremap_mode((offset), (size), _page_cachable_default) +#define ioremap_cacheable_cow(offset, size) __ioremap_mode((offset), (size), _CACHE_CACHABLE_COW) +#define ioremap_uncached_accelerated(offset, size) __ioremap_mode((offset), (size), _CACHE_UNCACHED_ACCELERATED) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __IS_KSEG1(addr) (((unsigned long)(addr) & ~0x1fffffffUL) == CKSEG1) +#undef __IS_KSEG1 +#define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) static inline void pfx##write##bwlq(type val, volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); __val = pfx##ioswab##bwlq(__mem, val); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) *__mem = __val; else if (cpu_has_64bits) { unsigned long __flags; type __tmp; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __writeq""\n\t" "dsll32 %L0, %L0, 0" "\n\t" "dsrl32 %L0, %L0, 0" "\n\t" "dsll32 %M0, %M0, 0" "\n\t" "or %L0, %L0, %M0" "\n\t" "sd %L0, %2" "\n\t" ".set mips0" "\n" : "=r" (__tmp) : "0" (__val), "m" (*__mem)); if (irq) local_irq_restore(__flags); } else BUG(); } static inline type pfx##read##bwlq(const volatile void __iomem *mem) { volatile type *__mem; type __val; __mem = (void *)__swizzle_addr_##bwlq((unsigned long)(mem)); if (sizeof(type) != sizeof(u64) || sizeof(u64) == sizeof(long)) __val = *__mem; else if (cpu_has_64bits) { unsigned long __flags; if (irq) local_irq_save(__flags); __asm__ __volatile__( ".set mips3" "\t\t# __readq" "\n\t" "ld %L0, %1" "\n\t" "dsra32 %M0, %L0, 0" "\n\t" "sll %L0, %L0, 0" "\n\t" ".set mips0" "\n" : "=r" (__val) : "m" (*__mem)); if (irq) local_irq_restore(__flags); } else { __val = 0; BUG(); } return pfx##ioswab##bwlq(__mem, __val); } +#define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, p, slow) static inline void pfx##out##bwlq##p(type val, unsigned long port) { volatile type *__addr; type __val; __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); __val = pfx##ioswab##bwlq(__addr, val); BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); *__addr = __val; slow; } static inline type pfx##in##bwlq##p(unsigned long port) { volatile type *__addr; type __val; __addr = (void *)__swizzle_addr_##bwlq(mips_io_port_base + port); BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); __val = *__addr; slow; return pfx##ioswab##bwlq(__addr, __val); } +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __BUILD_MEMORY_PFX(bus, bwlq, type) __BUILD_MEMORY_SINGLE(bus, bwlq, type, 1) +#define BUILDIO_MEM(bwlq, type) __BUILD_MEMORY_PFX(__raw_, bwlq, type) __BUILD_MEMORY_PFX(, bwlq, type) __BUILD_MEMORY_PFX(__mem_, bwlq, type) +#define __BUILD_IOPORT_PFX(bus, bwlq, type) __BUILD_IOPORT_SINGLE(bus, bwlq, type, ,) __BUILD_IOPORT_SINGLE(bus, bwlq, type, _p, SLOW_DOWN_IO) +#define BUILDIO_IOPORT(bwlq, type) __BUILD_IOPORT_PFX(, bwlq, type) __BUILD_IOPORT_PFX(__mem_, bwlq, type) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __BUILDIO(bwlq, type) __BUILD_MEMORY_SINGLE(____raw_, bwlq, type, 0) +#define readb_relaxed readb +#define readw_relaxed readw +#define readl_relaxed readl +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define readq_relaxed readq +#define readq readq +#define writeq writeq +#define __BUILD_MEMORY_STRING(bwlq, type) static inline void writes##bwlq(volatile void __iomem *mem, const void *addr, unsigned int count) { const volatile type *__addr = addr; while (count--) { __mem_write##bwlq(*__addr, mem); __addr++; } } static inline void reads##bwlq(volatile void __iomem *mem, void *addr, unsigned int count) { volatile type *__addr = addr; while (count--) { *__addr = __mem_read##bwlq(mem); __addr++; } } +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __BUILD_IOPORT_STRING(bwlq, type) static inline void outs##bwlq(unsigned long port, const void *addr, unsigned int count) { const volatile type *__addr = addr; while (count--) { __mem_out##bwlq(*__addr, port); __addr++; } } static inline void ins##bwlq(unsigned long port, void *addr, unsigned int count) { volatile type *__addr = addr; while (count--) { *__addr = __mem_in##bwlq(port); __addr++; } } +#define BUILDSTRING(bwlq, type) __BUILD_MEMORY_STRING(bwlq, type) __BUILD_IOPORT_STRING(bwlq, type) +#define mmiowb() asm volatile ("sync" ::: "memory") +#define dma_cache_wback_inv(start,size) do { (void) (start); (void) (size); } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define dma_cache_wback(start,size) do { (void) (start); (void) (size); } while (0) +#define dma_cache_inv(start,size) do { (void) (start); (void) (size); } while (0) +#ifdef __MIPSEB__ +#define __CSR_32_ADJUST 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#else +#define __CSR_32_ADJUST 0 +#endif +#define csr_out32(v, a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST) = (v)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define csr_in32(a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST)) +#define xlate_dev_mem_ptr(p) __va(p) +#define xlate_dev_kmem_ptr(p) p +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/ioctl.h b/9/platforms/android-16/arch-mips/usr/include/asm/ioctl.h new file mode 100644 index 0000000..09dd951 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/ioctl.h @@ -0,0 +1,69 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_IOCTL_H +#define _ASM_IOCTL_H +#define _IOC_NRBITS 8 +#define _IOC_TYPEBITS 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _IOC_SIZEBITS 13 +#define _IOC_DIRBITS 3 +#define _IOC_NRMASK ((1 << _IOC_NRBITS)-1) +#define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1) +#define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1) +#define _IOC_NRSHIFT 0 +#define _IOC_TYPESHIFT (_IOC_NRSHIFT+_IOC_NRBITS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _IOC_SIZESHIFT (_IOC_TYPESHIFT+_IOC_TYPEBITS) +#define _IOC_DIRSHIFT (_IOC_SIZESHIFT+_IOC_SIZEBITS) +#define _IOC_NONE 1U +#define _IOC_READ 2U +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _IOC_WRITE 4U +#define _IOC_VOID 0x20000000 +#define _IOC_OUT 0x40000000 +#define _IOC_IN 0x80000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _IOC_INOUT (IOC_IN|IOC_OUT) +#define _IOC(dir, type, nr, size) (((dir) << _IOC_DIRSHIFT) | ((type) << _IOC_TYPESHIFT) | ((nr) << _IOC_NRSHIFT) | ((size) << _IOC_SIZESHIFT)) +extern unsigned int __invalid_size_argument_for_IOC; +#define _IOC_TYPECHECK(t) ((sizeof(t) == sizeof(t[1]) && sizeof(t) < (1 << _IOC_SIZEBITS)) ? sizeof(t) : __invalid_size_argument_for_IOC) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _IO(type, nr) _IOC(_IOC_NONE, (type), (nr), 0) +#define _IOR(type, nr, size) _IOC(_IOC_READ, (type), (nr), (_IOC_TYPECHECK(size))) +#define _IOW(type, nr, size) _IOC(_IOC_WRITE, (type), (nr), (_IOC_TYPECHECK(size))) +#define _IOWR(type, nr, size) _IOC(_IOC_READ|_IOC_WRITE, (type), (nr), (_IOC_TYPECHECK(size))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _IOR_BAD(type, nr, size) _IOC(_IOC_READ, (type), (nr), sizeof(size)) +#define _IOW_BAD(type, nr, size) _IOC(_IOC_WRITE, (type), (nr), sizeof(size)) +#define _IOWR_BAD(type, nr, size) _IOC(_IOC_READ|_IOC_WRITE, (type), (nr), sizeof(size)) +#define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK) +#define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) +#define _IOC_SIZE(nr) (((nr) >> _IOC_SIZESHIFT) & _IOC_SIZEMASK) +#define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT) +#define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT) +#define IOCSIZE_MASK (_IOC_SIZEMASK << _IOC_SIZESHIFT) +#define IOCSIZE_SHIFT (_IOC_SIZESHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/ioctls.h b/9/platforms/android-16/arch-mips/usr/include/asm/ioctls.h new file mode 100644 index 0000000..20a02e8 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/ioctls.h @@ -0,0 +1,118 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_IOCTLS_H +#define __ASM_IOCTLS_H +#include <asm/ioctl.h> +#define TCGETA 0x5401 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TCSETA 0x5402 +#define TCSETAW 0x5403 +#define TCSETAF 0x5404 +#define TCSBRK 0x5405 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TCXONC 0x5406 +#define TCFLSH 0x5407 +#define TCGETS 0x540d +#define TCSETS 0x540e +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TCSETSW 0x540f +#define TCSETSF 0x5410 +#define TIOCEXCL 0x740d +#define TIOCNXCL 0x740e +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCOUTQ 0x7472 +#define TIOCSTI 0x5472 +#define TIOCMGET 0x741d +#define TIOCMBIS 0x741b +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCMBIC 0x741c +#define TIOCMSET 0x741a +#define TIOCPKT 0x5470 +#define TIOCPKT_DATA 0x00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCPKT_FLUSHREAD 0x01 +#define TIOCPKT_FLUSHWRITE 0x02 +#define TIOCPKT_STOP 0x04 +#define TIOCPKT_START 0x08 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCPKT_NOSTOP 0x10 +#define TIOCPKT_DOSTOP 0x20 +#define TIOCSWINSZ _IOW('t', 103, struct winsize) +#define TIOCGWINSZ _IOR('t', 104, struct winsize) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCNOTTY 0x5471 +#define TIOCSETD 0x7401 +#define TIOCGETD 0x7400 +#define FIOCLEX 0x6601 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FIONCLEX 0x6602 +#define FIOASYNC 0x667d +#define FIONBIO 0x667e +#define FIOQSIZE 0x667f +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCGLTC 0x7474 +#define TIOCSLTC 0x7475 +#define TIOCSPGRP _IOW('t', 118, int) +#define TIOCGPGRP _IOR('t', 119, int) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCCONS _IOW('t', 120, int) +#define FIONREAD 0x467f +#define TIOCINQ FIONREAD +#define TIOCGETP 0x7408 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCSETP 0x7409 +#define TIOCSETN 0x740a +#define TIOCSBRK 0x5427 +#define TIOCCBRK 0x5428 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCGSID 0x7416 +#define TCGETS2 _IOR('T', 0x2A, struct termios2) +#define TCSETS2 _IOW('T', 0x2B, struct termios2) +#define TCSETSW2 _IOW('T', 0x2C, struct termios2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TCSETSF2 _IOW('T', 0x2D, struct termios2) +#define TIOCGPTN _IOR('T', 0x30, unsigned int) +#define TIOCSPTLCK _IOW('T', 0x31, int) +#define TIOCSCTTY 0x5480 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCGSOFTCAR 0x5481 +#define TIOCSSOFTCAR 0x5482 +#define TIOCLINUX 0x5483 +#define TIOCGSERIAL 0x5484 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCSSERIAL 0x5485 +#define TCSBRKP 0x5486 +#define TIOCSERCONFIG 0x5488 +#define TIOCSERGWILD 0x5489 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCSERSWILD 0x548a +#define TIOCGLCKTRMIOS 0x548b +#define TIOCSLCKTRMIOS 0x548c +#define TIOCSERGSTRUCT 0x548d +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCSERGETLSR 0x548e +#define TIOCSERGETMULTI 0x548f +#define TIOCSERSETMULTI 0x5490 +#define TIOCMIWAIT 0x5491 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCGICOUNT 0x5492 +#define TIOCGHAYESESP 0x5493 +#define TIOCSHAYESESP 0x5494 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/ip32/crime.h b/9/platforms/android-16/arch-mips/usr/include/asm/ip32/crime.h new file mode 100644 index 0000000..a979708 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/ip32/crime.h @@ -0,0 +1,171 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_CRIME_H__ +#define __ASM_CRIME_H__ +#define CRIME_BASE 0x14000000 +struct sgi_crime { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long id; +#define CRIME_ID_MASK 0xff +#define CRIME_ID_IDBITS 0xf0 +#define CRIME_ID_IDVALUE 0xa0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_ID_REV 0x0f +#define CRIME_REV_PETTY 0x00 +#define CRIME_REV_11 0x11 +#define CRIME_REV_13 0x13 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_REV_14 0x14 + volatile unsigned long control; +#define CRIME_CONTROL_MASK 0x3fff +#define CRIME_CONTROL_TRITON_SYSADC 0x2000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_CONTROL_CRIME_SYSADC 0x1000 +#define CRIME_CONTROL_HARD_RESET 0x0800 +#define CRIME_CONTROL_SOFT_RESET 0x0400 +#define CRIME_CONTROL_DOG_ENA 0x0200 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_CONTROL_ENDIANESS 0x0100 +#define CRIME_CONTROL_ENDIAN_BIG 0x0100 +#define CRIME_CONTROL_ENDIAN_LITTLE 0x0000 +#define CRIME_CONTROL_CQUEUE_HWM 0x000f +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_CONTROL_CQUEUE_SHFT 0 +#define CRIME_CONTROL_WBUF_HWM 0x00f0 +#define CRIME_CONTROL_WBUF_SHFT 8 + volatile unsigned long istat; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long imask; + volatile unsigned long soft_int; + volatile unsigned long hard_int; +#define MACE_VID_IN1_INT BIT(0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACE_VID_IN2_INT BIT(1) +#define MACE_VID_OUT_INT BIT(2) +#define MACE_ETHERNET_INT BIT(3) +#define MACE_SUPERIO_INT BIT(4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACE_MISC_INT BIT(5) +#define MACE_AUDIO_INT BIT(6) +#define MACE_PCI_BRIDGE_INT BIT(7) +#define MACEPCI_SCSI0_INT BIT(8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_SCSI1_INT BIT(9) +#define MACEPCI_SLOT0_INT BIT(10) +#define MACEPCI_SLOT1_INT BIT(11) +#define MACEPCI_SLOT2_INT BIT(12) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_SHARED0_INT BIT(13) +#define MACEPCI_SHARED1_INT BIT(14) +#define MACEPCI_SHARED2_INT BIT(15) +#define CRIME_GBE0_INT BIT(16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_GBE1_INT BIT(17) +#define CRIME_GBE2_INT BIT(18) +#define CRIME_GBE3_INT BIT(19) +#define CRIME_CPUERR_INT BIT(20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_MEMERR_INT BIT(21) +#define CRIME_RE_EMPTY_E_INT BIT(22) +#define CRIME_RE_FULL_E_INT BIT(23) +#define CRIME_RE_IDLE_E_INT BIT(24) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_RE_EMPTY_L_INT BIT(25) +#define CRIME_RE_FULL_L_INT BIT(26) +#define CRIME_RE_IDLE_L_INT BIT(27) +#define CRIME_SOFT0_INT BIT(28) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_SOFT1_INT BIT(29) +#define CRIME_SOFT2_INT BIT(30) +#define CRIME_SYSCORERR_INT CRIME_SOFT2_INT +#define CRIME_VICE_INT BIT(31) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_MACE_INT_MASK 0x8f +#define CRIME_MACEISA_INT_MASK 0x70 +#define CRIME_MACEPCI_INT_MASK 0xff00 +#define CRIME_CRIME_INT_MASK 0xffff0000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long watchdog; +#define CRIME_DOG_POWER_ON_RESET 0x00010000 +#define CRIME_DOG_WARM_RESET 0x00080000 +#define CRIME_DOG_TIMEOUT (CRIME_DOG_POWER_ON_RESET|CRIME_DOG_WARM_RESET) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_DOG_VALUE 0x00007fff + volatile unsigned long timer; +#define CRIME_MASTER_FREQ 66666500 +#define CRIME_NS_PER_TICK 15 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long cpu_error_addr; +#define CRIME_CPU_ERROR_ADDR_MASK 0x3ffffffff + volatile unsigned long cpu_error_stat; +#define CRIME_CPU_ERROR_MASK 0x7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_CPU_ERROR_CPU_ILL_ADDR 0x4 +#define CRIME_CPU_ERROR_VICE_WRT_PRTY 0x2 +#define CRIME_CPU_ERROR_CPU_WRT_PRTY 0x1 + unsigned long _pad0[54]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long mc_ctrl; + volatile unsigned long bank_ctrl[8]; +#define CRIME_MEM_BANK_CONTROL_MASK 0x11f +#define CRIME_MEM_BANK_CONTROL_ADDR 0x01f +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_MEM_BANK_CONTROL_SDRAM_SIZE 0x100 +#define CRIME_MAXBANKS 8 + volatile unsigned long mem_ref_counter; +#define CRIME_MEM_REF_COUNTER_MASK 0x3ff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long mem_error_stat; +#define CRIME_MEM_ERROR_STAT_MASK 0x0ff7ffff +#define CRIME_MEM_ERROR_MACE_ID 0x0000007f +#define CRIME_MEM_ERROR_MACE_ACCESS 0x00000080 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_MEM_ERROR_RE_ID 0x00007f00 +#define CRIME_MEM_ERROR_RE_ACCESS 0x00008000 +#define CRIME_MEM_ERROR_GBE_ACCESS 0x00010000 +#define CRIME_MEM_ERROR_VICE_ACCESS 0x00020000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_MEM_ERROR_CPU_ACCESS 0x00040000 +#define CRIME_MEM_ERROR_RESERVED 0x00080000 +#define CRIME_MEM_ERROR_SOFT_ERR 0x00100000 +#define CRIME_MEM_ERROR_HARD_ERR 0x00200000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_MEM_ERROR_MULTIPLE 0x00400000 +#define CRIME_MEM_ERROR_ECC 0x01800000 +#define CRIME_MEM_ERROR_MEM_ECC_RD 0x00800000 +#define CRIME_MEM_ERROR_MEM_ECC_RMW 0x01000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRIME_MEM_ERROR_INV 0x0e000000 +#define CRIME_MEM_ERROR_INV_MEM_ADDR_RD 0x02000000 +#define CRIME_MEM_ERROR_INV_MEM_ADDR_WR 0x04000000 +#define CRIME_MEM_ERROR_INV_MEM_ADDR_RMW 0x08000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long mem_error_addr; +#define CRIME_MEM_ERROR_ADDR_MASK 0x3fffffff + volatile unsigned long mem_ecc_syn; +#define CRIME_MEM_ERROR_ECC_SYN_MASK 0xffffffff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long mem_ecc_chk; +#define CRIME_MEM_ERROR_ECC_CHK_MASK 0xffffffff + volatile unsigned long mem_ecc_repl; +#define CRIME_MEM_ERROR_ECC_REPL_MASK 0xffffffff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define CRIME_HI_MEM_BASE 0x40000000 +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/ip32/mace.h b/9/platforms/android-16/arch-mips/usr/include/asm/ip32/mace.h new file mode 100644 index 0000000..c2c149d --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/ip32/mace.h @@ -0,0 +1,351 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_MACE_H__ +#define __ASM_MACE_H__ +#define MACE_BASE 0x1f000000 +struct mace_pci { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned int error_addr; + volatile unsigned int error; +#define MACEPCI_ERROR_MASTER_ABORT BIT(31) +#define MACEPCI_ERROR_TARGET_ABORT BIT(30) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_ERROR_DATA_PARITY_ERR BIT(29) +#define MACEPCI_ERROR_RETRY_ERR BIT(28) +#define MACEPCI_ERROR_ILLEGAL_CMD BIT(27) +#define MACEPCI_ERROR_SYSTEM_ERR BIT(26) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_ERROR_INTERRUPT_TEST BIT(25) +#define MACEPCI_ERROR_PARITY_ERR BIT(24) +#define MACEPCI_ERROR_OVERRUN BIT(23) +#define MACEPCI_ERROR_RSVD BIT(22) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_ERROR_MEMORY_ADDR BIT(21) +#define MACEPCI_ERROR_CONFIG_ADDR BIT(20) +#define MACEPCI_ERROR_MASTER_ABORT_ADDR_VALID BIT(19) +#define MACEPCI_ERROR_TARGET_ABORT_ADDR_VALID BIT(18) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_ERROR_DATA_PARITY_ADDR_VALID BIT(17) +#define MACEPCI_ERROR_RETRY_ADDR_VALID BIT(16) +#define MACEPCI_ERROR_SIG_TABORT BIT(4) +#define MACEPCI_ERROR_DEVSEL_MASK 0xc0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_ERROR_DEVSEL_FAST 0 +#define MACEPCI_ERROR_DEVSEL_MED 0x40 +#define MACEPCI_ERROR_DEVSEL_SLOW 0x80 +#define MACEPCI_ERROR_FBB BIT(1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_ERROR_66MHZ BIT(0) + volatile unsigned int control; +#define MACEPCI_CONTROL_INT(x) BIT(x) +#define MACEPCI_CONTROL_INT_MASK 0xff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_CONTROL_SERR_ENA BIT(8) +#define MACEPCI_CONTROL_ARB_N6 BIT(9) +#define MACEPCI_CONTROL_PARITY_ERR BIT(10) +#define MACEPCI_CONTROL_MRMRA_ENA BIT(11) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_CONTROL_ARB_N3 BIT(12) +#define MACEPCI_CONTROL_ARB_N4 BIT(13) +#define MACEPCI_CONTROL_ARB_N5 BIT(14) +#define MACEPCI_CONTROL_PARK_LIU BIT(15) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_CONTROL_INV_INT(x) BIT(16+x) +#define MACEPCI_CONTROL_INV_INT_MASK 0x00ff0000 +#define MACEPCI_CONTROL_OVERRUN_INT BIT(24) +#define MACEPCI_CONTROL_PARITY_INT BIT(25) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_CONTROL_SERR_INT BIT(26) +#define MACEPCI_CONTROL_IT_INT BIT(27) +#define MACEPCI_CONTROL_RE_INT BIT(28) +#define MACEPCI_CONTROL_DPED_INT BIT(29) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_CONTROL_TAR_INT BIT(30) +#define MACEPCI_CONTROL_MAR_INT BIT(31) + volatile unsigned int rev; + unsigned int _pad[0xcf8/4 - 4]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned int config_addr; + union { + volatile unsigned char b[4]; + volatile unsigned short w[2]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned int l; + } config_data; +}; +#define MACEPCI_LOW_MEMORY 0x1a000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_LOW_IO 0x18000000 +#define MACEPCI_SWAPPED_VIEW 0 +#define MACEPCI_NATIVE_VIEW 0x40000000 +#define MACEPCI_IO 0x80000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPCI_HI_MEMORY 0x280000000 +#define MACEPCI_HI_IO 0x100000000 +struct mace_video { + unsigned long xxx; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct mace_ethernet { + volatile unsigned long mac_ctrl; + volatile unsigned long int_stat; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long dma_ctrl; + volatile unsigned long timer; + volatile unsigned long tx_int_al; + volatile unsigned long rx_int_al; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long tx_info; + volatile unsigned long tx_info_al; + volatile unsigned long rx_buff; + volatile unsigned long rx_buff_al1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long rx_buff_al2; + volatile unsigned long diag; + volatile unsigned long phy_data; + volatile unsigned long phy_regs; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long phy_trans_go; + volatile unsigned long backoff_seed; + volatile unsigned long imq_reserved[4]; + volatile unsigned long mac_addr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long mac_addr2; + volatile unsigned long mcast_filter; + volatile unsigned long tx_ring_base; + volatile unsigned long tx_pkt1_hdr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long tx_pkt1_ptr[3]; + volatile unsigned long tx_pkt2_hdr; + volatile unsigned long tx_pkt2_ptr[3]; + volatile unsigned long rx_fifo; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct mace_audio { + volatile unsigned long control; + volatile unsigned long codec_control; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long codec_mask; + volatile unsigned long codec_read; + struct { + volatile unsigned long control; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long read_ptr; + volatile unsigned long write_ptr; + volatile unsigned long depth; + } chan[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct mace_parport { +#define MACEPAR_CONTEXT_LASTFLAG BIT(63) +#define MACEPAR_CONTEXT_DATA_BOUND 0x0000000000001000UL +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPAR_CONTEXT_DATALEN_MASK 0x00000fff00000000UL +#define MACEPAR_CONTEXT_DATALEN_SHIFT 32 +#define MACEPAR_CONTEXT_BASEADDR_MASK 0x00000000ffffffffUL + volatile u64 context_a; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u64 context_b; +#define MACEPAR_CTLSTAT_DIRECTION BIT(0) +#define MACEPAR_CTLSTAT_ENABLE BIT(1) +#define MACEPAR_CTLSTAT_RESET BIT(2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPAR_CTLSTAT_CTXB_VALID BIT(3) +#define MACEPAR_CTLSTAT_CTXA_VALID BIT(4) + volatile u64 cntlstat; +#define MACEPAR_DIAG_CTXINUSE BIT(0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEPAR_DIAG_DMACTIVE BIT(1) +#define MACEPAR_DIAG_CTRMASK 0x0000000000003ffcUL +#define MACEPAR_DIAG_CTRSHIFT 2 + volatile u64 diagnostic; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct mace_isactrl { + volatile unsigned long ringbase; +#define MACEISA_RINGBUFFERS_SIZE (8 * 4096) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long misc; +#define MACEISA_FLASH_WE BIT(0) +#define MACEISA_PWD_CLEAR BIT(1) +#define MACEISA_NIC_DEASSERT BIT(2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEISA_NIC_DATA BIT(3) +#define MACEISA_LED_RED BIT(4) +#define MACEISA_LED_GREEN BIT(5) +#define MACEISA_DP_RAM_ENABLE BIT(6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long istat; + volatile unsigned long imask; +#define MACEISA_AUDIO_SW_INT BIT(0) +#define MACEISA_AUDIO_SC_INT BIT(1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEISA_AUDIO1_DMAT_INT BIT(2) +#define MACEISA_AUDIO1_OF_INT BIT(3) +#define MACEISA_AUDIO2_DMAT_INT BIT(4) +#define MACEISA_AUDIO2_MERR_INT BIT(5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEISA_AUDIO3_DMAT_INT BIT(6) +#define MACEISA_AUDIO3_MERR_INT BIT(7) +#define MACEISA_RTC_INT BIT(8) +#define MACEISA_KEYB_INT BIT(9) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEISA_KEYB_POLL_INT BIT(10) +#define MACEISA_MOUSE_INT BIT(11) +#define MACEISA_MOUSE_POLL_INT BIT(12) +#define MACEISA_TIMER0_INT BIT(13) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEISA_TIMER1_INT BIT(14) +#define MACEISA_TIMER2_INT BIT(15) +#define MACEISA_PARALLEL_INT BIT(16) +#define MACEISA_PAR_CTXA_INT BIT(17) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEISA_PAR_CTXB_INT BIT(18) +#define MACEISA_PAR_MERR_INT BIT(19) +#define MACEISA_SERIAL1_INT BIT(20) +#define MACEISA_SERIAL1_TDMAT_INT BIT(21) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEISA_SERIAL1_TDMAPR_INT BIT(22) +#define MACEISA_SERIAL1_TDMAME_INT BIT(23) +#define MACEISA_SERIAL1_RDMAT_INT BIT(24) +#define MACEISA_SERIAL1_RDMAOR_INT BIT(25) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEISA_SERIAL2_INT BIT(26) +#define MACEISA_SERIAL2_TDMAT_INT BIT(27) +#define MACEISA_SERIAL2_TDMAPR_INT BIT(28) +#define MACEISA_SERIAL2_TDMAME_INT BIT(29) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEISA_SERIAL2_RDMAT_INT BIT(30) +#define MACEISA_SERIAL2_RDMAOR_INT BIT(31) + volatile unsigned long _pad[0x2000/8 - 4]; + volatile unsigned long dp_ram[0x400]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mace_parport parport; +}; +struct mace_ps2port { + volatile unsigned long tx; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long rx; + volatile unsigned long control; + volatile unsigned long status; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mace_ps2 { + struct mace_ps2port keyb; + struct mace_ps2port mouse; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mace_i2c { + volatile unsigned long config; +#define MACEI2C_RESET BIT(0) +#define MACEI2C_FAST BIT(1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACEI2C_DATA_OVERRIDE BIT(2) +#define MACEI2C_CLOCK_OVERRIDE BIT(3) +#define MACEI2C_DATA_STATUS BIT(4) +#define MACEI2C_CLOCK_STATUS BIT(5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long control; + volatile unsigned long data; +}; +typedef union { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long ust_msc; + struct reg { + volatile unsigned int ust; + volatile unsigned int msc; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } reg; +} timer_reg; +struct mace_timers { + volatile unsigned long ust; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MACE_UST_PERIOD_NS 960 + volatile unsigned long compare1; + volatile unsigned long compare2; + volatile unsigned long compare3; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + timer_reg audio_in; + timer_reg audio_out1; + timer_reg audio_out2; + timer_reg video_in1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + timer_reg video_in2; + timer_reg video_out; +}; +struct mace_perif { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mace_audio audio; + char _pad0[0x10000 - sizeof(struct mace_audio)]; + struct mace_isactrl ctrl; + char _pad1[0x10000 - sizeof(struct mace_isactrl)]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mace_ps2 ps2; + char _pad2[0x10000 - sizeof(struct mace_ps2)]; + struct mace_i2c i2c; + char _pad3[0x10000 - sizeof(struct mace_i2c)]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mace_timers timers; + char _pad4[0x10000 - sizeof(struct mace_timers)]; +}; +struct mace_parallel { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct mace_ecp1284 { +}; +struct mace_serial { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile unsigned long xxx; +}; +struct mace_isa { + struct mace_parallel parallel; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + char _pad1[0x8000 - sizeof(struct mace_parallel)]; + struct mace_ecp1284 ecp1284; + char _pad2[0x8000 - sizeof(struct mace_ecp1284)]; + struct mace_serial serial1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + char _pad3[0x8000 - sizeof(struct mace_serial)]; + struct mace_serial serial2; + char _pad4[0x8000 - sizeof(struct mace_serial)]; + volatile unsigned char rtc[0x10000]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct sgi_mace { + char _reserved[0x80000]; + struct mace_pci pci; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + char _pad0[0x80000 - sizeof(struct mace_pci)]; + struct mace_video video_in1; + char _pad1[0x80000 - sizeof(struct mace_video)]; + struct mace_video video_in2; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + char _pad2[0x80000 - sizeof(struct mace_video)]; + struct mace_video video_out; + char _pad3[0x80000 - sizeof(struct mace_video)]; + struct mace_ethernet eth; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + char _pad4[0x80000 - sizeof(struct mace_ethernet)]; + struct mace_perif perif; + char _pad5[0x80000 - sizeof(struct mace_perif)]; + struct mace_isa isa; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + char _pad6[0x80000 - sizeof(struct mace_isa)]; +}; +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/ipcbuf.h b/9/platforms/android-16/arch-mips/usr/include/asm/ipcbuf.h new file mode 100644 index 0000000..9be3da8 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/ipcbuf.h @@ -0,0 +1,38 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_IPCBUF_H +#define _ASM_IPCBUF_H +struct ipc64_perm +{ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __kernel_key_t key; + __kernel_uid_t uid; + __kernel_gid_t gid; + __kernel_uid_t cuid; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __kernel_gid_t cgid; + __kernel_mode_t mode; + unsigned short seq; + unsigned short __pad1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long __unused1; + unsigned long __unused2; +}; +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/irq.h b/9/platforms/android-16/arch-mips/usr/include/asm/irq.h new file mode 100644 index 0000000..042c951 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/irq.h @@ -0,0 +1,33 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_IRQ_H +#define _ASM_IRQ_H +#include <linux/linkage.h> +#include <asm/mipsmtregs.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <irq.h> +#define irq_canonicalize(irq) (irq) +#define IRQ_AFFINITY_HOOK(irq) do { } while (0) +#define __DO_IRQ_SMTC_HOOK(irq) do { IRQ_AFFINITY_HOOK(irq); } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NO_AFFINITY_IRQ_SMTC_HOOK(irq) do { } while (0) +#define do_IRQ(irq) do { irq_enter(); __DO_IRQ_SMTC_HOOK(irq); generic_handle_irq(irq); irq_exit(); } while (0) +#define CP0_LEGACY_COMPARE_IRQ 7 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/irq_gt641xx.h b/9/platforms/android-16/arch-mips/usr/include/asm/irq_gt641xx.h new file mode 100644 index 0000000..2a341d8 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/irq_gt641xx.h @@ -0,0 +1,61 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_IRQ_GT641XX_H +#define _ASM_IRQ_GT641XX_H +#ifndef GT641XX_IRQ_BASE +#define GT641XX_IRQ_BASE 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define GT641XX_MEMORY_OUT_OF_RANGE_IRQ (GT641XX_IRQ_BASE + 1) +#define GT641XX_DMA_OUT_OF_RANGE_IRQ (GT641XX_IRQ_BASE + 2) +#define GT641XX_CPU_ACCESS_OUT_OF_RANGE_IRQ (GT641XX_IRQ_BASE + 3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT641XX_DMA0_IRQ (GT641XX_IRQ_BASE + 4) +#define GT641XX_DMA1_IRQ (GT641XX_IRQ_BASE + 5) +#define GT641XX_DMA2_IRQ (GT641XX_IRQ_BASE + 6) +#define GT641XX_DMA3_IRQ (GT641XX_IRQ_BASE + 7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT641XX_TIMER0_IRQ (GT641XX_IRQ_BASE + 8) +#define GT641XX_TIMER1_IRQ (GT641XX_IRQ_BASE + 9) +#define GT641XX_TIMER2_IRQ (GT641XX_IRQ_BASE + 10) +#define GT641XX_TIMER3_IRQ (GT641XX_IRQ_BASE + 11) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT641XX_PCI_0_MASTER_READ_ERROR_IRQ (GT641XX_IRQ_BASE + 12) +#define GT641XX_PCI_0_SLAVE_WRITE_ERROR_IRQ (GT641XX_IRQ_BASE + 13) +#define GT641XX_PCI_0_MASTER_WRITE_ERROR_IRQ (GT641XX_IRQ_BASE + 14) +#define GT641XX_PCI_0_SLAVE_READ_ERROR_IRQ (GT641XX_IRQ_BASE + 15) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT641XX_PCI_0_ADDRESS_ERROR_IRQ (GT641XX_IRQ_BASE + 16) +#define GT641XX_MEMORY_ERROR_IRQ (GT641XX_IRQ_BASE + 17) +#define GT641XX_PCI_0_MASTER_ABORT_IRQ (GT641XX_IRQ_BASE + 18) +#define GT641XX_PCI_0_TARGET_ABORT_IRQ (GT641XX_IRQ_BASE + 19) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT641XX_PCI_0_RETRY_TIMEOUT_IRQ (GT641XX_IRQ_BASE + 20) +#define GT641XX_CPU_INT0_IRQ (GT641XX_IRQ_BASE + 21) +#define GT641XX_CPU_INT1_IRQ (GT641XX_IRQ_BASE + 22) +#define GT641XX_CPU_INT2_IRQ (GT641XX_IRQ_BASE + 23) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT641XX_CPU_INT3_IRQ (GT641XX_IRQ_BASE + 24) +#define GT641XX_CPU_INT4_IRQ (GT641XX_IRQ_BASE + 25) +#define GT641XX_PCI_INT0_IRQ (GT641XX_IRQ_BASE + 26) +#define GT641XX_PCI_INT1_IRQ (GT641XX_IRQ_BASE + 27) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GT641XX_PCI_INT2_IRQ (GT641XX_IRQ_BASE + 28) +#define GT641XX_PCI_INT3_IRQ (GT641XX_IRQ_BASE + 29) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/irq_regs.h b/9/platforms/android-16/arch-mips/usr/include/asm/irq_regs.h new file mode 100644 index 0000000..5745c5f --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/irq_regs.h @@ -0,0 +1,24 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_IRQ_REGS_H +#define __ASM_IRQ_REGS_H +#define ARCH_HAS_OWN_IRQ_REGS +#include <linux/thread_info.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/jazz.h b/9/platforms/android-16/arch-mips/usr/include/asm/jazz.h new file mode 100644 index 0000000..5e6ea8f --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/jazz.h @@ -0,0 +1,168 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_JAZZ_H +#define __ASM_JAZZ_H +#define JAZZ_LOCAL_IO_SPACE 0xe0000000 +#define PICA_ASIC_REVISION 0xe0000008 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PICA_LED 0xe000f000 +#define LED_DOT 0x01 +#define LED_SPACE 0x00 +#define LED_0 0xfc +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LED_1 0x60 +#define LED_2 0xda +#define LED_3 0xf2 +#define LED_4 0x66 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LED_5 0xb6 +#define LED_6 0xbe +#define LED_7 0xe0 +#define LED_8 0xfe +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LED_9 0xf6 +#define LED_A 0xee +#define LED_b 0x3e +#define LED_C 0x9c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LED_d 0x7a +#define LED_E 0x9e +#define LED_F 0x8e +#ifndef __ASSEMBLY__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define JAZZ_ETHERNET_BASE 0xe0001000 +#define JAZZ_SCSI_BASE 0xe0002000 +#define JAZZ_KEYBOARD_ADDRESS 0xe0005000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_KEYBOARD_DATA 0xe0005000 +#define JAZZ_KEYBOARD_COMMAND 0xe0005001 +#ifndef __ASSEMBLY__ +typedef struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char data; + unsigned char command; +} jazz_keyboard_hardware; +#define jazz_kh ((keyboard_hardware *) JAZZ_KEYBOARD_ADDRESS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef struct { + unsigned char pad0[3]; + unsigned char data; + unsigned char pad1[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char command; +} mips_keyboard_hardware; +#define keyboard_hardware jazz_keyboard_hardware +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_KEYBOARD_ADDRESS 0xb9005000 +#define MIPS_KEYBOARD_DATA 0xb9005003 +#define MIPS_KEYBOARD_COMMAND 0xb9005007 +#define JAZZ_SERIAL1_BASE (unsigned int)0xe0006000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_SERIAL2_BASE (unsigned int)0xe0007000 +#define JAZZ_PARALLEL_BASE (unsigned int)0xe0008000 +#define JAZZ_DUMMY_DEVICE 0xe000d000 +#define JAZZ_TIMER_INTERVAL 0xe0000228 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_TIMER_REGISTER 0xe0000230 +#ifndef __ASSEMBLY__ +#ifdef __MIPSEL__ +typedef struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int bank2 : 3; + unsigned int bank1 : 3; + unsigned int mem_bus_width : 1; + unsigned int reserved2 : 1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int page_mode : 1; + unsigned int reserved1 : 23; +} dram_configuration; +#else +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef struct { + unsigned int reserved1 : 23; + unsigned int page_mode : 1; + unsigned int reserved2 : 1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int mem_bus_width : 1; + unsigned int bank1 : 3; + unsigned int bank2 : 3; +} dram_configuration; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#endif +#define PICA_DRAM_CONFIG 0xe00fffe0 +#define JAZZ_IO_IRQ_SOURCE 0xe0010000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_IO_IRQ_ENABLE 0xe0010002 +#define JAZZ_IRQ_START 24 +#define JAZZ_IRQ_END (24 + 9) +#define JAZZ_PARALLEL_IRQ (JAZZ_IRQ_START + 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_FLOPPY_IRQ (JAZZ_IRQ_START + 1) +#define JAZZ_SOUND_IRQ (JAZZ_IRQ_START + 2) +#define JAZZ_VIDEO_IRQ (JAZZ_IRQ_START + 3) +#define JAZZ_ETHERNET_IRQ (JAZZ_IRQ_START + 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_SCSI_IRQ (JAZZ_IRQ_START + 5) +#define JAZZ_KEYBOARD_IRQ (JAZZ_IRQ_START + 6) +#define JAZZ_MOUSE_IRQ (JAZZ_IRQ_START + 7) +#define JAZZ_SERIAL1_IRQ (JAZZ_IRQ_START + 8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_SERIAL2_IRQ (JAZZ_IRQ_START + 9) +#define JAZZ_TIMER_IRQ (MIPS_CPU_IRQ_BASE+6) +#define JAZZ_SCSI_DMA 0 +#define JAZZ_FLOPPY_DMA 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_AUDIOL_DMA 2 +#define JAZZ_AUDIOR_DMA 3 +#define JAZZ_R4030_CONFIG 0xE0000000 +#define JAZZ_R4030_REVISION 0xE0000008 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_R4030_INV_ADDR 0xE0000010 +#define JAZZ_R4030_TRSTBL_BASE 0xE0000018 +#define JAZZ_R4030_TRSTBL_LIM 0xE0000020 +#define JAZZ_R4030_TRSTBL_INV 0xE0000028 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_R4030_CACHE_MTNC 0xE0000030 +#define JAZZ_R4030_R_FAIL_ADDR 0xE0000038 +#define JAZZ_R4030_M_FAIL_ADDR 0xE0000040 +#define JAZZ_R4030_CACHE_PTAG 0xE0000048 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_R4030_CACHE_LTAG 0xE0000050 +#define JAZZ_R4030_CACHE_BMASK 0xE0000058 +#define JAZZ_R4030_CACHE_BWIN 0xE0000060 +#define JAZZ_R4030_REM_SPEED 0xE0000070 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_R4030_IRQ_ENABLE 0xE00000E8 +#define JAZZ_R4030_INVAL_ADDR 0xE0000010 +#define JAZZ_R4030_IRQ_SOURCE 0xE0000200 +#define JAZZ_R4030_I386_ERROR 0xE0000208 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_EISA_IRQ_ACK 0xE0000238 +#ifndef __ASSEMBLY__ +#endif +#define JAZZ_FDC_BASE 0xe0003000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_RTC_BASE 0xe0004000 +#define JAZZ_PORT_BASE 0xe2000000 +#define JAZZ_EISA_BASE 0xe3000000 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/jazzdma.h b/9/platforms/android-16/arch-mips/usr/include/asm/jazzdma.h new file mode 100644 index 0000000..7426807 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/jazzdma.h @@ -0,0 +1,64 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_JAZZDMA_H +#define _ASM_JAZZDMA_H +#define VDMA_PAGESIZE 4096 +#define VDMA_PGTBL_ENTRIES 4096 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VDMA_PGTBL_SIZE (sizeof(VDMA_PGTBL_ENTRY) * VDMA_PGTBL_ENTRIES) +#define VDMA_PAGE_EMPTY 0xff000000 +#define VDMA_PAGE(a) ((unsigned int)(a) >> 12) +#define VDMA_OFFSET(a) ((unsigned int)(a) & (VDMA_PAGESIZE-1)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VDMA_ERROR 0xffffffff +typedef volatile struct VDMA_PGTBL_ENTRY { + unsigned int frame; + unsigned int owner; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +} VDMA_PGTBL_ENTRY; +#define JAZZ_R4030_CHNL_MODE 0xE0000100 +#define JAZZ_R4030_CHNL_ENABLE 0xE0000108 +#define JAZZ_R4030_CHNL_COUNT 0xE0000110 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define JAZZ_R4030_CHNL_ADDR 0xE0000118 +#define R4030_CHNL_ENABLE (1<<0) +#define R4030_CHNL_WRITE (1<<1) +#define R4030_TC_INTR (1<<8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R4030_MEM_INTR (1<<9) +#define R4030_ADDR_INTR (1<<10) +#define R4030_MODE_ATIME_40 (0) +#define R4030_MODE_ATIME_80 (1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R4030_MODE_ATIME_120 (2) +#define R4030_MODE_ATIME_160 (3) +#define R4030_MODE_ATIME_200 (4) +#define R4030_MODE_ATIME_240 (5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R4030_MODE_ATIME_280 (6) +#define R4030_MODE_ATIME_320 (7) +#define R4030_MODE_WIDTH_8 (1<<3) +#define R4030_MODE_WIDTH_16 (2<<3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R4030_MODE_WIDTH_32 (3<<3) +#define R4030_MODE_INTR_EN (1<<5) +#define R4030_MODE_BURST (1<<6) +#define R4030_MODE_FAST_ACK (1<<7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/kdebug.h b/9/platforms/android-16/arch-mips/usr/include/asm/kdebug.h new file mode 100644 index 0000000..695346d --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/kdebug.h @@ -0,0 +1,30 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_MIPS_KDEBUG_H +#define _ASM_MIPS_KDEBUG_H +#include <linux/notifier.h> +enum die_val { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + DIE_OOPS = 1, + DIE_FP, + DIE_TRAP, + DIE_RI, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/kmap_types.h b/9/platforms/android-16/arch-mips/usr/include/asm/kmap_types.h new file mode 100644 index 0000000..e8b888d --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/kmap_types.h @@ -0,0 +1,44 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_KMAP_TYPES_H +#define _ASM_KMAP_TYPES_H +#define D(n) +enum km_type { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +D(0) KM_BOUNCE_READ, +D(1) KM_SKB_SUNRPC_DATA, +D(2) KM_SKB_DATA_SOFTIRQ, +D(3) KM_USER0, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +D(4) KM_USER1, +D(5) KM_BIO_SRC_IRQ, +D(6) KM_BIO_DST_IRQ, +D(7) KM_PTE0, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +D(8) KM_PTE1, +D(9) KM_IRQ0, +D(10) KM_IRQ1, +D(11) KM_SOFTIRQ0, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +D(12) KM_SOFTIRQ1, +D(13) KM_TYPE_NR +}; +#undef D +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/lasat/lasat.h b/9/platforms/android-16/arch-mips/usr/include/asm/lasat/lasat.h new file mode 100644 index 0000000..aa255f6 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/lasat/lasat.h @@ -0,0 +1,209 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _LASAT_H +#define _LASAT_H +#ifndef _LANGUAGE_ASSEMBLY +enum lasat_mtdparts { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + LASAT_MTD_BOOTLOADER, + LASAT_MTD_SERVICE, + LASAT_MTD_NORMAL, + LASAT_MTD_CONFIG, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + LASAT_MTD_FS, + LASAT_MTD_LAST +}; +#include <linux/types.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_EEPROM_VERSION 7 +struct lasat_eeprom_struct { + unsigned int version; + unsigned int cfg[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char hwaddr[6]; + unsigned char print_partno[12]; + unsigned char term0; + unsigned char print_serial[14]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char term1; + unsigned char prod_partno[12]; + unsigned char term2; + unsigned char prod_serial[14]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char term3; + unsigned char passwd_hash[16]; + unsigned char pwdnull; + unsigned char vendid; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char ts_ref; + unsigned char ts_signoff; + unsigned char reserved[11]; + unsigned char debugaccess; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned short prid; + unsigned int serviceflag; + unsigned int ipaddr; + unsigned int netmask; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int crc32; +}; +struct lasat_eeprom_struct_pre7 { + unsigned int version; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int flags[3]; + unsigned char hwaddr0[6]; + unsigned char hwaddr1[6]; + unsigned char print_partno[9]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char term0; + unsigned char print_serial[14]; + unsigned char term1; + unsigned char prod_partno[9]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char term2; + unsigned char prod_serial[14]; + unsigned char term3; + unsigned char passwd_hash[24]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char pwdnull; + unsigned char vendor; + unsigned char ts_ref; + unsigned char ts_signoff; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char reserved[6]; + unsigned int writecount; + unsigned int ipaddr; + unsigned int netmask; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int crc32; +}; +#define LASAT_W0_DSCTYPE(v) (((v)) & 0xf) +#define LASAT_W0_BMID(v) (((v) >> 0x04) & 0xf) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_W0_CPUTYPE(v) (((v) >> 0x08) & 0xf) +#define LASAT_W0_BUSSPEED(v) (((v) >> 0x0c) & 0xf) +#define LASAT_W0_CPUCLK(v) (((v) >> 0x10) & 0xf) +#define LASAT_W0_SDRAMBANKSZ(v) (((v) >> 0x14) & 0xf) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_W0_SDRAMBANKS(v) (((v) >> 0x18) & 0xf) +#define LASAT_W0_L2CACHE(v) (((v) >> 0x1c) & 0xf) +#define LASAT_W1_EDHAC(v) (((v)) & 0xf) +#define LASAT_W1_HIFN(v) (((v) >> 0x04) & 0x1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_W1_ISDN(v) (((v) >> 0x05) & 0x1) +#define LASAT_W1_IDE(v) (((v) >> 0x06) & 0x1) +#define LASAT_W1_HDLC(v) (((v) >> 0x07) & 0x1) +#define LASAT_W1_USVERSION(v) (((v) >> 0x08) & 0x1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_W1_4MACS(v) (((v) >> 0x09) & 0x1) +#define LASAT_W1_EXTSERIAL(v) (((v) >> 0x0a) & 0x1) +#define LASAT_W1_FLASHSIZE(v) (((v) >> 0x0c) & 0xf) +#define LASAT_W1_PCISLOTS(v) (((v) >> 0x10) & 0xf) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_W1_PCI1OPT(v) (((v) >> 0x14) & 0xf) +#define LASAT_W1_PCI2OPT(v) (((v) >> 0x18) & 0xf) +#define LASAT_W1_PCI3OPT(v) (((v) >> 0x1c) & 0xf) +#define LASAT_BMID_MASQUERADE2 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_BMID_MASQUERADEPRO 1 +#define LASAT_BMID_SAFEPIPE25 2 +#define LASAT_BMID_SAFEPIPE50 3 +#define LASAT_BMID_SAFEPIPE100 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_BMID_SAFEPIPE5000 5 +#define LASAT_BMID_SAFEPIPE7000 6 +#define LASAT_BMID_SAFEPIPE1000 7 +#define LASAT_BMID_UNKNOWN 0xf +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_MAX_BMID_NAMES 9 +#define LASAT_HAS_EDHAC (1 << 0) +#define LASAT_EDHAC_FAST (1 << 1) +#define LASAT_HAS_EADI (1 << 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_HAS_HIFN (1 << 3) +#define LASAT_HAS_ISDN (1 << 4) +#define LASAT_HAS_LEASEDLINE_IF (1 << 5) +#define LASAT_HAS_HDC (1 << 6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_PRID_MASQUERADE2 0 +#define LASAT_PRID_MASQUERADEPRO 1 +#define LASAT_PRID_SAFEPIPE25 2 +#define LASAT_PRID_SAFEPIPE50 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_PRID_SAFEPIPE100 4 +#define LASAT_PRID_SAFEPIPE5000 5 +#define LASAT_PRID_SAFEPIPE7000 6 +#define LASAT_PRID_SAFEPIPE30 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_PRID_SAFEPIPE5100 8 +#define LASAT_PRID_SAFEPIPE7100 9 +#define LASAT_PRID_SAFEPIPE1110 10 +#define LASAT_PRID_SAFEPIPE3020 11 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_PRID_SAFEPIPE3030 12 +#define LASAT_PRID_SAFEPIPE5020 13 +#define LASAT_PRID_SAFEPIPE5030 14 +#define LASAT_PRID_SAFEPIPE1120 15 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_PRID_SAFEPIPE1130 16 +#define LASAT_PRID_SAFEPIPE6010 17 +#define LASAT_PRID_SAFEPIPE6110 18 +#define LASAT_PRID_SAFEPIPE6210 19 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_PRID_SAFEPIPE1020 20 +#define LASAT_PRID_SAFEPIPE1040 21 +#define LASAT_PRID_SAFEPIPE1060 22 +struct lasat_info { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int li_cpu_hz; + unsigned int li_bus_hz; + unsigned int li_bmid; + unsigned int li_memsize; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int li_flash_size; + unsigned int li_prid; + unsigned char li_bmstr[16]; + unsigned char li_namestr[32]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char li_typestr[16]; + unsigned int li_flash_base; + unsigned long li_flashpart_base[LASAT_MTD_LAST]; + unsigned long li_flashpart_size[LASAT_MTD_LAST]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct lasat_eeprom_struct li_eeprom_info; + unsigned int li_eeprom_upgrade_version; + unsigned int li_debugaccess; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define N_MACHTYPES 2 +#include <linux/delay.h> +#define LASAT_100_DIVIDER 20 +#define LASAT_200_DIVIDER 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IS_LASAT_200() (current_cpu_data.cputype == CPU_R5000) +#endif +#define LASAT_SERVICEMODE_MAGIC_1 0xdeadbeef +#define LASAT_SERVICEMODE_MAGIC_2 0xfedeabba +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LASAT_GT_BASE (KSEG1ADDR(0x14000000)) +#define Vrc5074_PHYS_BASE 0x1fa00000 +#define Vrc5074_BASE (KSEG1ADDR(Vrc5074_PHYS_BASE)) +#define PCI_WINDOW1 0x1a000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/linkage.h b/9/platforms/android-16/arch-mips/usr/include/asm/linkage.h new file mode 100644 index 0000000..0c77e27 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/linkage.h @@ -0,0 +1,26 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_LINKAGE_H +#define __ASM_LINKAGE_H +#ifdef __ASSEMBLY__ +#include <asm/asm.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define __weak __attribute__((weak)) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/local.h b/9/platforms/android-16/arch-mips/usr/include/asm/local.h new file mode 100644 index 0000000..9d2172b --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/local.h @@ -0,0 +1,74 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ARCH_MIPS_LOCAL_H +#define _ARCH_MIPS_LOCAL_H +#include <linux/percpu.h> +#include <linux/bitops.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/atomic.h> +#include <asm/cmpxchg.h> +#include <asm/war.h> +typedef struct +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +{ + atomic_long_t a; +} local_t; +#define LOCAL_INIT(i) { ATOMIC_LONG_INIT(i) } +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define local_read(l) atomic_long_read(&(l)->a) +#define local_set(l, i) atomic_long_set(&(l)->a, (i)) +#define local_add(i, l) atomic_long_add((i), (&(l)->a)) +#define local_sub(i, l) atomic_long_sub((i), (&(l)->a)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define local_inc(l) atomic_long_inc(&(l)->a) +#define local_dec(l) atomic_long_dec(&(l)->a) +#define local_cmpxchg(l, o, n) ((long)cmpxchg_local(&((l)->a.counter), (o), (n))) +#define local_xchg(l, n) (xchg_local(&((l)->a.counter), (n))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define local_add_unless(l, a, u) ({ long c, old; c = local_read(l); while (c != (u) && (old = local_cmpxchg((l), c, c + (a))) != c) c = old; c != (u); }) +#define local_inc_not_zero(l) local_add_unless((l), 1, 0) +#define local_dec_return(l) local_sub_return(1, (l)) +#define local_inc_return(l) local_add_return(1, (l)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define local_sub_and_test(i, l) (local_sub_return((i), (l)) == 0) +#define local_inc_and_test(l) (local_inc_return(l) == 0) +#define local_dec_and_test(l) (local_sub_return(1, (l)) == 0) +#define local_add_negative(i, l) (local_add_return(i, (l)) < 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __local_inc(l) ((l)->a.counter++) +#define __local_dec(l) ((l)->a.counter++) +#define __local_add(i, l) ((l)->a.counter+=(i)) +#define __local_sub(i, l) ((l)->a.counter-=(i)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_local_wrap_v(l) ({ local_t res__; preempt_disable(); res__ = (l); preempt_enable(); res__; }) +#define cpu_local_wrap(l) ({ preempt_disable(); l; preempt_enable(); }) +#define cpu_local_read(l) cpu_local_wrap_v(local_read(&__get_cpu_var(l))) +#define cpu_local_set(l, i) cpu_local_wrap(local_set(&__get_cpu_var(l), (i))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define cpu_local_inc(l) cpu_local_wrap(local_inc(&__get_cpu_var(l))) +#define cpu_local_dec(l) cpu_local_wrap(local_dec(&__get_cpu_var(l))) +#define cpu_local_add(i, l) cpu_local_wrap(local_add((i), &__get_cpu_var(l))) +#define cpu_local_sub(i, l) cpu_local_wrap(local_sub((i), &__get_cpu_var(l))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __cpu_local_inc(l) cpu_local_inc(l) +#define __cpu_local_dec(l) cpu_local_dec(l) +#define __cpu_local_add(i, l) cpu_local_add((i), (l)) +#define __cpu_local_sub(i, l) cpu_local_sub((i), (l)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mach-au1x00/au1000.h b/9/platforms/android-16/arch-mips/usr/include/asm/mach-au1x00/au1000.h new file mode 100644 index 0000000..c331879 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mach-au1x00/au1000.h @@ -0,0 +1,898 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _AU1000_H_ +#define _AU1000_H_ +#ifndef _LANGUAGE_ASSEMBLY +#include <linux/delay.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <linux/types.h> +#include <linux/io.h> +#include <linux/irq.h> +struct au1xxx_irqmap { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int im_irq; + int im_type; + int im_request; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define MEM_STCFG0 0xB4001000 +#define MEM_STTIME0 0xB4001004 +#define MEM_STADDR0 0xB4001008 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MEM_STCFG1 0xB4001010 +#define MEM_STTIME1 0xB4001014 +#define MEM_STADDR1 0xB4001018 +#define MEM_STCFG2 0xB4001020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MEM_STTIME2 0xB4001024 +#define MEM_STADDR2 0xB4001028 +#define MEM_STCFG3 0xB4001030 +#define MEM_STTIME3 0xB4001034 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MEM_STADDR3 0xB4001038 +#define IC0_CFG0RD 0xB0400040 +#define IC0_CFG0SET 0xB0400040 +#define IC0_CFG0CLR 0xB0400044 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IC0_CFG1RD 0xB0400048 +#define IC0_CFG1SET 0xB0400048 +#define IC0_CFG1CLR 0xB040004C +#define IC0_CFG2RD 0xB0400050 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IC0_CFG2SET 0xB0400050 +#define IC0_CFG2CLR 0xB0400054 +#define IC0_REQ0INT 0xB0400054 +#define IC0_SRCRD 0xB0400058 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IC0_SRCSET 0xB0400058 +#define IC0_SRCCLR 0xB040005C +#define IC0_REQ1INT 0xB040005C +#define IC0_ASSIGNRD 0xB0400060 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IC0_ASSIGNSET 0xB0400060 +#define IC0_ASSIGNCLR 0xB0400064 +#define IC0_WAKERD 0xB0400068 +#define IC0_WAKESET 0xB0400068 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IC0_WAKECLR 0xB040006C +#define IC0_MASKRD 0xB0400070 +#define IC0_MASKSET 0xB0400070 +#define IC0_MASKCLR 0xB0400074 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IC0_RISINGRD 0xB0400078 +#define IC0_RISINGCLR 0xB0400078 +#define IC0_FALLINGRD 0xB040007C +#define IC0_FALLINGCLR 0xB040007C +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IC0_TESTBIT 0xB0400080 +#define IC1_CFG0RD 0xB1800040 +#define IC1_CFG0SET 0xB1800040 +#define IC1_CFG0CLR 0xB1800044 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IC1_CFG1RD 0xB1800048 +#define IC1_CFG1SET 0xB1800048 +#define IC1_CFG1CLR 0xB180004C +#define IC1_CFG2RD 0xB1800050 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IC1_CFG2SET 0xB1800050 +#define IC1_CFG2CLR 0xB1800054 +#define IC1_REQ0INT 0xB1800054 +#define IC1_SRCRD 0xB1800058 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IC1_SRCSET 0xB1800058 +#define IC1_SRCCLR 0xB180005C +#define IC1_REQ1INT 0xB180005C +#define IC1_ASSIGNRD 0xB1800060 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IC1_ASSIGNSET 0xB1800060 +#define IC1_ASSIGNCLR 0xB1800064 +#define IC1_WAKERD 0xB1800068 +#define IC1_WAKESET 0xB1800068 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IC1_WAKECLR 0xB180006C +#define IC1_MASKRD 0xB1800070 +#define IC1_MASKSET 0xB1800070 +#define IC1_MASKCLR 0xB1800074 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IC1_RISINGRD 0xB1800078 +#define IC1_RISINGCLR 0xB1800078 +#define IC1_FALLINGRD 0xB180007C +#define IC1_FALLINGCLR 0xB180007C +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IC1_TESTBIT 0xB1800080 +#define INTC_INT_DISABLED 0x0 +#define INTC_INT_RISE_EDGE 0x1 +#define INTC_INT_FALL_EDGE 0x2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INTC_INT_RISE_AND_FALL_EDGE 0x3 +#define INTC_INT_HIGH_LEVEL 0x5 +#define INTC_INT_LOW_LEVEL 0x6 +#define INTC_INT_HIGH_AND_LOW_LEVEL 0x7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define AU1000_INTC0_INT_BASE (MIPS_CPU_IRQ_BASE + 8) +#define AU1000_INTC0_INT_LAST (AU1000_INTC0_INT_BASE + 31) +#define AU1000_INTC1_INT_BASE (AU1000_INTC0_INT_BASE + 32) +#define AU1000_INTC1_INT_LAST (AU1000_INTC1_INT_BASE + 31) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define AU1000_MAX_INTR AU1000_INTC1_INT_LAST +#define INTX 0xFF +#define SYS_BASE 0xB1900000 +#define SYS_COUNTER_CNTRL (SYS_BASE + 0x14) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_CNTRL_E1S (1 << 23) +#define SYS_CNTRL_T1S (1 << 20) +#define SYS_CNTRL_M21 (1 << 19) +#define SYS_CNTRL_M11 (1 << 18) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_CNTRL_M01 (1 << 17) +#define SYS_CNTRL_C1S (1 << 16) +#define SYS_CNTRL_BP (1 << 14) +#define SYS_CNTRL_EN1 (1 << 13) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_CNTRL_BT1 (1 << 12) +#define SYS_CNTRL_EN0 (1 << 11) +#define SYS_CNTRL_BT0 (1 << 10) +#define SYS_CNTRL_E0 (1 << 8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_CNTRL_E0S (1 << 7) +#define SYS_CNTRL_32S (1 << 5) +#define SYS_CNTRL_T0S (1 << 4) +#define SYS_CNTRL_M20 (1 << 3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_CNTRL_M10 (1 << 2) +#define SYS_CNTRL_M00 (1 << 1) +#define SYS_CNTRL_C0S (1 << 0) +#define SYS_TOYTRIM (SYS_BASE + 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_TOYWRITE (SYS_BASE + 4) +#define SYS_TOYMATCH0 (SYS_BASE + 8) +#define SYS_TOYMATCH1 (SYS_BASE + 0xC) +#define SYS_TOYMATCH2 (SYS_BASE + 0x10) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_TOYREAD (SYS_BASE + 0x40) +#define SYS_RTCTRIM (SYS_BASE + 0x44) +#define SYS_RTCWRITE (SYS_BASE + 0x48) +#define SYS_RTCMATCH0 (SYS_BASE + 0x4C) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_RTCMATCH1 (SYS_BASE + 0x50) +#define SYS_RTCMATCH2 (SYS_BASE + 0x54) +#define SYS_RTCREAD (SYS_BASE + 0x58) +#define I2S_DATA 0xB1000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define I2S_DATA_MASK 0xffffff +#define I2S_CONFIG 0xB1000004 +#define I2S_CONFIG_XU (1 << 25) +#define I2S_CONFIG_XO (1 << 24) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define I2S_CONFIG_RU (1 << 23) +#define I2S_CONFIG_RO (1 << 22) +#define I2S_CONFIG_TR (1 << 21) +#define I2S_CONFIG_TE (1 << 20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define I2S_CONFIG_TF (1 << 19) +#define I2S_CONFIG_RR (1 << 18) +#define I2S_CONFIG_RE (1 << 17) +#define I2S_CONFIG_RF (1 << 16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define I2S_CONFIG_PD (1 << 11) +#define I2S_CONFIG_LB (1 << 10) +#define I2S_CONFIG_IC (1 << 9) +#define I2S_CONFIG_FM_BIT 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define I2S_CONFIG_FM_MASK (0x3 << I2S_CONFIG_FM_BIT) +#define I2S_CONFIG_FM_I2S (0x0 << I2S_CONFIG_FM_BIT) +#define I2S_CONFIG_FM_LJ (0x1 << I2S_CONFIG_FM_BIT) +#define I2S_CONFIG_FM_RJ (0x2 << I2S_CONFIG_FM_BIT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define I2S_CONFIG_TN (1 << 6) +#define I2S_CONFIG_RN (1 << 5) +#define I2S_CONFIG_SZ_BIT 0 +#define I2S_CONFIG_SZ_MASK (0x1F << I2S_CONFIG_SZ_BIT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define I2S_CONTROL 0xB1000008 +#define I2S_CONTROL_D (1 << 1) +#define I2S_CONTROL_CE (1 << 0) +#ifndef USB_OHCI_LEN +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define USB_OHCI_LEN 0x00100000 +#endif +#define USBD_EP0RD 0xB0200000 +#define USBD_EP0WR 0xB0200004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define USBD_EP2WR 0xB0200008 +#define USBD_EP3WR 0xB020000C +#define USBD_EP4RD 0xB0200010 +#define USBD_EP5RD 0xB0200014 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define USBD_INTEN 0xB0200018 +#define USBD_INTSTAT 0xB020001C +#define USBDEV_INT_SOF (1 << 12) +#define USBDEV_INT_HF_BIT 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define USBDEV_INT_HF_MASK (0x3f << USBDEV_INT_HF_BIT) +#define USBDEV_INT_CMPLT_BIT 0 +#define USBDEV_INT_CMPLT_MASK (0x3f << USBDEV_INT_CMPLT_BIT) +#define USBD_CONFIG 0xB0200020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define USBD_EP0CS 0xB0200024 +#define USBD_EP2CS 0xB0200028 +#define USBD_EP3CS 0xB020002C +#define USBD_EP4CS 0xB0200030 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define USBD_EP5CS 0xB0200034 +#define USBDEV_CS_SU (1 << 14) +#define USBDEV_CS_NAK (1 << 13) +#define USBDEV_CS_ACK (1 << 12) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define USBDEV_CS_BUSY (1 << 11) +#define USBDEV_CS_TSIZE_BIT 1 +#define USBDEV_CS_TSIZE_MASK (0x3ff << USBDEV_CS_TSIZE_BIT) +#define USBDEV_CS_STALL (1 << 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define USBD_EP0RDSTAT 0xB0200040 +#define USBD_EP0WRSTAT 0xB0200044 +#define USBD_EP2WRSTAT 0xB0200048 +#define USBD_EP3WRSTAT 0xB020004C +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define USBD_EP4RDSTAT 0xB0200050 +#define USBD_EP5RDSTAT 0xB0200054 +#define USBDEV_FSTAT_FLUSH (1 << 6) +#define USBDEV_FSTAT_UF (1 << 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define USBDEV_FSTAT_OF (1 << 4) +#define USBDEV_FSTAT_FCNT_BIT 0 +#define USBDEV_FSTAT_FCNT_MASK (0x0f << USBDEV_FSTAT_FCNT_BIT) +#define USBD_ENABLE 0xB0200058 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define USBDEV_ENABLE (1 << 1) +#define USBDEV_CE (1 << 0) +#define MAC_CONTROL 0x0 +#define MAC_RX_ENABLE (1 << 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_TX_ENABLE (1 << 3) +#define MAC_DEF_CHECK (1 << 5) +#define MAC_SET_BL(X) (((X) & 0x3) << 6) +#define MAC_AUTO_PAD (1 << 8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_DISABLE_RETRY (1 << 10) +#define MAC_DISABLE_BCAST (1 << 11) +#define MAC_LATE_COL (1 << 12) +#define MAC_HASH_MODE (1 << 13) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_HASH_ONLY (1 << 15) +#define MAC_PASS_ALL (1 << 16) +#define MAC_INVERSE_FILTER (1 << 17) +#define MAC_PROMISCUOUS (1 << 18) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_PASS_ALL_MULTI (1 << 19) +#define MAC_FULL_DUPLEX (1 << 20) +#define MAC_NORMAL_MODE 0 +#define MAC_INT_LOOPBACK (1 << 21) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_EXT_LOOPBACK (1 << 22) +#define MAC_DISABLE_RX_OWN (1 << 23) +#define MAC_BIG_ENDIAN (1 << 30) +#define MAC_RX_ALL (1 << 31) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_ADDRESS_HIGH 0x4 +#define MAC_ADDRESS_LOW 0x8 +#define MAC_MCAST_HIGH 0xC +#define MAC_MCAST_LOW 0x10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_MII_CNTRL 0x14 +#define MAC_MII_BUSY (1 << 0) +#define MAC_MII_READ 0 +#define MAC_MII_WRITE (1 << 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_SET_MII_SELECT_REG(X) (((X) & 0x1f) << 6) +#define MAC_SET_MII_SELECT_PHY(X) (((X) & 0x1f) << 11) +#define MAC_MII_DATA 0x18 +#define MAC_FLOW_CNTRL 0x1C +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_FLOW_CNTRL_BUSY (1 << 0) +#define MAC_FLOW_CNTRL_ENABLE (1 << 1) +#define MAC_PASS_CONTROL (1 << 2) +#define MAC_SET_PAUSE(X) (((X) & 0xffff) << 16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_VLAN1_TAG 0x20 +#define MAC_VLAN2_TAG 0x24 +#define MAC_EN_CLOCK_ENABLE (1 << 0) +#define MAC_EN_RESET0 (1 << 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_EN_TOSS (0 << 2) +#define MAC_EN_CACHEABLE (1 << 3) +#define MAC_EN_RESET1 (1 << 4) +#define MAC_EN_RESET2 (1 << 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_DMA_RESET (1 << 6) +#define MAC0_TX_DMA_ADDR 0xB4004000 +#define MAC1_TX_DMA_ADDR 0xB4004200 +#define MAC_TX_BUFF0_STATUS 0x0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TX_FRAME_ABORTED (1 << 0) +#define TX_JAB_TIMEOUT (1 << 1) +#define TX_NO_CARRIER (1 << 2) +#define TX_LOSS_CARRIER (1 << 3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TX_EXC_DEF (1 << 4) +#define TX_LATE_COLL_ABORT (1 << 5) +#define TX_EXC_COLL (1 << 6) +#define TX_UNDERRUN (1 << 7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TX_DEFERRED (1 << 8) +#define TX_LATE_COLL (1 << 9) +#define TX_COLL_CNT_MASK (0xF << 10) +#define TX_PKT_RETRY (1 << 31) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_TX_BUFF0_ADDR 0x4 +#define TX_DMA_ENABLE (1 << 0) +#define TX_T_DONE (1 << 1) +#define TX_GET_DMA_BUFFER(X) (((X) >> 2) & 0x3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_TX_BUFF0_LEN 0x8 +#define MAC_TX_BUFF1_STATUS 0x10 +#define MAC_TX_BUFF1_ADDR 0x14 +#define MAC_TX_BUFF1_LEN 0x18 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_TX_BUFF2_STATUS 0x20 +#define MAC_TX_BUFF2_ADDR 0x24 +#define MAC_TX_BUFF2_LEN 0x28 +#define MAC_TX_BUFF3_STATUS 0x30 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_TX_BUFF3_ADDR 0x34 +#define MAC_TX_BUFF3_LEN 0x38 +#define MAC0_RX_DMA_ADDR 0xB4004100 +#define MAC1_RX_DMA_ADDR 0xB4004300 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_RX_BUFF0_STATUS 0x0 +#define RX_FRAME_LEN_MASK 0x3fff +#define RX_WDOG_TIMER (1 << 14) +#define RX_RUNT (1 << 15) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define RX_OVERLEN (1 << 16) +#define RX_COLL (1 << 17) +#define RX_ETHER (1 << 18) +#define RX_MII_ERROR (1 << 19) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define RX_DRIBBLING (1 << 20) +#define RX_CRC_ERROR (1 << 21) +#define RX_VLAN1 (1 << 22) +#define RX_VLAN2 (1 << 23) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define RX_LEN_ERROR (1 << 24) +#define RX_CNTRL_FRAME (1 << 25) +#define RX_U_CNTRL_FRAME (1 << 26) +#define RX_MCAST_FRAME (1 << 27) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define RX_BCAST_FRAME (1 << 28) +#define RX_FILTER_FAIL (1 << 29) +#define RX_PACKET_FILTER (1 << 30) +#define RX_MISSED_FRAME (1 << 31) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define RX_ERROR (RX_WDOG_TIMER | RX_RUNT | RX_OVERLEN | RX_COLL | RX_MII_ERROR | RX_CRC_ERROR | RX_LEN_ERROR | RX_U_CNTRL_FRAME | RX_MISSED_FRAME) +#define MAC_RX_BUFF0_ADDR 0x4 +#define RX_DMA_ENABLE (1 << 0) +#define RX_T_DONE (1 << 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define RX_GET_DMA_BUFFER(X) (((X) >> 2) & 0x3) +#define RX_SET_BUFF_ADDR(X) ((X) & 0xffffffc0) +#define MAC_RX_BUFF1_STATUS 0x10 +#define MAC_RX_BUFF1_ADDR 0x14 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAC_RX_BUFF2_STATUS 0x20 +#define MAC_RX_BUFF2_ADDR 0x24 +#define MAC_RX_BUFF3_STATUS 0x30 +#define MAC_RX_BUFF3_ADDR 0x34 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_BASE UART0_ADDR +#define UART_DEBUG_BASE UART3_ADDR +#define UART_RX 0 +#define UART_TX 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_IER 8 +#define UART_IIR 0xC +#define UART_FCR 0x10 +#define UART_LCR 0x14 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_MCR 0x18 +#define UART_LSR 0x1C +#define UART_MSR 0x20 +#define UART_CLK 0x28 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_MOD_CNTRL 0x100 +#define UART_FCR_ENABLE_FIFO 0x01 +#define UART_FCR_CLEAR_RCVR 0x02 +#define UART_FCR_CLEAR_XMIT 0x04 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_FCR_DMA_SELECT 0x08 +#define UART_FCR_TRIGGER_MASK 0xF0 +#define UART_FCR_R_TRIGGER_1 0x00 +#define UART_FCR_R_TRIGGER_4 0x40 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_FCR_R_TRIGGER_8 0x80 +#define UART_FCR_R_TRIGGER_14 0xA0 +#define UART_FCR_T_TRIGGER_0 0x00 +#define UART_FCR_T_TRIGGER_4 0x10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_FCR_T_TRIGGER_8 0x20 +#define UART_FCR_T_TRIGGER_12 0x30 +#define UART_LCR_SBC 0x40 +#define UART_LCR_SPAR 0x20 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_LCR_EPAR 0x10 +#define UART_LCR_PARITY 0x08 +#define UART_LCR_STOP 0x04 +#define UART_LCR_WLEN5 0x00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_LCR_WLEN6 0x01 +#define UART_LCR_WLEN7 0x02 +#define UART_LCR_WLEN8 0x03 +#define UART_LSR_TEMT 0x40 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_LSR_THRE 0x20 +#define UART_LSR_BI 0x10 +#define UART_LSR_FE 0x08 +#define UART_LSR_PE 0x04 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_LSR_OE 0x02 +#define UART_LSR_DR 0x01 +#define UART_IIR_NO_INT 0x01 +#define UART_IIR_ID 0x06 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_IIR_MSI 0x00 +#define UART_IIR_THRI 0x02 +#define UART_IIR_RDI 0x04 +#define UART_IIR_RLSI 0x06 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_IER_MSI 0x08 +#define UART_IER_RLSI 0x04 +#define UART_IER_THRI 0x02 +#define UART_IER_RDI 0x01 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_MCR_LOOP 0x10 +#define UART_MCR_OUT2 0x08 +#define UART_MCR_OUT1 0x04 +#define UART_MCR_RTS 0x02 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_MCR_DTR 0x01 +#define UART_MSR_DCD 0x80 +#define UART_MSR_RI 0x40 +#define UART_MSR_DSR 0x20 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_MSR_CTS 0x10 +#define UART_MSR_DDCD 0x08 +#define UART_MSR_TERI 0x04 +#define UART_MSR_DDSR 0x02 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UART_MSR_DCTS 0x01 +#define UART_MSR_ANY_DELTA 0x0F +#define SSI0_STATUS 0xB1600000 +#define SSI_STATUS_BF (1 << 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_STATUS_OF (1 << 3) +#define SSI_STATUS_UF (1 << 2) +#define SSI_STATUS_D (1 << 1) +#define SSI_STATUS_B (1 << 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI0_INT 0xB1600004 +#define SSI_INT_OI (1 << 3) +#define SSI_INT_UI (1 << 2) +#define SSI_INT_DI (1 << 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI0_INT_ENABLE 0xB1600008 +#define SSI_INTE_OIE (1 << 3) +#define SSI_INTE_UIE (1 << 2) +#define SSI_INTE_DIE (1 << 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI0_CONFIG 0xB1600020 +#define SSI_CONFIG_AO (1 << 24) +#define SSI_CONFIG_DO (1 << 23) +#define SSI_CONFIG_ALEN_BIT 20 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_CONFIG_ALEN_MASK (0x7 << 20) +#define SSI_CONFIG_DLEN_BIT 16 +#define SSI_CONFIG_DLEN_MASK (0x7 << 16) +#define SSI_CONFIG_DD (1 << 11) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_CONFIG_AD (1 << 10) +#define SSI_CONFIG_BM_BIT 8 +#define SSI_CONFIG_BM_MASK (0x3 << 8) +#define SSI_CONFIG_CE (1 << 7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_CONFIG_DP (1 << 6) +#define SSI_CONFIG_DL (1 << 5) +#define SSI_CONFIG_EP (1 << 4) +#define SSI0_ADATA 0xB1600024 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_AD_D (1 << 24) +#define SSI_AD_ADDR_BIT 16 +#define SSI_AD_ADDR_MASK (0xff << 16) +#define SSI_AD_DATA_BIT 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_AD_DATA_MASK (0xfff << 0) +#define SSI0_CLKDIV 0xB1600028 +#define SSI0_CONTROL 0xB1600100 +#define SSI_CONTROL_CD (1 << 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_CONTROL_E (1 << 0) +#define SSI1_STATUS 0xB1680000 +#define SSI1_INT 0xB1680004 +#define SSI1_INT_ENABLE 0xB1680008 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI1_CONFIG 0xB1680020 +#define SSI1_ADATA 0xB1680024 +#define SSI1_CLKDIV 0xB1680028 +#define SSI1_ENABLE 0xB1680100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_STATUS_BF (1 << 4) +#define SSI_STATUS_OF (1 << 3) +#define SSI_STATUS_UF (1 << 2) +#define SSI_STATUS_D (1 << 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_STATUS_B (1 << 0) +#define SSI_INT_OI (1 << 3) +#define SSI_INT_UI (1 << 2) +#define SSI_INT_DI (1 << 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_INTEN_OIE (1 << 3) +#define SSI_INTEN_UIE (1 << 2) +#define SSI_INTEN_DIE (1 << 1) +#define SSI_CONFIG_AO (1 << 24) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_CONFIG_DO (1 << 23) +#define SSI_CONFIG_ALEN (7 << 20) +#define SSI_CONFIG_DLEN (15 << 16) +#define SSI_CONFIG_DD (1 << 11) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_CONFIG_AD (1 << 10) +#define SSI_CONFIG_BM (3 << 8) +#define SSI_CONFIG_CE (1 << 7) +#define SSI_CONFIG_DP (1 << 6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_CONFIG_DL (1 << 5) +#define SSI_CONFIG_EP (1 << 4) +#define SSI_CONFIG_ALEN_N(N) ((N-1) << 20) +#define SSI_CONFIG_DLEN_N(N) ((N-1) << 16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_CONFIG_BM_HI (0 << 8) +#define SSI_CONFIG_BM_LO (1 << 8) +#define SSI_CONFIG_BM_CY (2 << 8) +#define SSI_ADATA_D (1 << 24) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_ADATA_ADDR (0xFF << 16) +#define SSI_ADATA_DATA 0x0FFF +#define SSI_ADATA_ADDR_N(N) (N << 16) +#define SSI_ENABLE_CD (1 << 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSI_ENABLE_E (1 << 0) +#define IRDA_BASE 0xB0300000 +#define IR_RING_PTR_STATUS (IRDA_BASE + 0x00) +#define IR_RING_BASE_ADDR_H (IRDA_BASE + 0x04) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IR_RING_BASE_ADDR_L (IRDA_BASE + 0x08) +#define IR_RING_SIZE (IRDA_BASE + 0x0C) +#define IR_RING_PROMPT (IRDA_BASE + 0x10) +#define IR_RING_ADDR_CMPR (IRDA_BASE + 0x14) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IR_INT_CLEAR (IRDA_BASE + 0x18) +#define IR_CONFIG_1 (IRDA_BASE + 0x20) +#define IR_RX_INVERT_LED (1 << 0) +#define IR_TX_INVERT_LED (1 << 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IR_ST (1 << 2) +#define IR_SF (1 << 3) +#define IR_SIR (1 << 4) +#define IR_MIR (1 << 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IR_FIR (1 << 6) +#define IR_16CRC (1 << 7) +#define IR_TD (1 << 8) +#define IR_RX_ALL (1 << 9) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IR_DMA_ENABLE (1 << 10) +#define IR_RX_ENABLE (1 << 11) +#define IR_TX_ENABLE (1 << 12) +#define IR_LOOPBACK (1 << 14) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IR_SIR_MODE (IR_SIR | IR_DMA_ENABLE | IR_RX_ALL | IR_RX_ENABLE | IR_SF | IR_16CRC) +#define IR_SIR_FLAGS (IRDA_BASE + 0x24) +#define IR_ENABLE (IRDA_BASE + 0x28) +#define IR_RX_STATUS (1 << 9) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IR_TX_STATUS (1 << 10) +#define IR_READ_PHY_CONFIG (IRDA_BASE + 0x2C) +#define IR_WRITE_PHY_CONFIG (IRDA_BASE + 0x30) +#define IR_MAX_PKT_LEN (IRDA_BASE + 0x34) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IR_RX_BYTE_CNT (IRDA_BASE + 0x38) +#define IR_CONFIG_2 (IRDA_BASE + 0x3C) +#define IR_MODE_INV (1 << 0) +#define IR_ONE_PIN (1 << 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IR_INTERFACE_CONFIG (IRDA_BASE + 0x40) +#define SYS_PINFUNC 0xB190002C +#define SYS_PF_USB (1 << 15) +#define SYS_PF_U3 (1 << 14) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_PF_U2 (1 << 13) +#define SYS_PF_U1 (1 << 12) +#define SYS_PF_SRC (1 << 11) +#define SYS_PF_CK5 (1 << 10) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_PF_CK4 (1 << 9) +#define SYS_PF_IRF (1 << 8) +#define SYS_PF_UR3 (1 << 7) +#define SYS_PF_I2D (1 << 6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_PF_I2S (1 << 5) +#define SYS_PF_NI2 (1 << 4) +#define SYS_PF_U0 (1 << 3) +#define SYS_PF_RD (1 << 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_PF_A97 (1 << 1) +#define SYS_PF_S0 (1 << 0) +#define SYS_PF_PC (1 << 18) +#define SYS_PF_LCD (1 << 17) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_PF_CS (1 << 16) +#define SYS_PF_EX0 (1 << 9) +#define SYS_PF_PSC2_MASK (7 << 17) +#define SYS_PF_PSC2_AC97 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_PF_PSC2_SPI 0 +#define SYS_PF_PSC2_I2S (1 << 17) +#define SYS_PF_PSC2_SMBUS (3 << 17) +#define SYS_PF_PSC2_GPIO (7 << 17) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_PF_PSC3_MASK (7 << 20) +#define SYS_PF_PSC3_AC97 0 +#define SYS_PF_PSC3_SPI 0 +#define SYS_PF_PSC3_I2S (1 << 20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_PF_PSC3_SMBUS (3 << 20) +#define SYS_PF_PSC3_GPIO (7 << 20) +#define SYS_PF_PSC1_S1 (1 << 1) +#define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_TRIOUTRD 0xB1900100 +#define SYS_TRIOUTCLR 0xB1900100 +#define SYS_OUTPUTRD 0xB1900108 +#define SYS_OUTPUTSET 0xB1900108 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_OUTPUTCLR 0xB190010C +#define SYS_PINSTATERD 0xB1900110 +#define SYS_PININPUTEN 0xB1900110 +#define GPIO2_BASE 0xB1700000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GPIO2_DIR (GPIO2_BASE + 0) +#define GPIO2_OUTPUT (GPIO2_BASE + 8) +#define GPIO2_PINSTATE (GPIO2_BASE + 0xC) +#define GPIO2_INTENABLE (GPIO2_BASE + 0x10) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GPIO2_ENABLE (GPIO2_BASE + 0x14) +#define SYS_SCRATCH0 0xB1900018 +#define SYS_SCRATCH1 0xB190001C +#define SYS_WAKEMSK 0xB1900034 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_ENDIAN 0xB1900038 +#define SYS_POWERCTRL 0xB190003C +#define SYS_WAKESRC 0xB190005C +#define SYS_SLPPWR 0xB1900078 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_SLEEP 0xB190007C +#define SYS_FREQCTRL0 0xB1900020 +#define SYS_FC_FRDIV2_BIT 22 +#define SYS_FC_FRDIV2_MASK (0xff << SYS_FC_FRDIV2_BIT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_FC_FE2 (1 << 21) +#define SYS_FC_FS2 (1 << 20) +#define SYS_FC_FRDIV1_BIT 12 +#define SYS_FC_FRDIV1_MASK (0xff << SYS_FC_FRDIV1_BIT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_FC_FE1 (1 << 11) +#define SYS_FC_FS1 (1 << 10) +#define SYS_FC_FRDIV0_BIT 2 +#define SYS_FC_FRDIV0_MASK (0xff << SYS_FC_FRDIV0_BIT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_FC_FE0 (1 << 1) +#define SYS_FC_FS0 (1 << 0) +#define SYS_FREQCTRL1 0xB1900024 +#define SYS_FC_FRDIV5_BIT 22 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_FC_FRDIV5_MASK (0xff << SYS_FC_FRDIV5_BIT) +#define SYS_FC_FE5 (1 << 21) +#define SYS_FC_FS5 (1 << 20) +#define SYS_FC_FRDIV4_BIT 12 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_FC_FRDIV4_MASK (0xff << SYS_FC_FRDIV4_BIT) +#define SYS_FC_FE4 (1 << 11) +#define SYS_FC_FS4 (1 << 10) +#define SYS_FC_FRDIV3_BIT 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_FC_FRDIV3_MASK (0xff << SYS_FC_FRDIV3_BIT) +#define SYS_FC_FE3 (1 << 1) +#define SYS_FC_FS3 (1 << 0) +#define SYS_CLKSRC 0xB1900028 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_CS_ME1_BIT 27 +#define SYS_CS_ME1_MASK (0x7 << SYS_CS_ME1_BIT) +#define SYS_CS_DE1 (1 << 26) +#define SYS_CS_CE1 (1 << 25) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_CS_ME0_BIT 22 +#define SYS_CS_ME0_MASK (0x7 << SYS_CS_ME0_BIT) +#define SYS_CS_DE0 (1 << 21) +#define SYS_CS_CE0 (1 << 20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_CS_MI2_BIT 17 +#define SYS_CS_MI2_MASK (0x7 << SYS_CS_MI2_BIT) +#define SYS_CS_DI2 (1 << 16) +#define SYS_CS_CI2 (1 << 15) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_CS_MUH_BIT 12 +#define SYS_CS_MUH_MASK (0x7 << SYS_CS_MUH_BIT) +#define SYS_CS_DUH (1 << 11) +#define SYS_CS_CUH (1 << 10) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_CS_MUD_BIT 7 +#define SYS_CS_MUD_MASK (0x7 << SYS_CS_MUD_BIT) +#define SYS_CS_DUD (1 << 6) +#define SYS_CS_CUD (1 << 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_CS_MIR_BIT 2 +#define SYS_CS_MIR_MASK (0x7 << SYS_CS_MIR_BIT) +#define SYS_CS_DIR (1 << 1) +#define SYS_CS_CIR (1 << 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_CS_MUX_AUX 0x1 +#define SYS_CS_MUX_FQ0 0x2 +#define SYS_CS_MUX_FQ1 0x3 +#define SYS_CS_MUX_FQ2 0x4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_CS_MUX_FQ3 0x5 +#define SYS_CS_MUX_FQ4 0x6 +#define SYS_CS_MUX_FQ5 0x7 +#define SYS_CPUPLL 0xB1900060 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_AUXPLL 0xB1900064 +#define AC97C_CONFIG 0xB0000000 +#define AC97C_RECV_SLOTS_BIT 13 +#define AC97C_RECV_SLOTS_MASK (0x3ff << AC97C_RECV_SLOTS_BIT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define AC97C_XMIT_SLOTS_BIT 3 +#define AC97C_XMIT_SLOTS_MASK (0x3ff << AC97C_XMIT_SLOTS_BIT) +#define AC97C_SG (1 << 2) +#define AC97C_SYNC (1 << 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define AC97C_RESET (1 << 0) +#define AC97C_STATUS 0xB0000004 +#define AC97C_XU (1 << 11) +#define AC97C_XO (1 << 10) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define AC97C_RU (1 << 9) +#define AC97C_RO (1 << 8) +#define AC97C_READY (1 << 7) +#define AC97C_CP (1 << 6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define AC97C_TR (1 << 5) +#define AC97C_TE (1 << 4) +#define AC97C_TF (1 << 3) +#define AC97C_RR (1 << 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define AC97C_RE (1 << 1) +#define AC97C_RF (1 << 0) +#define AC97C_DATA 0xB0000008 +#define AC97C_CMD 0xB000000C +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define AC97C_WD_BIT 16 +#define AC97C_READ (1 << 7) +#define AC97C_INDEX_MASK 0x7f +#define AC97C_CNTRL 0xB0000010 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define AC97C_RS (1 << 1) +#define AC97C_CE (1 << 0) +#define SD0_XMIT_FIFO 0xB0600000 +#define SD0_RECV_FIFO 0xB0600004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SD1_XMIT_FIFO 0xB0680000 +#define SD1_RECV_FIFO 0xB0680004 +#define IOPORT_RESOURCE_START 0x10000000 +#define IOPORT_RESOURCE_END 0xffffffff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOMEM_RESOURCE_START 0x10000000 +#define IOMEM_RESOURCE_END 0xffffffff +#define PCI_IO_START 0 +#define PCI_IO_END 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PCI_MEM_START 0 +#define PCI_MEM_END 0 +#define PCI_FIRST_DEVFN 0 +#define PCI_LAST_DEVFN 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef _LANGUAGE_ASSEMBLY +typedef volatile struct { + u32 toytrim; + u32 toywrite; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 toymatch0; + u32 toymatch1; + u32 toymatch2; + u32 cntrctrl; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 scratch0; + u32 scratch1; + u32 freqctrl0; + u32 freqctrl1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 clksrc; + u32 pinfunc; + u32 reserved0; + u32 wakemsk; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 endian; + u32 powerctrl; + u32 toyread; + u32 rtctrim; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 rtcwrite; + u32 rtcmatch0; + u32 rtcmatch1; + u32 rtcmatch2; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 rtcread; + u32 wakesrc; + u32 cpupll; + u32 auxpll; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 reserved1; + u32 reserved2; + u32 reserved3; + u32 reserved4; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 slppwr; + u32 sleep; + u32 reserved5[32]; + u32 trioutrd; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define trioutclr trioutrd + u32 reserved6; + u32 outputrd; +#define outputset outputrd +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 outputclr; + u32 pinstaterd; +#define pininputen pinstaterd +} AU1X00_SYS; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef _LANGUAGE_ASSEMBLY +struct cpu_spec { + unsigned int prid_mask; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int prid_value; + char *cpu_name; + unsigned char cpu_od; + unsigned char cpu_bclk; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char cpu_pll_wo; +}; +#endif +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mach-au1x00/au1xxx_psc.h b/9/platforms/android-16/arch-mips/usr/include/asm/mach-au1x00/au1xxx_psc.h new file mode 100644 index 0000000..2f01be0 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mach-au1x00/au1xxx_psc.h @@ -0,0 +1,449 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _AU1000_PSC_H_ +#define _AU1000_PSC_H_ +#define PSC_SEL_OFFSET 0x00000000 +#define PSC_CTRL_OFFSET 0x00000004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SEL_CLK_MASK (3 << 4) +#define PSC_SEL_CLK_INTCLK (0 << 4) +#define PSC_SEL_CLK_EXTCLK (1 << 4) +#define PSC_SEL_CLK_SERCLK (2 << 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SEL_PS_MASK 0x00000007 +#define PSC_SEL_PS_DISABLED 0 +#define PSC_SEL_PS_SPIMODE 2 +#define PSC_SEL_PS_I2SMODE 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SEL_PS_AC97MODE 4 +#define PSC_SEL_PS_SMBUSMODE 5 +#define PSC_CTRL_DISABLE 0 +#define PSC_CTRL_SUSPEND 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_CTRL_ENABLE 3 +#define PSC_AC97CFG_OFFSET 0x00000008 +#define PSC_AC97MSK_OFFSET 0x0000000c +#define PSC_AC97PCR_OFFSET 0x00000010 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97STAT_OFFSET 0x00000014 +#define PSC_AC97EVNT_OFFSET 0x00000018 +#define PSC_AC97TXRX_OFFSET 0x0000001c +#define PSC_AC97CDC_OFFSET 0x00000020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97RST_OFFSET 0x00000024 +#define PSC_AC97GPO_OFFSET 0x00000028 +#define PSC_AC97GPI_OFFSET 0x0000002c +#define AC97_PSC_SEL (AC97_PSC_BASE + PSC_SEL_OFFSET) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define AC97_PSC_CTRL (AC97_PSC_BASE + PSC_CTRL_OFFSET) +#define PSC_AC97CFG (AC97_PSC_BASE + PSC_AC97CFG_OFFSET) +#define PSC_AC97MSK (AC97_PSC_BASE + PSC_AC97MSK_OFFSET) +#define PSC_AC97PCR (AC97_PSC_BASE + PSC_AC97PCR_OFFSET) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97STAT (AC97_PSC_BASE + PSC_AC97STAT_OFFSET) +#define PSC_AC97EVNT (AC97_PSC_BASE + PSC_AC97EVNT_OFFSET) +#define PSC_AC97TXRX (AC97_PSC_BASE + PSC_AC97TXRX_OFFSET) +#define PSC_AC97CDC (AC97_PSC_BASE + PSC_AC97CDC_OFFSET) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97RST (AC97_PSC_BASE + PSC_AC97RST_OFFSET) +#define PSC_AC97GPO (AC97_PSC_BASE + PSC_AC97GPO_OFFSET) +#define PSC_AC97GPI (AC97_PSC_BASE + PSC_AC97GPI_OFFSET) +#define PSC_AC97CFG_RT_MASK (3 << 30) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97CFG_RT_FIFO1 (0 << 30) +#define PSC_AC97CFG_RT_FIFO2 (1 << 30) +#define PSC_AC97CFG_RT_FIFO4 (2 << 30) +#define PSC_AC97CFG_RT_FIFO8 (3 << 30) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97CFG_TT_MASK (3 << 28) +#define PSC_AC97CFG_TT_FIFO1 (0 << 28) +#define PSC_AC97CFG_TT_FIFO2 (1 << 28) +#define PSC_AC97CFG_TT_FIFO4 (2 << 28) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97CFG_TT_FIFO8 (3 << 28) +#define PSC_AC97CFG_DD_DISABLE (1 << 27) +#define PSC_AC97CFG_DE_ENABLE (1 << 26) +#define PSC_AC97CFG_SE_ENABLE (1 << 25) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97CFG_LEN_MASK (0xf << 21) +#define PSC_AC97CFG_TXSLOT_MASK (0x3ff << 11) +#define PSC_AC97CFG_RXSLOT_MASK (0x3ff << 1) +#define PSC_AC97CFG_GE_ENABLE (1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97CFG_TXSLOT_ENA(x) (1 << (((x) - 3) + 11)) +#define PSC_AC97CFG_RXSLOT_ENA(x) (1 << (((x) - 3) + 1)) +#define PSC_AC97CFG_SET_LEN(x) (((((x) - 2) / 2) & 0xf) << 21) +#define PSC_AC97CFG_GET_LEN(x) (((((x) >> 21) & 0xf) * 2) + 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97MSK_GR (1 << 25) +#define PSC_AC97MSK_CD (1 << 24) +#define PSC_AC97MSK_RR (1 << 13) +#define PSC_AC97MSK_RO (1 << 12) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97MSK_RU (1 << 11) +#define PSC_AC97MSK_TR (1 << 10) +#define PSC_AC97MSK_TO (1 << 9) +#define PSC_AC97MSK_TU (1 << 8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97MSK_RD (1 << 5) +#define PSC_AC97MSK_TD (1 << 4) +#define PSC_AC97MSK_ALLMASK (PSC_AC97MSK_GR | PSC_AC97MSK_CD | PSC_AC97MSK_RR | PSC_AC97MSK_RO | PSC_AC97MSK_RU | PSC_AC97MSK_TR | PSC_AC97MSK_TO | PSC_AC97MSK_TU | PSC_AC97MSK_RD | PSC_AC97MSK_TD) +#define PSC_AC97PCR_RC (1 << 6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97PCR_RP (1 << 5) +#define PSC_AC97PCR_RS (1 << 4) +#define PSC_AC97PCR_TC (1 << 2) +#define PSC_AC97PCR_TP (1 << 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97PCR_TS (1 << 0) +#define PSC_AC97STAT_CB (1 << 26) +#define PSC_AC97STAT_CP (1 << 25) +#define PSC_AC97STAT_CR (1 << 24) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97STAT_RF (1 << 13) +#define PSC_AC97STAT_RE (1 << 12) +#define PSC_AC97STAT_RR (1 << 11) +#define PSC_AC97STAT_TF (1 << 10) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97STAT_TE (1 << 9) +#define PSC_AC97STAT_TR (1 << 8) +#define PSC_AC97STAT_RB (1 << 5) +#define PSC_AC97STAT_TB (1 << 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97STAT_DI (1 << 2) +#define PSC_AC97STAT_DR (1 << 1) +#define PSC_AC97STAT_SR (1 << 0) +#define PSC_AC97EVNT_GR (1 << 25) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97EVNT_CD (1 << 24) +#define PSC_AC97EVNT_RR (1 << 13) +#define PSC_AC97EVNT_RO (1 << 12) +#define PSC_AC97EVNT_RU (1 << 11) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97EVNT_TR (1 << 10) +#define PSC_AC97EVNT_TO (1 << 9) +#define PSC_AC97EVNT_TU (1 << 8) +#define PSC_AC97EVNT_RD (1 << 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97EVNT_TD (1 << 4) +#define PSC_AC97CDC_RD (1 << 25) +#define PSC_AC97CDC_ID_MASK (3 << 23) +#define PSC_AC97CDC_INDX_MASK (0x7f << 16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_AC97CDC_ID(x) (((x) & 0x03) << 23) +#define PSC_AC97CDC_INDX(x) (((x) & 0x7f) << 16) +#define PSC_AC97RST_RST (1 << 1) +#define PSC_AC97RST_SNC (1 << 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef struct psc_i2s { + u32 psc_sel; + u32 psc_ctrl; + u32 psc_i2scfg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 psc_i2smsk; + u32 psc_i2spcr; + u32 psc_i2sstat; + u32 psc_i2sevent; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 psc_i2stxrx; + u32 psc_i2sudf; +} psc_i2s_t; +#define PSC_I2SCFG_OFFSET 0x08 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SMASK_OFFSET 0x0C +#define PSC_I2SPCR_OFFSET 0x10 +#define PSC_I2SSTAT_OFFSET 0x14 +#define PSC_I2SEVENT_OFFSET 0x18 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SRXTX_OFFSET 0x1C +#define PSC_I2SUDF_OFFSET 0x20 +#define PSC_I2SCFG_RT_MASK (3 << 30) +#define PSC_I2SCFG_RT_FIFO1 (0 << 30) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SCFG_RT_FIFO2 (1 << 30) +#define PSC_I2SCFG_RT_FIFO4 (2 << 30) +#define PSC_I2SCFG_RT_FIFO8 (3 << 30) +#define PSC_I2SCFG_TT_MASK (3 << 28) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SCFG_TT_FIFO1 (0 << 28) +#define PSC_I2SCFG_TT_FIFO2 (1 << 28) +#define PSC_I2SCFG_TT_FIFO4 (2 << 28) +#define PSC_I2SCFG_TT_FIFO8 (3 << 28) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SCFG_DD_DISABLE (1 << 27) +#define PSC_I2SCFG_DE_ENABLE (1 << 26) +#define PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16) +#define PSC_I2SCFG_WS(n) ((n & 0xFF) << 16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SCFG_WS_MASK (PSC_I2SCFG_WS(0x3F)) +#define PSC_I2SCFG_WI (1 << 15) +#define PSC_I2SCFG_DIV_MASK (3 << 13) +#define PSC_I2SCFG_DIV2 (0 << 13) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SCFG_DIV4 (1 << 13) +#define PSC_I2SCFG_DIV8 (2 << 13) +#define PSC_I2SCFG_DIV16 (3 << 13) +#define PSC_I2SCFG_BI (1 << 12) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SCFG_BUF (1 << 11) +#define PSC_I2SCFG_MLJ (1 << 10) +#define PSC_I2SCFG_XM (1 << 9) +#define PSC_I2SCFG_SET_LEN(x) ((((x) - 1) & 0x1f) << 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SCFG_GET_LEN(x) ((((x) >> 4) & 0x1f) + 1) +#define PSC_I2SCFG_LB (1 << 2) +#define PSC_I2SCFG_MLF (1 << 1) +#define PSC_I2SCFG_MS (1 << 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SMSK_RR (1 << 13) +#define PSC_I2SMSK_RO (1 << 12) +#define PSC_I2SMSK_RU (1 << 11) +#define PSC_I2SMSK_TR (1 << 10) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SMSK_TO (1 << 9) +#define PSC_I2SMSK_TU (1 << 8) +#define PSC_I2SMSK_RD (1 << 5) +#define PSC_I2SMSK_TD (1 << 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SMSK_ALLMASK (PSC_I2SMSK_RR | PSC_I2SMSK_RO | PSC_I2SMSK_RU | PSC_I2SMSK_TR | PSC_I2SMSK_TO | PSC_I2SMSK_TU | PSC_I2SMSK_RD | PSC_I2SMSK_TD) +#define PSC_I2SPCR_RC (1 << 6) +#define PSC_I2SPCR_RP (1 << 5) +#define PSC_I2SPCR_RS (1 << 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SPCR_TC (1 << 2) +#define PSC_I2SPCR_TP (1 << 1) +#define PSC_I2SPCR_TS (1 << 0) +#define PSC_I2SSTAT_RF (1 << 13) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SSTAT_RE (1 << 12) +#define PSC_I2SSTAT_RR (1 << 11) +#define PSC_I2SSTAT_TF (1 << 10) +#define PSC_I2SSTAT_TE (1 << 9) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SSTAT_TR (1 << 8) +#define PSC_I2SSTAT_RB (1 << 5) +#define PSC_I2SSTAT_TB (1 << 4) +#define PSC_I2SSTAT_DI (1 << 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SSTAT_DR (1 << 1) +#define PSC_I2SSTAT_SR (1 << 0) +#define PSC_I2SEVNT_RR (1 << 13) +#define PSC_I2SEVNT_RO (1 << 12) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SEVNT_RU (1 << 11) +#define PSC_I2SEVNT_TR (1 << 10) +#define PSC_I2SEVNT_TO (1 << 9) +#define PSC_I2SEVNT_TU (1 << 8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_I2SEVNT_RD (1 << 5) +#define PSC_I2SEVNT_TD (1 << 4) +typedef struct psc_spi { + u32 psc_sel; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 psc_ctrl; + u32 psc_spicfg; + u32 psc_spimsk; + u32 psc_spipcr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 psc_spistat; + u32 psc_spievent; + u32 psc_spitxrx; +} psc_spi_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPICFG_RT_MASK (3 << 30) +#define PSC_SPICFG_RT_FIFO1 (0 << 30) +#define PSC_SPICFG_RT_FIFO2 (1 << 30) +#define PSC_SPICFG_RT_FIFO4 (2 << 30) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPICFG_RT_FIFO8 (3 << 30) +#define PSC_SPICFG_TT_MASK (3 << 28) +#define PSC_SPICFG_TT_FIFO1 (0 << 28) +#define PSC_SPICFG_TT_FIFO2 (1 << 28) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPICFG_TT_FIFO4 (2 << 28) +#define PSC_SPICFG_TT_FIFO8 (3 << 28) +#define PSC_SPICFG_DD_DISABLE (1 << 27) +#define PSC_SPICFG_DE_ENABLE (1 << 26) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPICFG_CLR_BAUD(x) ((x) & ~((0x3f) << 15)) +#define PSC_SPICFG_SET_BAUD(x) (((x) & 0x3f) << 15) +#define PSC_SPICFG_SET_DIV(x) (((x) & 0x03) << 13) +#define PSC_SPICFG_DIV2 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPICFG_DIV4 1 +#define PSC_SPICFG_DIV8 2 +#define PSC_SPICFG_DIV16 3 +#define PSC_SPICFG_BI (1 << 12) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPICFG_PSE (1 << 11) +#define PSC_SPICFG_CGE (1 << 10) +#define PSC_SPICFG_CDE (1 << 9) +#define PSC_SPICFG_CLR_LEN(x) ((x) & ~((0x1f) << 4)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPICFG_SET_LEN(x) (((x-1) & 0x1f) << 4) +#define PSC_SPICFG_LB (1 << 3) +#define PSC_SPICFG_MLF (1 << 1) +#define PSC_SPICFG_MO (1 << 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPIMSK_MM (1 << 16) +#define PSC_SPIMSK_RR (1 << 13) +#define PSC_SPIMSK_RO (1 << 12) +#define PSC_SPIMSK_RU (1 << 11) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPIMSK_TR (1 << 10) +#define PSC_SPIMSK_TO (1 << 9) +#define PSC_SPIMSK_TU (1 << 8) +#define PSC_SPIMSK_SD (1 << 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPIMSK_MD (1 << 4) +#define PSC_SPIMSK_ALLMASK (PSC_SPIMSK_MM | PSC_SPIMSK_RR | PSC_SPIMSK_RO | PSC_SPIMSK_TO | PSC_SPIMSK_TU | PSC_SPIMSK_SD | PSC_SPIMSK_MD) +#define PSC_SPIPCR_RC (1 << 6) +#define PSC_SPIPCR_SP (1 << 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPIPCR_SS (1 << 4) +#define PSC_SPIPCR_TC (1 << 2) +#define PSC_SPIPCR_MS (1 << 0) +#define PSC_SPISTAT_RF (1 << 13) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPISTAT_RE (1 << 12) +#define PSC_SPISTAT_RR (1 << 11) +#define PSC_SPISTAT_TF (1 << 10) +#define PSC_SPISTAT_TE (1 << 9) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPISTAT_TR (1 << 8) +#define PSC_SPISTAT_SB (1 << 5) +#define PSC_SPISTAT_MB (1 << 4) +#define PSC_SPISTAT_DI (1 << 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPISTAT_DR (1 << 1) +#define PSC_SPISTAT_SR (1 << 0) +#define PSC_SPIEVNT_MM (1 << 16) +#define PSC_SPIEVNT_RR (1 << 13) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPIEVNT_RO (1 << 12) +#define PSC_SPIEVNT_RU (1 << 11) +#define PSC_SPIEVNT_TR (1 << 10) +#define PSC_SPIEVNT_TO (1 << 9) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPIEVNT_TU (1 << 8) +#define PSC_SPIEVNT_SD (1 << 5) +#define PSC_SPIEVNT_MD (1 << 4) +#define PSC_SPITXRX_LC (1 << 29) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SPITXRX_SR (1 << 28) +typedef struct psc_smb { + u32 psc_sel; + u32 psc_ctrl; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 psc_smbcfg; + u32 psc_smbmsk; + u32 psc_smbpcr; + u32 psc_smbstat; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 psc_smbevnt; + u32 psc_smbtxrx; + u32 psc_smbtmr; +} psc_smb_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBCFG_RT_MASK (3 << 30) +#define PSC_SMBCFG_RT_FIFO1 (0 << 30) +#define PSC_SMBCFG_RT_FIFO2 (1 << 30) +#define PSC_SMBCFG_RT_FIFO4 (2 << 30) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBCFG_RT_FIFO8 (3 << 30) +#define PSC_SMBCFG_TT_MASK (3 << 28) +#define PSC_SMBCFG_TT_FIFO1 (0 << 28) +#define PSC_SMBCFG_TT_FIFO2 (1 << 28) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBCFG_TT_FIFO4 (2 << 28) +#define PSC_SMBCFG_TT_FIFO8 (3 << 28) +#define PSC_SMBCFG_DD_DISABLE (1 << 27) +#define PSC_SMBCFG_DE_ENABLE (1 << 26) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBCFG_SET_DIV(x) (((x) & 0x03) << 13) +#define PSC_SMBCFG_DIV2 0 +#define PSC_SMBCFG_DIV4 1 +#define PSC_SMBCFG_DIV8 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBCFG_DIV16 3 +#define PSC_SMBCFG_GCE (1 << 9) +#define PSC_SMBCFG_SFM (1 << 8) +#define PSC_SMBCFG_SET_SLV(x) (((x) & 0x7f) << 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBMSK_DN (1 << 30) +#define PSC_SMBMSK_AN (1 << 29) +#define PSC_SMBMSK_AL (1 << 28) +#define PSC_SMBMSK_RR (1 << 13) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBMSK_RO (1 << 12) +#define PSC_SMBMSK_RU (1 << 11) +#define PSC_SMBMSK_TR (1 << 10) +#define PSC_SMBMSK_TO (1 << 9) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBMSK_TU (1 << 8) +#define PSC_SMBMSK_SD (1 << 5) +#define PSC_SMBMSK_MD (1 << 4) +#define PSC_SMBMSK_ALLMASK (PSC_SMBMSK_DN | PSC_SMBMSK_AN | PSC_SMBMSK_AL | PSC_SMBMSK_RR | PSC_SMBMSK_RO | PSC_SMBMSK_TO | PSC_SMBMSK_TU | PSC_SMBMSK_SD | PSC_SMBMSK_MD) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBPCR_DC (1 << 2) +#define PSC_SMBPCR_MS (1 << 0) +#define PSC_SMBSTAT_BB (1 << 28) +#define PSC_SMBSTAT_RF (1 << 13) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBSTAT_RE (1 << 12) +#define PSC_SMBSTAT_RR (1 << 11) +#define PSC_SMBSTAT_TF (1 << 10) +#define PSC_SMBSTAT_TE (1 << 9) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBSTAT_TR (1 << 8) +#define PSC_SMBSTAT_SB (1 << 5) +#define PSC_SMBSTAT_MB (1 << 4) +#define PSC_SMBSTAT_DI (1 << 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBSTAT_DR (1 << 1) +#define PSC_SMBSTAT_SR (1 << 0) +#define PSC_SMBEVNT_DN (1 << 30) +#define PSC_SMBEVNT_AN (1 << 29) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBEVNT_AL (1 << 28) +#define PSC_SMBEVNT_RR (1 << 13) +#define PSC_SMBEVNT_RO (1 << 12) +#define PSC_SMBEVNT_RU (1 << 11) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBEVNT_TR (1 << 10) +#define PSC_SMBEVNT_TO (1 << 9) +#define PSC_SMBEVNT_TU (1 << 8) +#define PSC_SMBEVNT_SD (1 << 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBEVNT_MD (1 << 4) +#define PSC_SMBEVNT_ALLCLR (PSC_SMBEVNT_DN | PSC_SMBEVNT_AN | PSC_SMBEVNT_AL | PSC_SMBEVNT_RR | PSC_SMBEVNT_RO | PSC_SMBEVNT_TO | PSC_SMBEVNT_TU | PSC_SMBEVNT_SD | PSC_SMBEVNT_MD) +#define PSC_SMBTXRX_RSR (1 << 28) +#define PSC_SMBTXRX_STP (1 << 29) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBTXRX_DATAMASK 0xff +#define PSC_SMBTMR_SET_TH(x) (((x) & 0x03) << 30) +#define PSC_SMBTMR_SET_PS(x) (((x) & 0x1f) << 25) +#define PSC_SMBTMR_SET_PU(x) (((x) & 0x1f) << 20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PSC_SMBTMR_SET_SH(x) (((x) & 0x1f) << 15) +#define PSC_SMBTMR_SET_SU(x) (((x) & 0x1f) << 10) +#define PSC_SMBTMR_SET_CL(x) (((x) & 0x1f) << 5) +#define PSC_SMBTMR_SET_CH(x) (((x) & 0x1f) << 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mach-generic/spaces.h b/9/platforms/android-16/arch-mips/usr/include/asm/mach-generic/spaces.h new file mode 100644 index 0000000..0ec1f57 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mach-generic/spaces.h @@ -0,0 +1,41 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_MACH_GENERIC_SPACES_H +#define _ASM_MACH_GENERIC_SPACES_H +#include <linux/const.h> +#ifndef PHYS_OFFSET +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PHYS_OFFSET _AC(0, UL) +#endif +#define CAC_BASE _AC(0x80000000, UL) +#define IO_BASE _AC(0xa0000000, UL) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UNCAC_BASE _AC(0xa0000000, UL) +#ifndef MAP_BASE +#define MAP_BASE _AC(0xc0000000, UL) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef HIGHMEM_START +#define HIGHMEM_START _AC(0x20000000, UL) +#endif +#ifndef PAGE_OFFSET +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PAGE_OFFSET (CAC_BASE + PHYS_OFFSET) +#endif +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mach-ip22/ds1286.h b/9/platforms/android-16/arch-mips/usr/include/asm/mach-ip22/ds1286.h new file mode 100644 index 0000000..1ea8a7d --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mach-ip22/ds1286.h @@ -0,0 +1,25 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_MACH_IP22_DS1286_H +#define __ASM_MACH_IP22_DS1286_H +#include <asm/sgi/hpc3.h> +#define rtc_read(reg) (hpc3c0->rtcregs[(reg)] & 0xff) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define rtc_write(data, reg) do { hpc3c0->rtcregs[(reg)] = (data); } while(0) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mc146818rtc.h b/9/platforms/android-16/arch-mips/usr/include/asm/mc146818rtc.h new file mode 100644 index 0000000..6887ef4 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mc146818rtc.h @@ -0,0 +1,23 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_MC146818RTC_H +#define _ASM_MC146818RTC_H +#include <mc146818rtc.h> +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mips-boards/bonito64.h b/9/platforms/android-16/arch-mips/usr/include/asm/mips-boards/bonito64.h new file mode 100644 index 0000000..7561bbb --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mips-boards/bonito64.h @@ -0,0 +1,363 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_MIPS_BOARDS_BONITO64_H +#define _ASM_MIPS_BOARDS_BONITO64_H +#ifdef __ASSEMBLY__ +#define BONITO(x) (x) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO(x) *(volatile u32 *)(_pcictrl_bonito + (x)) +#define BONITO_BOOT_BASE 0x1fc00000 +#define BONITO_BOOT_SIZE 0x00100000 +#define BONITO_BOOT_TOP (BONITO_BOOT_BASE+BONITO_BOOT_SIZE-1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_FLASH_BASE 0x1c000000 +#define BONITO_FLASH_SIZE 0x03000000 +#define BONITO_FLASH_TOP (BONITO_FLASH_BASE+BONITO_FLASH_SIZE-1) +#define BONITO_SOCKET_BASE 0x1f800000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_SOCKET_SIZE 0x00400000 +#define BONITO_SOCKET_TOP (BONITO_SOCKET_BASE+BONITO_SOCKET_SIZE-1) +#define BONITO_REG_BASE 0x1fe00000 +#define BONITO_REG_SIZE 0x00040000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_REG_TOP (BONITO_REG_BASE+BONITO_REG_SIZE-1) +#define BONITO_DEV_BASE 0x1ff00000 +#define BONITO_DEV_SIZE 0x00100000 +#define BONITO_DEV_TOP (BONITO_DEV_BASE+BONITO_DEV_SIZE-1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCILO_BASE 0x10000000 +#define BONITO_PCILO_SIZE 0x0c000000 +#define BONITO_PCILO_TOP (BONITO_PCILO_BASE+BONITO_PCILO_SIZE-1) +#define BONITO_PCILO0_BASE 0x10000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCILO1_BASE 0x14000000 +#define BONITO_PCILO2_BASE 0x18000000 +#define BONITO_PCIHI_BASE 0x20000000 +#define BONITO_PCIHI_SIZE 0x20000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE+BONITO_PCIHI_SIZE-1) +#define BONITO_PCIIO_BASE 0x1fd00000 +#define BONITO_PCIIO_SIZE 0x00100000 +#define BONITO_PCIIO_TOP (BONITO_PCIIO_BASE+BONITO_PCIIO_SIZE-1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCICFG_BASE 0x1fe80000 +#define BONITO_PCICFG_SIZE 0x00080000 +#define BONITO_PCICFG_TOP (BONITO_PCICFG_BASE+BONITO_PCICFG_SIZE-1) +#define BONITO_PCICONFIGBASE 0x00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_REGBASE 0x100 +#define BONITO_PCI_REG(x) BONITO(BONITO_PCICONFIGBASE + (x)) +#define BONITO_PCIDID BONITO_PCI_REG(0x00) +#define BONITO_PCICMD BONITO_PCI_REG(0x04) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCICLASS BONITO_PCI_REG(0x08) +#define BONITO_PCILTIMER BONITO_PCI_REG(0x0c) +#define BONITO_PCIBASE0 BONITO_PCI_REG(0x10) +#define BONITO_PCIBASE1 BONITO_PCI_REG(0x14) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCIBASE2 BONITO_PCI_REG(0x18) +#define BONITO_PCIEXPRBASE BONITO_PCI_REG(0x30) +#define BONITO_PCIINT BONITO_PCI_REG(0x3c) +#define BONITO_PCICMD_PERR_CLR 0x80000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCICMD_SERR_CLR 0x40000000 +#define BONITO_PCICMD_MABORT_CLR 0x20000000 +#define BONITO_PCICMD_MTABORT_CLR 0x10000000 +#define BONITO_PCICMD_TABORT_CLR 0x08000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCICMD_MPERR_CLR 0x01000000 +#define BONITO_PCICMD_PERRRESPEN 0x00000040 +#define BONITO_PCICMD_ASTEPEN 0x00000080 +#define BONITO_PCICMD_SERREN 0x00000100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCILTIMER_BUSLATENCY 0x0000ff00 +#define BONITO_PCILTIMER_BUSLATENCY_SHIFT 8 +#define BONITO_BONPONCFG BONITO(BONITO_REGBASE + 0x00) +#define BONITO_BONPONCFG_SYSCONTROLLERRD 0x00040000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_BONPONCFG_ROMCS1SAMP 0x00020000 +#define BONITO_BONPONCFG_ROMCS0SAMP 0x00010000 +#define BONITO_BONPONCFG_CPUBIGEND 0x00004000 +#define BONITO_BONPONCFG_BURSTORDER 0x00001000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_BONPONCFG_CPUPARITY 0x00002000 +#define BONITO_BONPONCFG_CPUTYPE 0x00000007 +#define BONITO_BONPONCFG_CPUTYPE_SHIFT 0 +#define BONITO_BONPONCFG_PCIRESET_OUT 0x00000008 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_BONPONCFG_IS_ARBITER 0x00000010 +#define BONITO_BONPONCFG_ROMBOOT 0x000000c0 +#define BONITO_BONPONCFG_ROMBOOT_SHIFT 6 +#define BONITO_BONPONCFG_ROMBOOT_FLASH (0x0<<BONITO_BONPONCFG_ROMBOOT_SHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_BONPONCFG_ROMBOOT_SOCKET (0x1<<BONITO_BONPONCFG_ROMBOOT_SHIFT) +#define BONITO_BONPONCFG_ROMBOOT_SDRAM (0x2<<BONITO_BONPONCFG_ROMBOOT_SHIFT) +#define BONITO_BONPONCFG_ROMBOOT_CPURESET (0x3<<BONITO_BONPONCFG_ROMBOOT_SHIFT) +#define BONITO_BONPONCFG_ROMCS0WIDTH 0x00000100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_BONPONCFG_ROMCS1WIDTH 0x00000200 +#define BONITO_BONPONCFG_ROMCS0FAST 0x00000400 +#define BONITO_BONPONCFG_ROMCS1FAST 0x00000800 +#define BONITO_BONPONCFG_CONFIG_DIS 0x00000020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_BONGENCFG_OFFSET 0x4 +#define BONITO_BONGENCFG BONITO(BONITO_REGBASE + BONITO_BONGENCFG_OFFSET) +#define BONITO_BONGENCFG_DEBUGMODE 0x00000001 +#define BONITO_BONGENCFG_SNOOPEN 0x00000002 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_BONGENCFG_CPUSELFRESET 0x00000004 +#define BONITO_BONGENCFG_FORCE_IRQA 0x00000008 +#define BONITO_BONGENCFG_IRQA_ISOUT 0x00000010 +#define BONITO_BONGENCFG_IRQA_FROM_INT1 0x00000020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_BONGENCFG_BYTESWAP 0x00000040 +#define BONITO_BONGENCFG_UNCACHED 0x00000080 +#define BONITO_BONGENCFG_PREFETCHEN 0x00000100 +#define BONITO_BONGENCFG_WBEHINDEN 0x00000200 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_BONGENCFG_CACHEALG 0x00000c00 +#define BONITO_BONGENCFG_CACHEALG_SHIFT 10 +#define BONITO_BONGENCFG_PCIQUEUE 0x00001000 +#define BONITO_BONGENCFG_CACHESTOP 0x00002000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_BONGENCFG_MSTRBYTESWAP 0x00004000 +#define BONITO_BONGENCFG_BUSERREN 0x00008000 +#define BONITO_BONGENCFG_NORETRYTIMEOUT 0x00010000 +#define BONITO_BONGENCFG_SHORTCOPYTIMEOUT 0x00020000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_IODEVCFG BONITO(BONITO_REGBASE + 0x08) +#define BONITO_SDCFG BONITO(BONITO_REGBASE + 0x0c) +#define BONITO_PCIMAP BONITO(BONITO_REGBASE + 0x10) +#define BONITO_PCIMEMBASECFG BONITO(BONITO_REGBASE + 0x14) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCIMAP_CFG BONITO(BONITO_REGBASE + 0x18) +#define BONITO_GPIODATA_OFFSET 0x1c +#define BONITO_GPIODATA BONITO(BONITO_REGBASE + BONITO_GPIODATA_OFFSET) +#define BONITO_GPIOIE BONITO(BONITO_REGBASE + 0x20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_INTEDGE BONITO(BONITO_REGBASE + 0x24) +#define BONITO_INTSTEER BONITO(BONITO_REGBASE + 0x28) +#define BONITO_INTPOL BONITO(BONITO_REGBASE + 0x2c) +#define BONITO_INTENSET BONITO(BONITO_REGBASE + 0x30) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_INTENCLR BONITO(BONITO_REGBASE + 0x34) +#define BONITO_INTEN BONITO(BONITO_REGBASE + 0x38) +#define BONITO_INTISR BONITO(BONITO_REGBASE + 0x3c) +#define BONITO_PCIMAIL0_OFFSET 0x40 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCIMAIL1_OFFSET 0x44 +#define BONITO_PCIMAIL2_OFFSET 0x48 +#define BONITO_PCIMAIL3_OFFSET 0x4c +#define BONITO_PCIMAIL0 BONITO(BONITO_REGBASE + 0x40) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCIMAIL1 BONITO(BONITO_REGBASE + 0x44) +#define BONITO_PCIMAIL2 BONITO(BONITO_REGBASE + 0x48) +#define BONITO_PCIMAIL3 BONITO(BONITO_REGBASE + 0x4c) +#define BONITO_PCICACHECTRL BONITO(BONITO_REGBASE + 0x50) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCICACHETAG BONITO(BONITO_REGBASE + 0x54) +#define BONITO_PCIBADADDR BONITO(BONITO_REGBASE + 0x58) +#define BONITO_PCIMSTAT BONITO(BONITO_REGBASE + 0x5c) +#define BONITO_CONFIGBASE 0x000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_BONITOBASE 0x100 +#define BONITO_LDMABASE 0x200 +#define BONITO_COPBASE 0x300 +#define BONITO_REG_BLOCKMASK 0x300 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_LDMACTRL BONITO(BONITO_LDMABASE + 0x0) +#define BONITO_LDMASTAT BONITO(BONITO_LDMABASE + 0x0) +#define BONITO_LDMAADDR BONITO(BONITO_LDMABASE + 0x4) +#define BONITO_LDMAGO BONITO(BONITO_LDMABASE + 0x8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_LDMADATA BONITO(BONITO_LDMABASE + 0xc) +#define BONITO_COPCTRL BONITO(BONITO_COPBASE + 0x0) +#define BONITO_COPSTAT BONITO(BONITO_COPBASE + 0x0) +#define BONITO_COPPADDR BONITO(BONITO_COPBASE + 0x4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_COPDADDR BONITO(BONITO_COPBASE + 0x8) +#define BONITO_COPGO BONITO(BONITO_COPBASE + 0xc) +#define BONITO_IDECOPDADDR_DMA_DADDR 0x0ffffffc +#define BONITO_IDECOPDADDR_DMA_DADDR_SHIFT 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_IDECOPPADDR_DMA_PADDR 0xfffffffc +#define BONITO_IDECOPPADDR_DMA_PADDR_SHIFT 2 +#define BONITO_IDECOPGO_DMA_SIZE 0x0000fffe +#define BONITO_IDECOPGO_DMA_SIZE_SHIFT 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_IDECOPGO_DMA_WRITE 0x00010000 +#define BONITO_IDECOPGO_DMAWCOUNT 0x000f0000 +#define BONITO_IDECOPGO_DMAWCOUNT_SHIFT 16 +#define BONITO_IDECOPCTRL_DMA_STARTBIT 0x80000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_IDECOPCTRL_DMA_RSTBIT 0x40000000 +#define BONITO_SDCFG_AROWBITS 0x00000003 +#define BONITO_SDCFG_AROWBITS_SHIFT 0 +#define BONITO_SDCFG_ACOLBITS 0x0000000c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_SDCFG_ACOLBITS_SHIFT 2 +#define BONITO_SDCFG_ABANKBIT 0x00000010 +#define BONITO_SDCFG_ASIDES 0x00000020 +#define BONITO_SDCFG_AABSENT 0x00000040 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_SDCFG_AWIDTH64 0x00000080 +#define BONITO_SDCFG_BROWBITS 0x00000300 +#define BONITO_SDCFG_BROWBITS_SHIFT 8 +#define BONITO_SDCFG_BCOLBITS 0x00000c00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_SDCFG_BCOLBITS_SHIFT 10 +#define BONITO_SDCFG_BBANKBIT 0x00001000 +#define BONITO_SDCFG_BSIDES 0x00002000 +#define BONITO_SDCFG_BABSENT 0x00004000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_SDCFG_BWIDTH64 0x00008000 +#define BONITO_SDCFG_EXTRDDATA 0x00010000 +#define BONITO_SDCFG_EXTRASCAS 0x00020000 +#define BONITO_SDCFG_EXTPRECH 0x00040000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_SDCFG_EXTRASWIDTH 0x00180000 +#define BONITO_SDCFG_EXTRASWIDTH_SHIFT 19 +#define BONITO_SDCFG_DRAMMODESET 0x00200000 +#define BONITO_SDCFG_DRAMEXTREGS 0x00400000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_SDCFG_DRAMPARITY 0x00800000 +#define BONITO_SDCFG_DRAMBURSTLEN 0x03000000 +#define BONITO_SDCFG_DRAMBURSTLEN_SHIFT 24 +#define BONITO_SDCFG_DRAMMODESET_DONE 0x80000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCICACHECTRL_CACHECMD 0x00000007 +#define BONITO_PCICACHECTRL_CACHECMD_SHIFT 0 +#define BONITO_PCICACHECTRL_CACHECMDLINE 0x00000018 +#define BONITO_PCICACHECTRL_CACHECMDLINE_SHIFT 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCICACHECTRL_CMDEXEC 0x00000020 +#define BONITO_PCICACHECTRL_IOBCCOH_PRES 0x00000100 +#define BONITO_PCICACHECTRL_IOBCCOH_EN 0x00000200 +#define BONITO_PCICACHECTRL_CPUCOH_PRES 0x00000400 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCICACHECTRL_CPUCOH_EN 0x00000800 +#define BONITO_IODEVCFG_BUFFBIT_CS0 0x00000001 +#define BONITO_IODEVCFG_SPEEDBIT_CS0 0x00000002 +#define BONITO_IODEVCFG_MOREABITS_CS0 0x00000004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_IODEVCFG_BUFFBIT_CS1 0x00000008 +#define BONITO_IODEVCFG_SPEEDBIT_CS1 0x00000010 +#define BONITO_IODEVCFG_MOREABITS_CS1 0x00000020 +#define BONITO_IODEVCFG_BUFFBIT_CS2 0x00000040 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_IODEVCFG_SPEEDBIT_CS2 0x00000080 +#define BONITO_IODEVCFG_MOREABITS_CS2 0x00000100 +#define BONITO_IODEVCFG_BUFFBIT_CS3 0x00000200 +#define BONITO_IODEVCFG_SPEEDBIT_CS3 0x00000400 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_IODEVCFG_MOREABITS_CS3 0x00000800 +#define BONITO_IODEVCFG_BUFFBIT_IDE 0x00001000 +#define BONITO_IODEVCFG_SPEEDBIT_IDE 0x00002000 +#define BONITO_IODEVCFG_WORDSWAPBIT_IDE 0x00004000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_IODEVCFG_MODEBIT_IDE 0x00008000 +#define BONITO_IODEVCFG_DMAON_IDE 0x001f0000 +#define BONITO_IODEVCFG_DMAON_IDE_SHIFT 16 +#define BONITO_IODEVCFG_DMAOFF_IDE 0x01e00000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_IODEVCFG_DMAOFF_IDE_SHIFT 21 +#define BONITO_IODEVCFG_EPROMSPLIT 0x02000000 +#define BONITO_IODEVCFG_CPUCLOCKPERIOD 0xfc000000 +#define BONITO_IODEVCFG_CPUCLOCKPERIOD_SHIFT 26 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_GPIO_GPIOW 0x000003ff +#define BONITO_GPIO_GPIOW_SHIFT 0 +#define BONITO_GPIO_GPIOR 0x01ff0000 +#define BONITO_GPIO_GPIOR_SHIFT 16 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_GPIO_GPINR 0xfe000000 +#define BONITO_GPIO_GPINR_SHIFT 25 +#define BONITO_GPIO_IOW(N) (1<<(BONITO_GPIO_GPIOW_SHIFT+(N))) +#define BONITO_GPIO_IOR(N) (1<<(BONITO_GPIO_GPIOR_SHIFT+(N))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_GPIO_INR(N) (1<<(BONITO_GPIO_GPINR_SHIFT+(N))) +#define BONITO_ICU_MBOXES 0x0000000f +#define BONITO_ICU_MBOXES_SHIFT 0 +#define BONITO_ICU_DMARDY 0x00000010 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_ICU_DMAEMPTY 0x00000020 +#define BONITO_ICU_COPYRDY 0x00000040 +#define BONITO_ICU_COPYEMPTY 0x00000080 +#define BONITO_ICU_COPYERR 0x00000100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_ICU_PCIIRQ 0x00000200 +#define BONITO_ICU_MASTERERR 0x00000400 +#define BONITO_ICU_SYSTEMERR 0x00000800 +#define BONITO_ICU_DRAMPERR 0x00001000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_ICU_RETRYERR 0x00002000 +#define BONITO_ICU_GPIOS 0x01ff0000 +#define BONITO_ICU_GPIOS_SHIFT 16 +#define BONITO_ICU_GPINS 0x7e000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_ICU_GPINS_SHIFT 25 +#define BONITO_ICU_MBOX(N) (1<<(BONITO_ICU_MBOXES_SHIFT+(N))) +#define BONITO_ICU_GPIO(N) (1<<(BONITO_ICU_GPIOS_SHIFT+(N))) +#define BONITO_ICU_GPIN(N) (1<<(BONITO_ICU_GPINS_SHIFT+(N))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCIMAP_PCIMAP_LO0 0x0000003f +#define BONITO_PCIMAP_PCIMAP_LO0_SHIFT 0 +#define BONITO_PCIMAP_PCIMAP_LO1 0x00000fc0 +#define BONITO_PCIMAP_PCIMAP_LO1_SHIFT 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCIMAP_PCIMAP_LO2 0x0003f000 +#define BONITO_PCIMAP_PCIMAP_LO2_SHIFT 12 +#define BONITO_PCIMAP_PCIMAP_2 0x00040000 +#define BONITO_PCIMAP_WIN(WIN, ADDR) ((((ADDR)>>26) & BONITO_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCIMAP_WINSIZE (1<<26) +#define BONITO_PCIMAP_WINOFFSET(ADDR) ((ADDR) & (BONITO_PCIMAP_WINSIZE - 1)) +#define BONITO_PCIMAP_WINBASE(ADDR) ((ADDR) << 26) +#define BONITO_PCIMEMBASECFG_MASK 0xf0000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCIMEMBASECFG_MEMBASE0_MASK 0x0000001f +#define BONITO_PCIMEMBASECFG_MEMBASE0_MASK_SHIFT 0 +#define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS 0x000003e0 +#define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS_SHIFT 5 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCIMEMBASECFG_MEMBASE0_CACHED 0x00000400 +#define BONITO_PCIMEMBASECFG_MEMBASE0_IO 0x00000800 +#define BONITO_PCIMEMBASECFG_MEMBASE1_MASK 0x0001f000 +#define BONITO_PCIMEMBASECFG_MEMBASE1_MASK_SHIFT 12 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS 0x003e0000 +#define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS_SHIFT 17 +#define BONITO_PCIMEMBASECFG_MEMBASE1_CACHED 0x00400000 +#define BONITO_PCIMEMBASECFG_MEMBASE1_IO 0x00800000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCIMEMBASECFG_ASHIFT 23 +#define BONITO_PCIMEMBASECFG_AMASK 0x007fffff +#define BONITO_PCIMEMBASECFGSIZE(WIN, SIZE) (((~((SIZE)-1))>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) +#define BONITO_PCIMEMBASECFGBASE(WIN, BASE) (((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCIMEMBASECFG_SIZE(WIN, CFG) (((((~(CFG)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)) << (BONITO_PCIMEMBASECFG_ASHIFT - BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) | BONITO_PCIMEMBASECFG_AMASK) +#define BONITO_PCIMEMBASECFG_ADDRMASK(WIN, CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) +#define BONITO_PCIMEMBASECFG_ADDRMASK(WIN, CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) +#define BONITO_PCIMEMBASECFG_ADDRTRANS(WIN, CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BONITO_PCITOPHYS(WIN, ADDR, CFG) ( (((ADDR) & (~(BONITO_PCIMEMBASECFG_MASK))) & (~(BONITO_PCIMEMBASECFG_ADDRMASK(WIN, CFG)))) | (BONITO_PCIMEMBASECFG_ADDRTRANS(WIN, CFG)) ) +#define BONITO_PCICMD_MEMEN 0x00000002 +#define BONITO_PCICMD_MSTREN 0x00000004 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mips-boards/generic.h b/9/platforms/android-16/arch-mips/usr/include/asm/mips-boards/generic.h new file mode 100644 index 0000000..fe07137 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mips-boards/generic.h @@ -0,0 +1,66 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_MIPS_BOARDS_GENERIC_H +#define __ASM_MIPS_BOARDS_GENERIC_H +#include <asm/addrspace.h> +#include <asm/byteorder.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/mips-boards/bonito64.h> +#define ASCII_DISPLAY_WORD_BASE 0x1f000410 +#define ASCII_DISPLAY_POS_BASE 0x1f000418 +#define YAMON_PROM_PRINT_ADDR 0x1fc00504 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SOFTRES_REG 0x1f000500 +#define GORESET 0x42 +#define MIPS_REVISION_REG 0x1fc00010 +#define MIPS_REVISION_CORID_QED_RM5261 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_REVISION_CORID_CORE_LV 1 +#define MIPS_REVISION_CORID_BONITO64 2 +#define MIPS_REVISION_CORID_CORE_20K 3 +#define MIPS_REVISION_CORID_CORE_FPGA 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_REVISION_CORID_CORE_MSC 5 +#define MIPS_REVISION_CORID_CORE_EMUL 6 +#define MIPS_REVISION_CORID_CORE_FPGA2 7 +#define MIPS_REVISION_CORID_CORE_FPGAR2 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_REVISION_CORID_CORE_FPGA3 9 +#define MIPS_REVISION_CORID_CORE_24K 10 +#define MIPS_REVISION_CORID_CORE_FPGA4 11 +#define MIPS_REVISION_CORID_CORE_FPGA5 12 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_REVISION_CORID_CORE_EMUL_BON -1 +#define MIPS_REVISION_CORID_CORE_EMUL_MSC -2 +#define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f) +#define MIPS_REVISION_SCON_OTHER 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_REVISION_SCON_SOCITSC 1 +#define MIPS_REVISION_SCON_SOCITSCP 2 +#define MIPS_REVISION_SCON_UNKNOWN -1 +#define MIPS_REVISION_SCON_GT64120 -2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_REVISION_SCON_BONITO -3 +#define MIPS_REVISION_SCON_BRTL -4 +#define MIPS_REVISION_SCON_SOCIT -5 +#define MIPS_REVISION_SCON_ROCIT -6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff) +#define mips_pcibios_init() do { } while (0) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mips-boards/malta.h b/9/platforms/android-16/arch-mips/usr/include/asm/mips-boards/malta.h new file mode 100644 index 0000000..7cef7e0 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mips-boards/malta.h @@ -0,0 +1,60 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_MIPS_BOARDS_MALTA_H +#define __ASM_MIPS_BOARDS_MALTA_H +#include <asm/addrspace.h> +#include <asm/io.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/mips-boards/msc01_pci.h> +#include <asm/gt64120.h> +#define MIPS_MSC01_IC_REG_BASE 0x1bc40000 +#define MIPS_SOCITSC_IC_REG_BASE 0x1ffa0000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MALTA_GT_PORT_BASE get_gt_port_base(GT_PCI0IOLD_OFS) +#define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000)) +#define MALTA_MSC_PORT_BASE get_msc_port_base(MSC01_PCI_SC2PIOBASL) +#define GCMP_BASE_ADDR 0x1fbf8000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GCMP_ADDRSPACE_SZ (256 * 1024) +#define GIC_BASE_ADDR 0x1bdc0000 +#define GIC_ADDRSPACE_SZ (128 * 1024) +#define MSC01_BIU_REG_BASE 0x1bc80000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_BIU_ADDRSPACE_SZ (256 * 1024) +#define MSC01_SC_CFG_OFS 0x0110 +#define MSC01_SC_CFG_GICPRES_MSK 0x00000004 +#define MSC01_SC_CFG_GICPRES_SHF 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_SC_CFG_GICENA_SHF 3 +#define MALTA_RTC_ADR_REG 0x70 +#define MALTA_RTC_DAT_REG 0x71 +#define SMSC_CONFIG_REG 0x3f0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SMSC_DATA_REG 0x3f1 +#define SMSC_CONFIG_DEVNUM 0x7 +#define SMSC_CONFIG_ACTIVATE 0x30 +#define SMSC_CONFIG_ENTER 0x55 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SMSC_CONFIG_EXIT 0xaa +#define SMSC_CONFIG_DEVNUM_FLOPPY 0 +#define SMSC_CONFIG_ACTIVATE_ENABLE 1 +#define SMSC_WRITE(x, a) outb(x, a) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MALTA_JMPRS_REG 0x1f000210 +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mips-boards/msc01_pci.h b/9/platforms/android-16/arch-mips/usr/include/asm/mips-boards/msc01_pci.h new file mode 100644 index 0000000..6235847 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mips-boards/msc01_pci.h @@ -0,0 +1,270 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_MIPS_BOARDS_MSC01_PCI_H +#define __ASM_MIPS_BOARDS_MSC01_PCI_H +#define MSC01_PCI_ID_OFS 0x0000 +#define MSC01_PCI_SC2PMBASL_OFS 0x0208 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_SC2PMMSKL_OFS 0x0218 +#define MSC01_PCI_SC2PMMAPL_OFS 0x0228 +#define MSC01_PCI_SC2PIOBASL_OFS 0x0248 +#define MSC01_PCI_SC2PIOMSKL_OFS 0x0258 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_SC2PIOMAPL_OFS 0x0268 +#define MSC01_PCI_P2SCMSKL_OFS 0x0308 +#define MSC01_PCI_P2SCMAPL_OFS 0x0318 +#define MSC01_PCI_INTCFG_OFS 0x0600 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTSTAT_OFS 0x0608 +#define MSC01_PCI_CFGADDR_OFS 0x0610 +#define MSC01_PCI_CFGDATA_OFS 0x0618 +#define MSC01_PCI_IACK_OFS 0x0620 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_HEAD0_OFS 0x2000 +#define MSC01_PCI_HEAD1_OFS 0x2008 +#define MSC01_PCI_HEAD2_OFS 0x2010 +#define MSC01_PCI_HEAD3_OFS 0x2018 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_HEAD4_OFS 0x2020 +#define MSC01_PCI_HEAD5_OFS 0x2028 +#define MSC01_PCI_HEAD6_OFS 0x2030 +#define MSC01_PCI_HEAD7_OFS 0x2038 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_HEAD8_OFS 0x2040 +#define MSC01_PCI_HEAD9_OFS 0x2048 +#define MSC01_PCI_HEAD10_OFS 0x2050 +#define MSC01_PCI_HEAD11_OFS 0x2058 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_HEAD12_OFS 0x2060 +#define MSC01_PCI_HEAD13_OFS 0x2068 +#define MSC01_PCI_HEAD14_OFS 0x2070 +#define MSC01_PCI_HEAD15_OFS 0x2078 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_BAR0_OFS 0x2220 +#define MSC01_PCI_CFG_OFS 0x2380 +#define MSC01_PCI_SWAP_OFS 0x2388 +#define MSC01_PCI_ID_ID_SHF 16 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_ID_ID_MSK 0x00ff0000 +#define MSC01_PCI_ID_ID_HOSTBRIDGE 82 +#define MSC01_PCI_ID_MAR_SHF 8 +#define MSC01_PCI_ID_MAR_MSK 0x0000ff00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_ID_MIR_SHF 0 +#define MSC01_PCI_ID_MIR_MSK 0x000000ff +#define MSC01_PCI_SC2PMBASL_BAS_SHF 24 +#define MSC01_PCI_SC2PMBASL_BAS_MSK 0xff000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_SC2PMMSKL_MSK_SHF 24 +#define MSC01_PCI_SC2PMMSKL_MSK_MSK 0xff000000 +#define MSC01_PCI_SC2PMMAPL_MAP_SHF 24 +#define MSC01_PCI_SC2PMMAPL_MAP_MSK 0xff000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_SC2PIOBASL_BAS_SHF 24 +#define MSC01_PCI_SC2PIOBASL_BAS_MSK 0xff000000 +#define MSC01_PCI_SC2PIOMSKL_MSK_SHF 24 +#define MSC01_PCI_SC2PIOMSKL_MSK_MSK 0xff000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_SC2PIOMAPL_MAP_SHF 24 +#define MSC01_PCI_SC2PIOMAPL_MAP_MSK 0xff000000 +#define MSC01_PCI_P2SCMSKL_MSK_SHF 24 +#define MSC01_PCI_P2SCMSKL_MSK_MSK 0xff000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_P2SCMAPL_MAP_SHF 24 +#define MSC01_PCI_P2SCMAPL_MAP_MSK 0xff000000 +#define MSC01_PCI_INTCFG_RST_SHF 10 +#define MSC01_PCI_INTCFG_RST_MSK 0x00000400 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTCFG_RST_BIT 0x00000400 +#define MSC01_PCI_INTCFG_MWE_SHF 9 +#define MSC01_PCI_INTCFG_MWE_MSK 0x00000200 +#define MSC01_PCI_INTCFG_MWE_BIT 0x00000200 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTCFG_DTO_SHF 8 +#define MSC01_PCI_INTCFG_DTO_MSK 0x00000100 +#define MSC01_PCI_INTCFG_DTO_BIT 0x00000100 +#define MSC01_PCI_INTCFG_MA_SHF 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTCFG_MA_MSK 0x00000080 +#define MSC01_PCI_INTCFG_MA_BIT 0x00000080 +#define MSC01_PCI_INTCFG_TA_SHF 6 +#define MSC01_PCI_INTCFG_TA_MSK 0x00000040 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTCFG_TA_BIT 0x00000040 +#define MSC01_PCI_INTCFG_RTY_SHF 5 +#define MSC01_PCI_INTCFG_RTY_MSK 0x00000020 +#define MSC01_PCI_INTCFG_RTY_BIT 0x00000020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTCFG_MWP_SHF 4 +#define MSC01_PCI_INTCFG_MWP_MSK 0x00000010 +#define MSC01_PCI_INTCFG_MWP_BIT 0x00000010 +#define MSC01_PCI_INTCFG_MRP_SHF 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTCFG_MRP_MSK 0x00000008 +#define MSC01_PCI_INTCFG_MRP_BIT 0x00000008 +#define MSC01_PCI_INTCFG_SWP_SHF 2 +#define MSC01_PCI_INTCFG_SWP_MSK 0x00000004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTCFG_SWP_BIT 0x00000004 +#define MSC01_PCI_INTCFG_SRP_SHF 1 +#define MSC01_PCI_INTCFG_SRP_MSK 0x00000002 +#define MSC01_PCI_INTCFG_SRP_BIT 0x00000002 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTCFG_SE_SHF 0 +#define MSC01_PCI_INTCFG_SE_MSK 0x00000001 +#define MSC01_PCI_INTCFG_SE_BIT 0x00000001 +#define MSC01_PCI_INTSTAT_RST_SHF 10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTSTAT_RST_MSK 0x00000400 +#define MSC01_PCI_INTSTAT_RST_BIT 0x00000400 +#define MSC01_PCI_INTSTAT_MWE_SHF 9 +#define MSC01_PCI_INTSTAT_MWE_MSK 0x00000200 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTSTAT_MWE_BIT 0x00000200 +#define MSC01_PCI_INTSTAT_DTO_SHF 8 +#define MSC01_PCI_INTSTAT_DTO_MSK 0x00000100 +#define MSC01_PCI_INTSTAT_DTO_BIT 0x00000100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTSTAT_MA_SHF 7 +#define MSC01_PCI_INTSTAT_MA_MSK 0x00000080 +#define MSC01_PCI_INTSTAT_MA_BIT 0x00000080 +#define MSC01_PCI_INTSTAT_TA_SHF 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTSTAT_TA_MSK 0x00000040 +#define MSC01_PCI_INTSTAT_TA_BIT 0x00000040 +#define MSC01_PCI_INTSTAT_RTY_SHF 5 +#define MSC01_PCI_INTSTAT_RTY_MSK 0x00000020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTSTAT_RTY_BIT 0x00000020 +#define MSC01_PCI_INTSTAT_MWP_SHF 4 +#define MSC01_PCI_INTSTAT_MWP_MSK 0x00000010 +#define MSC01_PCI_INTSTAT_MWP_BIT 0x00000010 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTSTAT_MRP_SHF 3 +#define MSC01_PCI_INTSTAT_MRP_MSK 0x00000008 +#define MSC01_PCI_INTSTAT_MRP_BIT 0x00000008 +#define MSC01_PCI_INTSTAT_SWP_SHF 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTSTAT_SWP_MSK 0x00000004 +#define MSC01_PCI_INTSTAT_SWP_BIT 0x00000004 +#define MSC01_PCI_INTSTAT_SRP_SHF 1 +#define MSC01_PCI_INTSTAT_SRP_MSK 0x00000002 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_INTSTAT_SRP_BIT 0x00000002 +#define MSC01_PCI_INTSTAT_SE_SHF 0 +#define MSC01_PCI_INTSTAT_SE_MSK 0x00000001 +#define MSC01_PCI_INTSTAT_SE_BIT 0x00000001 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_CFGADDR_BNUM_SHF 16 +#define MSC01_PCI_CFGADDR_BNUM_MSK 0x00ff0000 +#define MSC01_PCI_CFGADDR_DNUM_SHF 11 +#define MSC01_PCI_CFGADDR_DNUM_MSK 0x0000f800 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_CFGADDR_FNUM_SHF 8 +#define MSC01_PCI_CFGADDR_FNUM_MSK 0x00000700 +#define MSC01_PCI_CFGADDR_RNUM_SHF 2 +#define MSC01_PCI_CFGADDR_RNUM_MSK 0x000000fc +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_CFGDATA_DATA_SHF 0 +#define MSC01_PCI_CFGDATA_DATA_MSK 0xffffffff +#define MSC01_PCI_BAR0_SIZE_SHF 4 +#define MSC01_PCI_BAR0_SIZE_MSK 0xfffffff0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_BAR0_P_SHF 3 +#define MSC01_PCI_BAR0_P_MSK 0x00000008 +#define MSC01_PCI_BAR0_P_BIT MSC01_PCI_BAR0_P_MSK +#define MSC01_PCI_BAR0_D_SHF 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_BAR0_D_MSK 0x00000006 +#define MSC01_PCI_BAR0_T_SHF 0 +#define MSC01_PCI_BAR0_T_MSK 0x00000001 +#define MSC01_PCI_BAR0_T_BIT MSC01_PCI_BAR0_T_MSK +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_CFG_RA_SHF 17 +#define MSC01_PCI_CFG_RA_MSK 0x00020000 +#define MSC01_PCI_CFG_RA_BIT MSC01_PCI_CFG_RA_MSK +#define MSC01_PCI_CFG_G_SHF 16 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_CFG_G_MSK 0x00010000 +#define MSC01_PCI_CFG_G_BIT MSC01_PCI_CFG_G_MSK +#define MSC01_PCI_CFG_EN_SHF 15 +#define MSC01_PCI_CFG_EN_MSK 0x00008000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_CFG_EN_BIT MSC01_PCI_CFG_EN_MSK +#define MSC01_PCI_CFG_MAXRTRY_SHF 0 +#define MSC01_PCI_CFG_MAXRTRY_MSK 0x00000fff +#define MSC01_PCI_SWAP_IO_SHF 18 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_SWAP_IO_MSK 0x000c0000 +#define MSC01_PCI_SWAP_MEM_SHF 16 +#define MSC01_PCI_SWAP_MEM_MSK 0x00030000 +#define MSC01_PCI_SWAP_BAR0_SHF 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_SWAP_BAR0_MSK 0x00000003 +#define MSC01_PCI_SWAP_NOSWAP 0 +#define MSC01_PCI_SWAP_BYTESWAP 1 +#define MIPS_MSC01_PCI_REG_BASE 0x1bd00000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_SOCITSC_PCI_REG_BASE 0x1ff10000 +#define MSC01_PCI_REG_BASE _pcictrl_msc +#define MSC_WRITE(reg, data) do { *(volatile u32 *)(reg) = data; } while (0) +#define MSC_READ(reg, data) do { data = *(volatile u32 *)(reg); } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_ID (MSC01_PCI_REG_BASE + MSC01_PCI_ID_OFS) +#define MSC01_PCI_SC2PMBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMBASL_OFS) +#define MSC01_PCI_SC2PMMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMSKL_OFS) +#define MSC01_PCI_SC2PMMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PMMAPL_OFS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_SC2PIOBASL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOBASL_OFS) +#define MSC01_PCI_SC2PIOMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMSKL_OFS) +#define MSC01_PCI_SC2PIOMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_SC2PIOMAPL_OFS) +#define MSC01_PCI_P2SCMSKL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMSKL_OFS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_P2SCMAPL (MSC01_PCI_REG_BASE + MSC01_PCI_P2SCMAPL_OFS) +#define MSC01_PCI_INTCFG (MSC01_PCI_REG_BASE + MSC01_PCI_INTCFG_OFS) +#define MSC01_PCI_INTSTAT (MSC01_PCI_REG_BASE + MSC01_PCI_INTSTAT_OFS) +#define MSC01_PCI_CFGADDR (MSC01_PCI_REG_BASE + MSC01_PCI_CFGADDR_OFS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_CFGDATA (MSC01_PCI_REG_BASE + MSC01_PCI_CFGDATA_OFS) +#define MSC01_PCI_IACK (MSC01_PCI_REG_BASE + MSC01_PCI_IACK_OFS) +#define MSC01_PCI_HEAD0 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD0_OFS) +#define MSC01_PCI_HEAD1 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD1_OFS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_HEAD2 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD2_OFS) +#define MSC01_PCI_HEAD3 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD3_OFS) +#define MSC01_PCI_HEAD4 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD4_OFS) +#define MSC01_PCI_HEAD5 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD5_OFS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_HEAD6 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD6_OFS) +#define MSC01_PCI_HEAD7 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD7_OFS) +#define MSC01_PCI_HEAD8 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD8_OFS) +#define MSC01_PCI_HEAD9 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD9_OFS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_HEAD10 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD10_OFS) +#define MSC01_PCI_HEAD11 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) +#define MSC01_PCI_HEAD12 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) +#define MSC01_PCI_HEAD13 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_HEAD14 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) +#define MSC01_PCI_HEAD15 (MSC01_PCI_REG_BASE + MSC01_PCI_HEAD11_OFS) +#define MSC01_PCI_BAR0 (MSC01_PCI_REG_BASE + MSC01_PCI_BAR0_OFS) +#define MSC01_PCI_CFG (MSC01_PCI_REG_BASE + MSC01_PCI_CFG_OFS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSC01_PCI_SWAP (MSC01_PCI_REG_BASE + MSC01_PCI_SWAP_OFS) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mips_mt.h b/9/platforms/android-16/arch-mips/usr/include/asm/mips_mt.h new file mode 100644 index 0000000..90f726a --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mips_mt.h @@ -0,0 +1,24 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_MIPS_MT_H +#define __ASM_MIPS_MT_H +#include <linux/cpumask.h> +struct class; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mipsmtregs.h b/9/platforms/android-16/arch-mips/usr/include/asm/mipsmtregs.h new file mode 100644 index 0000000..1d4f342 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mipsmtregs.h @@ -0,0 +1,214 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_MIPSMTREGS_H +#define _ASM_MIPSMTREGS_H +#include <asm/mipsregs.h> +#include <asm/war.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef __ASSEMBLY__ +#define read_c0_mvpcontrol() __read_32bit_c0_register($0, 1) +#define write_c0_mvpcontrol(val) __write_32bit_c0_register($0, 1, val) +#define read_c0_mvpconf0() __read_32bit_c0_register($0, 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_mvpconf1() __read_32bit_c0_register($0, 3) +#define read_c0_vpecontrol() __read_32bit_c0_register($1, 1) +#define write_c0_vpecontrol(val) __write_32bit_c0_register($1, 1, val) +#define read_c0_vpeconf0() __read_32bit_c0_register($1, 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_vpeconf0(val) __write_32bit_c0_register($1, 2, val) +#define read_c0_tcstatus() __read_32bit_c0_register($2, 1) +#define write_c0_tcstatus(val) __write_32bit_c0_register($2, 1, val) +#define read_c0_tcbind() __read_32bit_c0_register($2, 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_tccontext() __read_32bit_c0_register($2, 5) +#define write_c0_tccontext(val) __write_32bit_c0_register($2, 5, val) +#else +#define CP0_MVPCONTROL $0, 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_MVPCONF0 $0, 2 +#define CP0_MVPCONF1 $0, 3 +#define CP0_VPECONTROL $1, 1 +#define CP0_VPECONF0 $1, 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_VPECONF1 $1, 3 +#define CP0_YQMASK $1, 4 +#define CP0_VPESCHEDULE $1, 5 +#define CP0_VPESCHEFBK $1, 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_TCSTATUS $2, 1 +#define CP0_TCBIND $2, 2 +#define CP0_TCRESTART $2, 3 +#define CP0_TCHALT $2, 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_TCCONTEXT $2, 5 +#define CP0_TCSCHEDULE $2, 6 +#define CP0_TCSCHEFBK $2, 7 +#define CP0_SRSCONF0 $6, 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_SRSCONF1 $6, 2 +#define CP0_SRSCONF2 $6, 3 +#define CP0_SRSCONF3 $6, 4 +#define CP0_SRSCONF4 $6, 5 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define MVPCONTROL_EVP (_ULCAST_(1)) +#define MVPCONTROL_VPC_SHIFT 1 +#define MVPCONTROL_VPC (_ULCAST_(1) << MVPCONTROL_VPC_SHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MVPCONTROL_STLB_SHIFT 2 +#define MVPCONTROL_STLB (_ULCAST_(1) << MVPCONTROL_STLB_SHIFT) +#define MVPCONF0_PTC_SHIFT 0 +#define MVPCONF0_PTC ( _ULCAST_(0xff)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MVPCONF0_PVPE_SHIFT 10 +#define MVPCONF0_PVPE ( _ULCAST_(0xf) << MVPCONF0_PVPE_SHIFT) +#define MVPCONF0_TCA_SHIFT 15 +#define MVPCONF0_TCA ( _ULCAST_(1) << MVPCONF0_TCA_SHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MVPCONF0_PTLBE_SHIFT 16 +#define MVPCONF0_PTLBE (_ULCAST_(0x3ff) << MVPCONF0_PTLBE_SHIFT) +#define MVPCONF0_TLBS_SHIFT 29 +#define MVPCONF0_TLBS (_ULCAST_(1) << MVPCONF0_TLBS_SHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MVPCONF0_M_SHIFT 31 +#define MVPCONF0_M (_ULCAST_(0x1) << MVPCONF0_M_SHIFT) +#define CONFIG3_MT_SHIFT 2 +#define CONFIG3_MT (_ULCAST_(1) << CONFIG3_MT_SHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VPECONTROL_TARGTC (_ULCAST_(0xff)) +#define VPECONTROL_TE_SHIFT 15 +#define VPECONTROL_TE (_ULCAST_(1) << VPECONTROL_TE_SHIFT) +#define VPECONTROL_EXCPT_SHIFT 16 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VPECONTROL_EXCPT (_ULCAST_(0x7) << VPECONTROL_EXCPT_SHIFT) +#define THREX_TU 0 +#define THREX_TO 1 +#define THREX_IYQ 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define THREX_GSX 3 +#define THREX_YSCH 4 +#define THREX_GSSCH 5 +#define VPECONTROL_GSI_SHIFT 20 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VPECONTROL_GSI (_ULCAST_(1) << VPECONTROL_GSI_SHIFT) +#define VPECONTROL_YSI_SHIFT 21 +#define VPECONTROL_YSI (_ULCAST_(1) << VPECONTROL_YSI_SHIFT) +#define VPECONF0_VPA_SHIFT 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VPECONF0_VPA (_ULCAST_(1) << VPECONF0_VPA_SHIFT) +#define VPECONF0_MVP_SHIFT 1 +#define VPECONF0_MVP (_ULCAST_(1) << VPECONF0_MVP_SHIFT) +#define VPECONF0_XTC_SHIFT 21 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VPECONF0_XTC (_ULCAST_(0xff) << VPECONF0_XTC_SHIFT) +#define TCSTATUS_TASID (_ULCAST_(0xff)) +#define TCSTATUS_IXMT_SHIFT 10 +#define TCSTATUS_IXMT (_ULCAST_(1) << TCSTATUS_IXMT_SHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TCSTATUS_TKSU_SHIFT 11 +#define TCSTATUS_TKSU (_ULCAST_(3) << TCSTATUS_TKSU_SHIFT) +#define TCSTATUS_A_SHIFT 13 +#define TCSTATUS_A (_ULCAST_(1) << TCSTATUS_A_SHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TCSTATUS_DA_SHIFT 15 +#define TCSTATUS_DA (_ULCAST_(1) << TCSTATUS_DA_SHIFT) +#define TCSTATUS_DT_SHIFT 20 +#define TCSTATUS_DT (_ULCAST_(1) << TCSTATUS_DT_SHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TCSTATUS_TDS_SHIFT 21 +#define TCSTATUS_TDS (_ULCAST_(1) << TCSTATUS_TDS_SHIFT) +#define TCSTATUS_TSST_SHIFT 22 +#define TCSTATUS_TSST (_ULCAST_(1) << TCSTATUS_TSST_SHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TCSTATUS_RNST_SHIFT 23 +#define TCSTATUS_RNST (_ULCAST_(3) << TCSTATUS_RNST_SHIFT) +#define TC_RUNNING 0 +#define TC_WAITING 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TC_YIELDING 2 +#define TC_GATED 3 +#define TCSTATUS_TMX_SHIFT 27 +#define TCSTATUS_TMX (_ULCAST_(1) << TCSTATUS_TMX_SHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TCBIND_CURVPE_SHIFT 0 +#define TCBIND_CURVPE (_ULCAST_(0xf)) +#define TCBIND_CURTC_SHIFT 21 +#define TCBIND_CURTC (_ULCAST_(0xff) << TCBIND_CURTC_SHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TCHALT_H (_ULCAST_(1)) +#ifndef __ASSEMBLY__ +#define EVPE_ENABLE MVPCONTROL_EVP +#define EMT_ENABLE VPECONTROL_TE +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; }) +#define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; }) +#define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; }) +#define mttgpr(rd,v) do { __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " move $1, %0 \n" " # mttgpr $1, " #rd " \n" " .word 0x41810020 | (" #rd " << 11) \n" " .set pop \n" : : "r" (v)); } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define mttc0(rd, sel, v) ({ __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " move $1, %0 \n" " # mttc0 %0," #rd ", " #sel " \n" " .word 0x41810000 | (" #rd " << 11) | " #sel " \n" " .set pop \n" : : "r" (v)); }) +#define mttr(rd, u, sel, v) ({ __asm__ __volatile__( "mttr %0," #rd ", " #u ", " #sel : : "r" (v)); }) +#define settc(tc) do { write_c0_vpecontrol((read_c0_vpecontrol()&~VPECONTROL_TARGTC) | (tc)); ehb(); } while (0) +#define read_vpe_c0_vpecontrol() mftc0(1, 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_vpe_c0_vpecontrol(val) mttc0(1, 1, val) +#define read_vpe_c0_vpeconf0() mftc0(1, 2) +#define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val) +#define read_vpe_c0_count() mftc0(9, 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_vpe_c0_count(val) mttc0(9, 0, val) +#define read_vpe_c0_status() mftc0(12, 0) +#define write_vpe_c0_status(val) mttc0(12, 0, val) +#define read_vpe_c0_cause() mftc0(13, 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_vpe_c0_cause(val) mttc0(13, 0, val) +#define read_vpe_c0_config() mftc0(16, 0) +#define write_vpe_c0_config(val) mttc0(16, 0, val) +#define read_vpe_c0_config1() mftc0(16, 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_vpe_c0_config1(val) mttc0(16, 1, val) +#define read_vpe_c0_config7() mftc0(16, 7) +#define write_vpe_c0_config7(val) mttc0(16, 7, val) +#define read_vpe_c0_ebase() mftc0(15, 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_vpe_c0_ebase(val) mttc0(15, 1, val) +#define write_vpe_c0_compare(val) mttc0(11, 0, val) +#define read_vpe_c0_badvaddr() mftc0(8, 0) +#define read_vpe_c0_epc() mftc0(14, 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_vpe_c0_epc(val) mttc0(14, 0, val) +#define read_tc_c0_tcstatus() mftc0(2, 1) +#define write_tc_c0_tcstatus(val) mttc0(2, 1, val) +#define read_tc_c0_tcbind() mftc0(2, 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_tc_c0_tcbind(val) mttc0(2, 2, val) +#define read_tc_c0_tcrestart() mftc0(2, 3) +#define write_tc_c0_tcrestart(val) mttc0(2, 3, val) +#define read_tc_c0_tchalt() mftc0(2, 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_tc_c0_tchalt(val) mttc0(2, 4, val) +#define read_tc_c0_tccontext() mftc0(2, 5) +#define write_tc_c0_tccontext(val) mttc0(2, 5, val) +#define read_tc_gpr_sp() mftgpr(29) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_tc_gpr_sp(val) mttgpr(29, val) +#define read_tc_gpr_gp() mftgpr(28) +#define write_tc_gpr_gp(val) mttgpr(28, val) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mipsregs.h b/9/platforms/android-16/arch-mips/usr/include/asm/mipsregs.h new file mode 100644 index 0000000..0976939 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mipsregs.h @@ -0,0 +1,721 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_MIPSREGS_H +#define _ASM_MIPSREGS_H +#include <linux/linkage.h> +#include <asm/hazards.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/war.h> +#ifndef __STR +#define __STR(x) #x +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef STR +#define STR(x) __STR(x) +#endif +#ifdef __ASSEMBLY__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _ULCAST_ +#else +#define _ULCAST_ (unsigned long) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_INDEX $0 +#define CP0_RANDOM $1 +#define CP0_ENTRYLO0 $2 +#define CP0_ENTRYLO1 $3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_CONF $3 +#define CP0_CONTEXT $4 +#define CP0_PAGEMASK $5 +#define CP0_WIRED $6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_INFO $7 +#define CP0_BADVADDR $8 +#define CP0_COUNT $9 +#define CP0_ENTRYHI $10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_COMPARE $11 +#define CP0_STATUS $12 +#define CP0_CAUSE $13 +#define CP0_EPC $14 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_PRID $15 +#define CP0_CONFIG $16 +#define CP0_LLADDR $17 +#define CP0_WATCHLO $18 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_WATCHHI $19 +#define CP0_XCONTEXT $20 +#define CP0_FRAMEMASK $21 +#define CP0_DIAGNOSTIC $22 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_DEBUG $23 +#define CP0_DEPC $24 +#define CP0_PERFORMANCE $25 +#define CP0_ECC $26 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_CACHEERR $27 +#define CP0_TAGLO $28 +#define CP0_TAGHI $29 +#define CP0_ERROREPC $30 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_DESAVE $31 +#define CP0_IBASE $0 +#define CP0_IBOUND $1 +#define CP0_DBASE $2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_DBOUND $3 +#define CP0_CALG $17 +#define CP0_IWATCH $18 +#define CP0_DWATCH $19 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_S1_DERRADDR0 $26 +#define CP0_S1_DERRADDR1 $27 +#define CP0_S1_INTCONTROL $20 +#define CP0_S2_SRSCTL $12 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CP0_S3_SRSMAP $12 +#define CP0_TX39_CACHE $7 +#define CP1_REVISION $0 +#define CP1_STATUS $31 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FPU_CSR_FLUSH 0x01000000 +#define FPU_CSR_COND 0x00800000 +#define FPU_CSR_COND0 0x00800000 +#define FPU_CSR_COND1 0x02000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FPU_CSR_COND2 0x04000000 +#define FPU_CSR_COND3 0x08000000 +#define FPU_CSR_COND4 0x10000000 +#define FPU_CSR_COND5 0x20000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FPU_CSR_COND6 0x40000000 +#define FPU_CSR_COND7 0x80000000 +#define FPU_CSR_ALL_X 0x0003f000 +#define FPU_CSR_UNI_X 0x00020000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FPU_CSR_INV_X 0x00010000 +#define FPU_CSR_DIV_X 0x00008000 +#define FPU_CSR_OVF_X 0x00004000 +#define FPU_CSR_UDF_X 0x00002000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FPU_CSR_INE_X 0x00001000 +#define FPU_CSR_ALL_E 0x00000f80 +#define FPU_CSR_INV_E 0x00000800 +#define FPU_CSR_DIV_E 0x00000400 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FPU_CSR_OVF_E 0x00000200 +#define FPU_CSR_UDF_E 0x00000100 +#define FPU_CSR_INE_E 0x00000080 +#define FPU_CSR_ALL_S 0x0000007c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FPU_CSR_INV_S 0x00000040 +#define FPU_CSR_DIV_S 0x00000020 +#define FPU_CSR_OVF_S 0x00000010 +#define FPU_CSR_UDF_S 0x00000008 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FPU_CSR_INE_S 0x00000004 +#define FPU_CSR_RN 0x0 +#define FPU_CSR_RZ 0x1 +#define FPU_CSR_RU 0x2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FPU_CSR_RD 0x3 +#define PM_4K 0x00000000 +#define PM_16K 0x00006000 +#define PM_64K 0x0001e000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PM_256K 0x0007e000 +#define PM_1M 0x001fe000 +#define PM_4M 0x007fe000 +#define PM_16M 0x01ffe000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PM_64M 0x07ffe000 +#define PM_256M 0x1fffe000 +#error Bad page size configuration! +#define PL_4K 12 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PL_16K 14 +#define PL_64K 16 +#define PL_256K 18 +#define PL_1M 20 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PL_4M 22 +#define PL_16M 24 +#define PL_64M 26 +#define PL_256M 28 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IE_SW0 (_ULCAST_(1) << 8) +#define IE_SW1 (_ULCAST_(1) << 9) +#define IE_IRQ0 (_ULCAST_(1) << 10) +#define IE_IRQ1 (_ULCAST_(1) << 11) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IE_IRQ2 (_ULCAST_(1) << 12) +#define IE_IRQ3 (_ULCAST_(1) << 13) +#define IE_IRQ4 (_ULCAST_(1) << 14) +#define IE_IRQ5 (_ULCAST_(1) << 15) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define C_SW0 (_ULCAST_(1) << 8) +#define C_SW1 (_ULCAST_(1) << 9) +#define C_IRQ0 (_ULCAST_(1) << 10) +#define C_IRQ1 (_ULCAST_(1) << 11) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define C_IRQ2 (_ULCAST_(1) << 12) +#define C_IRQ3 (_ULCAST_(1) << 13) +#define C_IRQ4 (_ULCAST_(1) << 14) +#define C_IRQ5 (_ULCAST_(1) << 15) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ST0_IE 0x00000001 +#define ST0_EXL 0x00000002 +#define ST0_ERL 0x00000004 +#define ST0_KSU 0x00000018 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KSU_USER 0x00000010 +#define KSU_SUPERVISOR 0x00000008 +#define KSU_KERNEL 0x00000000 +#define ST0_UX 0x00000020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ST0_SX 0x00000040 +#define ST0_KX 0x00000080 +#define ST0_DE 0x00010000 +#define ST0_CE 0x00020000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ST0_CO 0x08000000 +#define ST0_IEC 0x00000001 +#define ST0_KUC 0x00000002 +#define ST0_IEP 0x00000004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ST0_KUP 0x00000008 +#define ST0_IEO 0x00000010 +#define ST0_KUO 0x00000020 +#define ST0_ISC 0x00010000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ST0_SWC 0x00020000 +#define ST0_CM 0x00080000 +#define ST0_UM (_ULCAST_(1) << 4) +#define ST0_IL (_ULCAST_(1) << 23) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ST0_DL (_ULCAST_(1) << 24) +#define ST0_MX 0x01000000 +#define TX39_CONF_ICS_SHIFT 19 +#define TX39_CONF_ICS_MASK 0x00380000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TX39_CONF_ICS_1KB 0x00000000 +#define TX39_CONF_ICS_2KB 0x00080000 +#define TX39_CONF_ICS_4KB 0x00100000 +#define TX39_CONF_ICS_8KB 0x00180000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TX39_CONF_ICS_16KB 0x00200000 +#define TX39_CONF_DCS_SHIFT 16 +#define TX39_CONF_DCS_MASK 0x00070000 +#define TX39_CONF_DCS_1KB 0x00000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TX39_CONF_DCS_2KB 0x00010000 +#define TX39_CONF_DCS_4KB 0x00020000 +#define TX39_CONF_DCS_8KB 0x00030000 +#define TX39_CONF_DCS_16KB 0x00040000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TX39_CONF_CWFON 0x00004000 +#define TX39_CONF_WBON 0x00002000 +#define TX39_CONF_RF_SHIFT 10 +#define TX39_CONF_RF_MASK 0x00000c00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TX39_CONF_DOZE 0x00000200 +#define TX39_CONF_HALT 0x00000100 +#define TX39_CONF_LOCK 0x00000080 +#define TX39_CONF_ICE 0x00000020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TX39_CONF_DCE 0x00000010 +#define TX39_CONF_IRSIZE_SHIFT 2 +#define TX39_CONF_IRSIZE_MASK 0x0000000c +#define TX39_CONF_DRSIZE_SHIFT 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TX39_CONF_DRSIZE_MASK 0x00000003 +#define ST0_IM 0x0000ff00 +#define STATUSB_IP0 8 +#define STATUSF_IP0 (_ULCAST_(1) << 8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define STATUSB_IP1 9 +#define STATUSF_IP1 (_ULCAST_(1) << 9) +#define STATUSB_IP2 10 +#define STATUSF_IP2 (_ULCAST_(1) << 10) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define STATUSB_IP3 11 +#define STATUSF_IP3 (_ULCAST_(1) << 11) +#define STATUSB_IP4 12 +#define STATUSF_IP4 (_ULCAST_(1) << 12) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define STATUSB_IP5 13 +#define STATUSF_IP5 (_ULCAST_(1) << 13) +#define STATUSB_IP6 14 +#define STATUSF_IP6 (_ULCAST_(1) << 14) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define STATUSB_IP7 15 +#define STATUSF_IP7 (_ULCAST_(1) << 15) +#define STATUSB_IP8 0 +#define STATUSF_IP8 (_ULCAST_(1) << 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define STATUSB_IP9 1 +#define STATUSF_IP9 (_ULCAST_(1) << 1) +#define STATUSB_IP10 2 +#define STATUSF_IP10 (_ULCAST_(1) << 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define STATUSB_IP11 3 +#define STATUSF_IP11 (_ULCAST_(1) << 3) +#define STATUSB_IP12 4 +#define STATUSF_IP12 (_ULCAST_(1) << 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define STATUSB_IP13 5 +#define STATUSF_IP13 (_ULCAST_(1) << 5) +#define STATUSB_IP14 6 +#define STATUSF_IP14 (_ULCAST_(1) << 6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define STATUSB_IP15 7 +#define STATUSF_IP15 (_ULCAST_(1) << 7) +#define ST0_CH 0x00040000 +#define ST0_SR 0x00100000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ST0_TS 0x00200000 +#define ST0_BEV 0x00400000 +#define ST0_RE 0x02000000 +#define ST0_FR 0x04000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ST0_CU 0xf0000000 +#define ST0_CU0 0x10000000 +#define ST0_CU1 0x20000000 +#define ST0_CU2 0x40000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ST0_CU3 0x80000000 +#define ST0_XX 0x80000000 +#define CAUSEB_EXCCODE 2 +#define CAUSEF_EXCCODE (_ULCAST_(31) << 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CAUSEB_IP 8 +#define CAUSEF_IP (_ULCAST_(255) << 8) +#define CAUSEB_IP0 8 +#define CAUSEF_IP0 (_ULCAST_(1) << 8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CAUSEB_IP1 9 +#define CAUSEF_IP1 (_ULCAST_(1) << 9) +#define CAUSEB_IP2 10 +#define CAUSEF_IP2 (_ULCAST_(1) << 10) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CAUSEB_IP3 11 +#define CAUSEF_IP3 (_ULCAST_(1) << 11) +#define CAUSEB_IP4 12 +#define CAUSEF_IP4 (_ULCAST_(1) << 12) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CAUSEB_IP5 13 +#define CAUSEF_IP5 (_ULCAST_(1) << 13) +#define CAUSEB_IP6 14 +#define CAUSEF_IP6 (_ULCAST_(1) << 14) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CAUSEB_IP7 15 +#define CAUSEF_IP7 (_ULCAST_(1) << 15) +#define CAUSEB_IV 23 +#define CAUSEF_IV (_ULCAST_(1) << 23) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CAUSEB_CE 28 +#define CAUSEF_CE (_ULCAST_(3) << 28) +#define CAUSEB_BD 31 +#define CAUSEF_BD (_ULCAST_(1) << 31) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CONF_CM_CACHABLE_NO_WA 0 +#define CONF_CM_CACHABLE_WA 1 +#define CONF_CM_UNCACHED 2 +#define CONF_CM_CACHABLE_NONCOHERENT 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CONF_CM_CACHABLE_CE 4 +#define CONF_CM_CACHABLE_COW 5 +#define CONF_CM_CACHABLE_CUW 6 +#define CONF_CM_CACHABLE_ACCELERATED 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CONF_CM_CMASK 7 +#define CONF_BE (_ULCAST_(1) << 15) +#define CONF_CU (_ULCAST_(1) << 3) +#define CONF_DB (_ULCAST_(1) << 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CONF_IB (_ULCAST_(1) << 5) +#define CONF_DC (_ULCAST_(7) << 6) +#define CONF_IC (_ULCAST_(7) << 9) +#define CONF_EB (_ULCAST_(1) << 13) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CONF_EM (_ULCAST_(1) << 14) +#define CONF_SM (_ULCAST_(1) << 16) +#define CONF_SC (_ULCAST_(1) << 17) +#define CONF_EW (_ULCAST_(3) << 18) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CONF_EP (_ULCAST_(15)<< 24) +#define CONF_EC (_ULCAST_(7) << 28) +#define CONF_CM (_ULCAST_(1) << 31) +#define R4K_CONF_SW (_ULCAST_(1) << 20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R4K_CONF_SS (_ULCAST_(1) << 21) +#define R4K_CONF_SB (_ULCAST_(3) << 22) +#define R5K_CONF_SE (_ULCAST_(1) << 12) +#define R5K_CONF_SS (_ULCAST_(3) << 20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define RM7K_CONF_SE (_ULCAST_(1) << 3) +#define RM7K_CONF_TE (_ULCAST_(1) << 12) +#define RM7K_CONF_CLK (_ULCAST_(1) << 16) +#define RM7K_CONF_TC (_ULCAST_(1) << 17) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define RM7K_CONF_SI (_ULCAST_(3) << 20) +#define RM7K_CONF_SC (_ULCAST_(1) << 31) +#define R10K_CONF_DN (_ULCAST_(3) << 3) +#define R10K_CONF_CT (_ULCAST_(1) << 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R10K_CONF_PE (_ULCAST_(1) << 6) +#define R10K_CONF_PM (_ULCAST_(3) << 7) +#define R10K_CONF_EC (_ULCAST_(15)<< 9) +#define R10K_CONF_SB (_ULCAST_(1) << 13) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R10K_CONF_SK (_ULCAST_(1) << 14) +#define R10K_CONF_SS (_ULCAST_(7) << 16) +#define R10K_CONF_SC (_ULCAST_(7) << 19) +#define R10K_CONF_DC (_ULCAST_(7) << 26) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R10K_CONF_IC (_ULCAST_(7) << 29) +#define VR41_CONF_CS (_ULCAST_(1) << 12) +#define VR41_CONF_P4K (_ULCAST_(1) << 13) +#define VR41_CONF_BP (_ULCAST_(1) << 16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VR41_CONF_M16 (_ULCAST_(1) << 20) +#define VR41_CONF_AD (_ULCAST_(1) << 23) +#define R30XX_CONF_FDM (_ULCAST_(1) << 19) +#define R30XX_CONF_REV (_ULCAST_(1) << 22) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R30XX_CONF_AC (_ULCAST_(1) << 23) +#define R30XX_CONF_RF (_ULCAST_(1) << 24) +#define R30XX_CONF_HALT (_ULCAST_(1) << 25) +#define R30XX_CONF_FPINT (_ULCAST_(7) << 26) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R30XX_CONF_DBR (_ULCAST_(1) << 29) +#define R30XX_CONF_SB (_ULCAST_(1) << 30) +#define R30XX_CONF_LOCK (_ULCAST_(1) << 31) +#define TX49_CONF_DC (_ULCAST_(1) << 16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TX49_CONF_IC (_ULCAST_(1) << 17) +#define TX49_CONF_HALT (_ULCAST_(1) << 18) +#define TX49_CONF_CWFON (_ULCAST_(1) << 27) +#define MIPS_CONF_MT (_ULCAST_(7) << 7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CONF_AR (_ULCAST_(7) << 10) +#define MIPS_CONF_AT (_ULCAST_(3) << 13) +#define MIPS_CONF_M (_ULCAST_(1) << 31) +#define MIPS_CONF1_FP (_ULCAST_(1) << 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CONF1_EP (_ULCAST_(1) << 1) +#define MIPS_CONF1_CA (_ULCAST_(1) << 2) +#define MIPS_CONF1_WR (_ULCAST_(1) << 3) +#define MIPS_CONF1_PC (_ULCAST_(1) << 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CONF1_MD (_ULCAST_(1) << 5) +#define MIPS_CONF1_C2 (_ULCAST_(1) << 6) +#define MIPS_CONF1_DA (_ULCAST_(7) << 7) +#define MIPS_CONF1_DL (_ULCAST_(7) << 10) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CONF1_DS (_ULCAST_(7) << 13) +#define MIPS_CONF1_IA (_ULCAST_(7) << 16) +#define MIPS_CONF1_IL (_ULCAST_(7) << 19) +#define MIPS_CONF1_IS (_ULCAST_(7) << 22) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CONF1_TLBS (_ULCAST_(63)<< 25) +#define MIPS_CONF2_SA (_ULCAST_(15)<< 0) +#define MIPS_CONF2_SL (_ULCAST_(15)<< 4) +#define MIPS_CONF2_SS (_ULCAST_(15)<< 8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CONF2_SU (_ULCAST_(15)<< 12) +#define MIPS_CONF2_TA (_ULCAST_(15)<< 16) +#define MIPS_CONF2_TL (_ULCAST_(15)<< 20) +#define MIPS_CONF2_TS (_ULCAST_(15)<< 24) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CONF2_TU (_ULCAST_(7) << 28) +#define MIPS_CONF3_TL (_ULCAST_(1) << 0) +#define MIPS_CONF3_SM (_ULCAST_(1) << 1) +#define MIPS_CONF3_MT (_ULCAST_(1) << 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CONF3_SP (_ULCAST_(1) << 4) +#define MIPS_CONF3_VINT (_ULCAST_(1) << 5) +#define MIPS_CONF3_VEIC (_ULCAST_(1) << 6) +#define MIPS_CONF3_LPA (_ULCAST_(1) << 7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_CONF3_DSP (_ULCAST_(1) << 10) +#define MIPS_CONF3_ULRI (_ULCAST_(1) << 13) +#define MIPS_CONF7_WII (_ULCAST_(1) << 31) +#define MIPS_CONF7_RPS (_ULCAST_(1) << 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_FPIR_S (_ULCAST_(1) << 16) +#define MIPS_FPIR_D (_ULCAST_(1) << 17) +#define MIPS_FPIR_PS (_ULCAST_(1) << 18) +#define MIPS_FPIR_3D (_ULCAST_(1) << 19) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_FPIR_W (_ULCAST_(1) << 20) +#define MIPS_FPIR_L (_ULCAST_(1) << 21) +#define MIPS_FPIR_F64 (_ULCAST_(1) << 22) +#ifndef __ASSEMBLY__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_r10k_perf_cntr(counter) ({ unsigned int __res; __asm__ __volatile__( "mfpc\t%0, %1" : "=r" (__res) : "i" (counter)); __res; }) +#define write_r10k_perf_cntr(counter,val) do { __asm__ __volatile__( "mtpc\t%0, %1" : : "r" (val), "i" (counter)); } while (0) +#define read_r10k_perf_event(counter) ({ unsigned int __res; __asm__ __volatile__( "mfps\t%0, %1" : "=r" (__res) : "i" (counter)); __res; }) +#define write_r10k_perf_cntl(counter,val) do { __asm__ __volatile__( "mtps\t%0, %1" : : "r" (val), "i" (counter)); } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __read_32bit_c0_register(source, sel) ({ int __res; if (sel == 0) __asm__ __volatile__( "mfc0\t%0, " #source "\n\t" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips32\n\t" "mfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0\n\t" : "=r" (__res)); __res; }) +#define __read_64bit_c0_register(source, sel) ({ unsigned long long __res; if (sizeof(unsigned long) == 4) __res = __read_64bit_c0_split(source, sel); else if (sel == 0) __asm__ __volatile__( ".set\tmips3\n\t" "dmfc0\t%0, " #source "\n\t" ".set\tmips0" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips64\n\t" "dmfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0" : "=r" (__res)); __res; }) +#define __write_32bit_c0_register(register, sel, value) do { if (sel == 0) __asm__ __volatile__( "mtc0\t%z0, " #register "\n\t" : : "Jr" ((unsigned int)(value))); else __asm__ __volatile__( ".set\tmips32\n\t" "mtc0\t%z0, " #register ", " #sel "\n\t" ".set\tmips0" : : "Jr" ((unsigned int)(value))); } while (0) +#define __write_64bit_c0_register(register, sel, value) do { if (sizeof(unsigned long) == 4) __write_64bit_c0_split(register, sel, value); else if (sel == 0) __asm__ __volatile__( ".set\tmips3\n\t" "dmtc0\t%z0, " #register "\n\t" ".set\tmips0" : : "Jr" (value)); else __asm__ __volatile__( ".set\tmips64\n\t" "dmtc0\t%z0, " #register ", " #sel "\n\t" ".set\tmips0" : : "Jr" (value)); } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __read_ulong_c0_register(reg, sel) ((sizeof(unsigned long) == 4) ? (unsigned long) __read_32bit_c0_register(reg, sel) : (unsigned long) __read_64bit_c0_register(reg, sel)) +#define __write_ulong_c0_register(reg, sel, val) do { if (sizeof(unsigned long) == 4) __write_32bit_c0_register(reg, sel, val); else __write_64bit_c0_register(reg, sel, val); } while (0) +#define __read_32bit_c0_ctrl_register(source) ({ int __res; __asm__ __volatile__( "cfc0\t%0, " #source "\n\t" : "=r" (__res)); __res; }) +#define __write_32bit_c0_ctrl_register(register, value) do { __asm__ __volatile__( "ctc0\t%z0, " #register "\n\t" : : "Jr" ((unsigned int)(value))); } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __read_64bit_c0_split(source, sel) ({ unsigned long long __val; unsigned long __flags; local_irq_save(__flags); if (sel == 0) __asm__ __volatile__( ".set\tmips64\n\t" "dmfc0\t%M0, " #source "\n\t" "dsll\t%L0, %M0, 32\n\t" "dsrl\t%M0, %M0, 32\n\t" "dsrl\t%L0, %L0, 32\n\t" ".set\tmips0" : "=r" (__val)); else __asm__ __volatile__( ".set\tmips64\n\t" "dmfc0\t%M0, " #source ", " #sel "\n\t" "dsll\t%L0, %M0, 32\n\t" "dsrl\t%M0, %M0, 32\n\t" "dsrl\t%L0, %L0, 32\n\t" ".set\tmips0" : "=r" (__val)); local_irq_restore(__flags); __val; }) +#define __write_64bit_c0_split(source, sel, val) do { unsigned long __flags; local_irq_save(__flags); if (sel == 0) __asm__ __volatile__( ".set\tmips64\n\t" "dsll\t%L0, %L0, 32\n\t" "dsrl\t%L0, %L0, 32\n\t" "dsll\t%M0, %M0, 32\n\t" "or\t%L0, %L0, %M0\n\t" "dmtc0\t%L0, " #source "\n\t" ".set\tmips0" : : "r" (val)); else __asm__ __volatile__( ".set\tmips64\n\t" "dsll\t%L0, %L0, 32\n\t" "dsrl\t%L0, %L0, 32\n\t" "dsll\t%M0, %M0, 32\n\t" "or\t%L0, %L0, %M0\n\t" "dmtc0\t%L0, " #source ", " #sel "\n\t" ".set\tmips0" : : "r" (val)); local_irq_restore(__flags); } while (0) +#define read_c0_index() __read_32bit_c0_register($0, 0) +#define write_c0_index(val) __write_32bit_c0_register($0, 0, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_random() __read_32bit_c0_register($1, 0) +#define write_c0_random(val) __write_32bit_c0_register($1, 0, val) +#define read_c0_entrylo0() __read_ulong_c0_register($2, 0) +#define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_entrylo1() __read_ulong_c0_register($3, 0) +#define write_c0_entrylo1(val) __write_ulong_c0_register($3, 0, val) +#define read_c0_conf() __read_32bit_c0_register($3, 0) +#define write_c0_conf(val) __write_32bit_c0_register($3, 0, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_context() __read_ulong_c0_register($4, 0) +#define write_c0_context(val) __write_ulong_c0_register($4, 0, val) +#define read_c0_userlocal() __read_ulong_c0_register($4, 2) +#define write_c0_userlocal(val) __write_ulong_c0_register($4, 2, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_pagemask() __read_32bit_c0_register($5, 0) +#define write_c0_pagemask(val) __write_32bit_c0_register($5, 0, val) +#define read_c0_wired() __read_32bit_c0_register($6, 0) +#define write_c0_wired(val) __write_32bit_c0_register($6, 0, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_info() __read_32bit_c0_register($7, 0) +#define read_c0_cache() __read_32bit_c0_register($7, 0) +#define write_c0_cache(val) __write_32bit_c0_register($7, 0, val) +#define read_c0_badvaddr() __read_ulong_c0_register($8, 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_badvaddr(val) __write_ulong_c0_register($8, 0, val) +#define read_c0_count() __read_32bit_c0_register($9, 0) +#define write_c0_count(val) __write_32bit_c0_register($9, 0, val) +#define read_c0_count2() __read_32bit_c0_register($9, 6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_count2(val) __write_32bit_c0_register($9, 6, val) +#define read_c0_count3() __read_32bit_c0_register($9, 7) +#define write_c0_count3(val) __write_32bit_c0_register($9, 7, val) +#define read_c0_entryhi() __read_ulong_c0_register($10, 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_entryhi(val) __write_ulong_c0_register($10, 0, val) +#define read_c0_compare() __read_32bit_c0_register($11, 0) +#define write_c0_compare(val) __write_32bit_c0_register($11, 0, val) +#define read_c0_compare2() __read_32bit_c0_register($11, 6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_compare2(val) __write_32bit_c0_register($11, 6, val) +#define read_c0_compare3() __read_32bit_c0_register($11, 7) +#define write_c0_compare3(val) __write_32bit_c0_register($11, 7, val) +#define read_c0_status() __read_32bit_c0_register($12, 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_status(val) __write_32bit_c0_register($12, 0, val) +#define read_c0_cause() __read_32bit_c0_register($13, 0) +#define write_c0_cause(val) __write_32bit_c0_register($13, 0, val) +#define read_c0_epc() __read_ulong_c0_register($14, 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_epc(val) __write_ulong_c0_register($14, 0, val) +#define read_c0_prid() __read_32bit_c0_register($15, 0) +#define read_c0_config() __read_32bit_c0_register($16, 0) +#define read_c0_config1() __read_32bit_c0_register($16, 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_config2() __read_32bit_c0_register($16, 2) +#define read_c0_config3() __read_32bit_c0_register($16, 3) +#define read_c0_config4() __read_32bit_c0_register($16, 4) +#define read_c0_config5() __read_32bit_c0_register($16, 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_config6() __read_32bit_c0_register($16, 6) +#define read_c0_config7() __read_32bit_c0_register($16, 7) +#define write_c0_config(val) __write_32bit_c0_register($16, 0, val) +#define write_c0_config1(val) __write_32bit_c0_register($16, 1, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_config2(val) __write_32bit_c0_register($16, 2, val) +#define write_c0_config3(val) __write_32bit_c0_register($16, 3, val) +#define write_c0_config4(val) __write_32bit_c0_register($16, 4, val) +#define write_c0_config5(val) __write_32bit_c0_register($16, 5, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val) +#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val) +#define read_c0_watchlo0() __read_ulong_c0_register($18, 0) +#define read_c0_watchlo1() __read_ulong_c0_register($18, 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_watchlo2() __read_ulong_c0_register($18, 2) +#define read_c0_watchlo3() __read_ulong_c0_register($18, 3) +#define read_c0_watchlo4() __read_ulong_c0_register($18, 4) +#define read_c0_watchlo5() __read_ulong_c0_register($18, 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_watchlo6() __read_ulong_c0_register($18, 6) +#define read_c0_watchlo7() __read_ulong_c0_register($18, 7) +#define write_c0_watchlo0(val) __write_ulong_c0_register($18, 0, val) +#define write_c0_watchlo1(val) __write_ulong_c0_register($18, 1, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val) +#define write_c0_watchlo3(val) __write_ulong_c0_register($18, 3, val) +#define write_c0_watchlo4(val) __write_ulong_c0_register($18, 4, val) +#define write_c0_watchlo5(val) __write_ulong_c0_register($18, 5, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_watchlo6(val) __write_ulong_c0_register($18, 6, val) +#define write_c0_watchlo7(val) __write_ulong_c0_register($18, 7, val) +#define read_c0_watchhi0() __read_32bit_c0_register($19, 0) +#define read_c0_watchhi1() __read_32bit_c0_register($19, 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_watchhi2() __read_32bit_c0_register($19, 2) +#define read_c0_watchhi3() __read_32bit_c0_register($19, 3) +#define read_c0_watchhi4() __read_32bit_c0_register($19, 4) +#define read_c0_watchhi5() __read_32bit_c0_register($19, 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_watchhi6() __read_32bit_c0_register($19, 6) +#define read_c0_watchhi7() __read_32bit_c0_register($19, 7) +#define write_c0_watchhi0(val) __write_32bit_c0_register($19, 0, val) +#define write_c0_watchhi1(val) __write_32bit_c0_register($19, 1, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_watchhi2(val) __write_32bit_c0_register($19, 2, val) +#define write_c0_watchhi3(val) __write_32bit_c0_register($19, 3, val) +#define write_c0_watchhi4(val) __write_32bit_c0_register($19, 4, val) +#define write_c0_watchhi5(val) __write_32bit_c0_register($19, 5, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_watchhi6(val) __write_32bit_c0_register($19, 6, val) +#define write_c0_watchhi7(val) __write_32bit_c0_register($19, 7, val) +#define read_c0_xcontext() __read_ulong_c0_register($20, 0) +#define write_c0_xcontext(val) __write_ulong_c0_register($20, 0, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_intcontrol() __read_32bit_c0_ctrl_register($20) +#define write_c0_intcontrol(val) __write_32bit_c0_ctrl_register($20, val) +#define read_c0_framemask() __read_32bit_c0_register($21, 0) +#define write_c0_framemask(val) __write_32bit_c0_register($21, 0, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_perfcontrol() __read_32bit_c0_register($22, 0) +#define write_c0_perfcontrol(val) __write_32bit_c0_register($22, 0, val) +#define read_c0_diag() __read_32bit_c0_register($22, 0) +#define write_c0_diag(val) __write_32bit_c0_register($22, 0, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_diag1() __read_32bit_c0_register($22, 1) +#define write_c0_diag1(val) __write_32bit_c0_register($22, 1, val) +#define read_c0_diag2() __read_32bit_c0_register($22, 2) +#define write_c0_diag2(val) __write_32bit_c0_register($22, 2, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_diag3() __read_32bit_c0_register($22, 3) +#define write_c0_diag3(val) __write_32bit_c0_register($22, 3, val) +#define read_c0_diag4() __read_32bit_c0_register($22, 4) +#define write_c0_diag4(val) __write_32bit_c0_register($22, 4, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_diag5() __read_32bit_c0_register($22, 5) +#define write_c0_diag5(val) __write_32bit_c0_register($22, 5, val) +#define read_c0_debug() __read_32bit_c0_register($23, 0) +#define write_c0_debug(val) __write_32bit_c0_register($23, 0, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_depc() __read_ulong_c0_register($24, 0) +#define write_c0_depc(val) __write_ulong_c0_register($24, 0, val) +#define read_c0_perfctrl0() __read_32bit_c0_register($25, 0) +#define write_c0_perfctrl0(val) __write_32bit_c0_register($25, 0, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_perfcntr0() __read_32bit_c0_register($25, 1) +#define write_c0_perfcntr0(val) __write_32bit_c0_register($25, 1, val) +#define read_c0_perfctrl1() __read_32bit_c0_register($25, 2) +#define write_c0_perfctrl1(val) __write_32bit_c0_register($25, 2, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_perfcntr1() __read_32bit_c0_register($25, 3) +#define write_c0_perfcntr1(val) __write_32bit_c0_register($25, 3, val) +#define read_c0_perfctrl2() __read_32bit_c0_register($25, 4) +#define write_c0_perfctrl2(val) __write_32bit_c0_register($25, 4, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_perfcntr2() __read_32bit_c0_register($25, 5) +#define write_c0_perfcntr2(val) __write_32bit_c0_register($25, 5, val) +#define read_c0_perfctrl3() __read_32bit_c0_register($25, 6) +#define write_c0_perfctrl3(val) __write_32bit_c0_register($25, 6, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_perfcntr3() __read_32bit_c0_register($25, 7) +#define write_c0_perfcntr3(val) __write_32bit_c0_register($25, 7, val) +#define read_c0_perfcount() __read_64bit_c0_register($25, 0) +#define write_c0_perfcount(val) __write_64bit_c0_register($25, 0, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_ecc() __read_32bit_c0_register($26, 0) +#define write_c0_ecc(val) __write_32bit_c0_register($26, 0, val) +#define read_c0_derraddr0() __read_ulong_c0_register($26, 1) +#define write_c0_derraddr0(val) __write_ulong_c0_register($26, 1, val) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define read_c0_cacheerr() __read_32bit_c0_register($27, 0) +#define read_c0_derraddr1() __read_ulong_c0_register($27, 1) +#define write_c0_derraddr1(val) __write_ulong_c0_register($27, 1, val) +#define read_c0_taglo() __read_32bit_c0_register($28, 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_taglo(val) __write_32bit_c0_register($28, 0, val) +#define read_c0_dtaglo() __read_32bit_c0_register($28, 2) +#define write_c0_dtaglo(val) __write_32bit_c0_register($28, 2, val) +#define read_c0_taghi() __read_32bit_c0_register($29, 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_taghi(val) __write_32bit_c0_register($29, 0, val) +#define read_c0_errorepc() __read_ulong_c0_register($30, 0) +#define write_c0_errorepc(val) __write_ulong_c0_register($30, 0, val) +#define read_c0_hwrena() __read_32bit_c0_register($7, 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_hwrena(val) __write_32bit_c0_register($7, 0, val) +#define read_c0_intctl() __read_32bit_c0_register($12, 1) +#define write_c0_intctl(val) __write_32bit_c0_register($12, 1, val) +#define read_c0_srsctl() __read_32bit_c0_register($12, 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_srsctl(val) __write_32bit_c0_register($12, 2, val) +#define read_c0_srsmap() __read_32bit_c0_register($12, 3) +#define write_c0_srsmap(val) __write_32bit_c0_register($12, 3, val) +#define read_c0_ebase() __read_32bit_c0_register($15, 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define write_c0_ebase(val) __write_32bit_c0_register($15, 1, val) +#define read_32bit_cp1_register(source) ({ int __res; __asm__ __volatile__( ".set\tpush\n\t" ".set\treorder\n\t" "cfc1\t%0,"STR(source)"\n\t" ".set\tpop" : "=r" (__res)); __res;}) +#define rddsp(mask) ({ unsigned int __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " # rddsp $1, %x1 \n" " .word 0x7c000cb8 | (%x1 << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res) : "i" (mask)); __res; }) +#define wrdsp(val, mask) do { __asm__ __volatile__( " .set push \n" " .set noat \n" " move $1, %0 \n" " # wrdsp $1, %x1 \n" " .word 0x7c2004f8 | (%x1 << 11) \n" " .set pop \n" : : "r" (val), "i" (mask)); } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define mfhi0() ({ unsigned long __treg; __asm__ __volatile__( " .set push \n" " .set noat \n" " # mfhi %0, $ac0 \n" " .word 0x00000810 \n" " move %0, $1 \n" " .set pop \n" : "=r" (__treg)); __treg; }) +#define mfhi1() ({ unsigned long __treg; __asm__ __volatile__( " .set push \n" " .set noat \n" " # mfhi %0, $ac1 \n" " .word 0x00200810 \n" " move %0, $1 \n" " .set pop \n" : "=r" (__treg)); __treg; }) +#define mfhi2() ({ unsigned long __treg; __asm__ __volatile__( " .set push \n" " .set noat \n" " # mfhi %0, $ac2 \n" " .word 0x00400810 \n" " move %0, $1 \n" " .set pop \n" : "=r" (__treg)); __treg; }) +#define mfhi3() ({ unsigned long __treg; __asm__ __volatile__( " .set push \n" " .set noat \n" " # mfhi %0, $ac3 \n" " .word 0x00600810 \n" " move %0, $1 \n" " .set pop \n" : "=r" (__treg)); __treg; }) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define mflo0() ({ unsigned long __treg; __asm__ __volatile__( " .set push \n" " .set noat \n" " # mflo %0, $ac0 \n" " .word 0x00000812 \n" " move %0, $1 \n" " .set pop \n" : "=r" (__treg)); __treg; }) +#define mflo1() ({ unsigned long __treg; __asm__ __volatile__( " .set push \n" " .set noat \n" " # mflo %0, $ac1 \n" " .word 0x00200812 \n" " move %0, $1 \n" " .set pop \n" : "=r" (__treg)); __treg; }) +#define mflo2() ({ unsigned long __treg; __asm__ __volatile__( " .set push \n" " .set noat \n" " # mflo %0, $ac2 \n" " .word 0x00400812 \n" " move %0, $1 \n" " .set pop \n" : "=r" (__treg)); __treg; }) +#define mflo3() ({ unsigned long __treg; __asm__ __volatile__( " .set push \n" " .set noat \n" " # mflo %0, $ac3 \n" " .word 0x00600812 \n" " move %0, $1 \n" " .set pop \n" : "=r" (__treg)); __treg; }) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define mthi0(x) do { __asm__ __volatile__( " .set push \n" " .set noat \n" " move $1, %0 \n" " # mthi $1, $ac0 \n" " .word 0x00200011 \n" " .set pop \n" : : "r" (x)); } while (0) +#define mthi1(x) do { __asm__ __volatile__( " .set push \n" " .set noat \n" " move $1, %0 \n" " # mthi $1, $ac1 \n" " .word 0x00200811 \n" " .set pop \n" : : "r" (x)); } while (0) +#define mthi2(x) do { __asm__ __volatile__( " .set push \n" " .set noat \n" " move $1, %0 \n" " # mthi $1, $ac2 \n" " .word 0x00201011 \n" " .set pop \n" : : "r" (x)); } while (0) +#define mthi3(x) do { __asm__ __volatile__( " .set push \n" " .set noat \n" " move $1, %0 \n" " # mthi $1, $ac3 \n" " .word 0x00201811 \n" " .set pop \n" : : "r" (x)); } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define mtlo0(x) do { __asm__ __volatile__( " .set push \n" " .set noat \n" " move $1, %0 \n" " # mtlo $1, $ac0 \n" " .word 0x00200013 \n" " .set pop \n" : : "r" (x)); } while (0) +#define mtlo1(x) do { __asm__ __volatile__( " .set push \n" " .set noat \n" " move $1, %0 \n" " # mtlo $1, $ac1 \n" " .word 0x00200813 \n" " .set pop \n" : : "r" (x)); } while (0) +#define mtlo2(x) do { __asm__ __volatile__( " .set push \n" " .set noat \n" " move $1, %0 \n" " # mtlo $1, $ac2 \n" " .word 0x00201013 \n" " .set pop \n" : : "r" (x)); } while (0) +#define mtlo3(x) do { __asm__ __volatile__( " .set push \n" " .set noat \n" " move $1, %0 \n" " # mtlo $1, $ac3 \n" " .word 0x00201813 \n" " .set pop \n" : : "r" (x)); } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if MIPS34K_MISSED_ITLB_WAR +#endif +#if MIPS34K_MISSED_ITLB_WAR +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __BUILD_SET_C0(name) static inline unsigned int set_c0_##name(unsigned int set) { unsigned int res; res = read_c0_##name(); res |= set; write_c0_##name(res); return res; } static inline unsigned int clear_c0_##name(unsigned int clear) { unsigned int res; res = read_c0_##name(); res &= ~clear; write_c0_##name(res); return res; } static inline unsigned int change_c0_##name(unsigned int change, unsigned int new) { unsigned int res; res = read_c0_##name(); res &= ~change; res |= (new & change); write_c0_##name(res); return res; } +#endif +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mman.h b/9/platforms/android-16/arch-mips/usr/include/asm/mman.h new file mode 100644 index 0000000..cb42c6a --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mman.h @@ -0,0 +1,79 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_MMAN_H +#define _ASM_MMAN_H +#define PROT_NONE 0x00 +#define PROT_READ 0x01 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PROT_WRITE 0x02 +#define PROT_EXEC 0x04 +#define PROT_SEM 0x10 +#define PROT_GROWSDOWN 0x01000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PROT_GROWSUP 0x02000000 +#define MAP_SHARED 0x001 +#define MAP_PRIVATE 0x002 +#define MAP_TYPE 0x00f +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAP_FIXED 0x010 +#define MAP_RENAME 0x020 +#define MAP_AUTOGROW 0x040 +#define MAP_LOCAL 0x080 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAP_AUTORSRV 0x100 +#define MAP_NORESERVE 0x0400 +#define MAP_ANONYMOUS 0x0800 +#define MAP_GROWSDOWN 0x1000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAP_DENYWRITE 0x2000 +#define MAP_EXECUTABLE 0x4000 +#define MAP_LOCKED 0x8000 +#define MAP_POPULATE 0x10000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MAP_NONBLOCK 0x20000 +#define MAP_STACK 0x40000 +#define MAP_HUGETLB 0x80000 +#define MS_ASYNC 0x0001 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MS_INVALIDATE 0x0002 +#define MS_SYNC 0x0004 +#define MCL_CURRENT 1 +#define MCL_FUTURE 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MADV_NORMAL 0 +#define MADV_RANDOM 1 +#define MADV_SEQUENTIAL 2 +#define MADV_WILLNEED 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MADV_DONTNEED 4 +#define MADV_REMOVE 9 +#define MADV_DONTFORK 10 +#define MADV_DOFORK 11 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MADV_MERGEABLE 12 +#define MADV_UNMERGEABLE 13 +#define MADV_HWPOISON 100 +#define MADV_HUGEPAGE 14 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MADV_NOHUGEPAGE 15 +#define MADV_DONTDUMP 16 +#define MADV_DODUMP 17 +#define MAP_FILE 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mmu.h b/9/platforms/android-16/arch-mips/usr/include/asm/mmu.h new file mode 100644 index 0000000..ef62db4 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mmu.h @@ -0,0 +1,23 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_MMU_H +#define __ASM_MMU_H +typedef unsigned long mm_context_t[NR_CPUS]; +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mmzone.h b/9/platforms/android-16/arch-mips/usr/include/asm/mmzone.h new file mode 100644 index 0000000..2f7e1c4 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mmzone.h @@ -0,0 +1,24 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_MMZONE_H_ +#define _ASM_MMZONE_H_ +#include <asm/page.h> +#include <mmzone.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/module.h b/9/platforms/android-16/arch-mips/usr/include/asm/module.h new file mode 100644 index 0000000..dd24290 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/module.h @@ -0,0 +1,68 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_MODULE_H +#define _ASM_MODULE_H +#include <linux/list.h> +#include <asm/uaccess.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mod_arch_specific { + struct list_head dbe_list; + const struct exception_table_entry *dbe_start; + const struct exception_table_entry *dbe_end; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +typedef uint8_t Elf64_Byte; +typedef struct { + Elf64_Addr r_offset; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + Elf64_Word r_sym; + Elf64_Byte r_ssym; + Elf64_Byte r_type3; + Elf64_Byte r_type2; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + Elf64_Byte r_type; +} Elf64_Mips_Rel; +typedef struct { + Elf64_Addr r_offset; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + Elf64_Word r_sym; + Elf64_Byte r_ssym; + Elf64_Byte r_type3; + Elf64_Byte r_type2; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + Elf64_Byte r_type; + Elf64_Sxword r_addend; +} Elf64_Mips_Rela; +#define Elf_Shdr Elf32_Shdr +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define Elf_Sym Elf32_Sym +#define Elf_Ehdr Elf32_Ehdr +#define Elf_Addr Elf32_Addr +#define Elf_Mips_Rel Elf32_Rel +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define Elf_Mips_Rela Elf32_Rela +#define ELF_MIPS_R_SYM(rel) ELF32_R_SYM(rel.r_info) +#define ELF_MIPS_R_TYPE(rel) ELF32_R_TYPE(rel.r_info) +#error MODULE_PROC_FAMILY undefined for your processor configuration +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MODULE_KERNEL_TYPE "32BIT " +#define MODULE_KERNEL_SMTC "" +#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY MODULE_KERNEL_TYPE MODULE_KERNEL_SMTC +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/msgbuf.h b/9/platforms/android-16/arch-mips/usr/include/asm/msgbuf.h new file mode 100644 index 0000000..d81da73 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/msgbuf.h @@ -0,0 +1,41 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_MSGBUF_H +#define _ASM_MSGBUF_H +struct msqid64_ds { + struct ipc64_perm msg_perm; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long __unused1; + __kernel_time_t msg_stime; + unsigned long __unused2; + __kernel_time_t msg_rtime; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long __unused3; + __kernel_time_t msg_ctime; + unsigned long msg_cbytes; + unsigned long msg_qnum; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long msg_qbytes; + __kernel_pid_t msg_lspid; + __kernel_pid_t msg_lrpid; + unsigned long __unused4; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long __unused5; +}; +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/mutex.h b/9/platforms/android-16/arch-mips/usr/include/asm/mutex.h new file mode 100644 index 0000000..74f7c18 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/mutex.h @@ -0,0 +1,19 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#include <asm-generic/mutex-dec.h> diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/page.h b/9/platforms/android-16/arch-mips/usr/include/asm/page.h new file mode 100644 index 0000000..93eb390 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/page.h @@ -0,0 +1,28 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_PAGE_H +#define _ASM_PAGE_H +#ifndef PAGE_SHIFT +#define PAGE_SHIFT 12 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define PAGE_SIZE (1UL << PAGE_SHIFT) +#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1)) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/param.h b/9/platforms/android-16/arch-mips/usr/include/asm/param.h new file mode 100644 index 0000000..9378027 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/param.h @@ -0,0 +1,30 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_PARAM_H +#define _ASM_PARAM_H +#ifndef HZ +#define HZ 100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define EXEC_PAGESIZE 65536 +#ifndef NOGROUP +#define NOGROUP (-1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/pci/bridge.h b/9/platforms/android-16/arch-mips/usr/include/asm/pci/bridge.h new file mode 100644 index 0000000..cd2fde4 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/pci/bridge.h @@ -0,0 +1,676 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_PCI_BRIDGE_H +#define _ASM_PCI_BRIDGE_H +#include <linux/types.h> +#include <linux/pci.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/xtalk/xwidget.h> +#include <asm/sn/types.h> +#define IOPFNSHIFT 12 +#define IOPGSIZE (1 << IOPFNSHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOPG(x) ((x) >> IOPFNSHIFT) +#define IOPGOFF(x) ((x) & (IOPGSIZE-1)) +#define BRIDGE_ATE_RAM_SIZE 0x00000400 +#define BRIDGE_CONFIG_BASE 0x20000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_CONFIG1_BASE 0x28000 +#define BRIDGE_CONFIG_END 0x30000 +#define BRIDGE_CONFIG_SLOT_SIZE 0x1000 +#define BRIDGE_SSRAM_512K 0x00080000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_SSRAM_128K 0x00020000 +#define BRIDGE_SSRAM_64K 0x00010000 +#define BRIDGE_SSRAM_0K 0x00000000 +#ifndef __ASSEMBLY__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef u32 bridgereg_t; +typedef u64 bridge_ate_t; +typedef volatile bridge_ate_t *bridge_ate_p; +typedef volatile struct bridge_s { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + widget_cfg_t b_widget; +#define b_wid_id b_widget.w_id +#define b_wid_stat b_widget.w_status +#define b_wid_err_upper b_widget.w_err_upper_addr +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define b_wid_err_lower b_widget.w_err_lower_addr +#define b_wid_control b_widget.w_control +#define b_wid_req_timeout b_widget.w_req_timeout +#define b_wid_int_upper b_widget.w_intdest_upper_addr +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define b_wid_int_lower b_widget.w_intdest_lower_addr +#define b_wid_err_cmdword b_widget.w_err_cmd_word +#define b_wid_llp b_widget.w_llp_cfg +#define b_wid_tflush b_widget.w_tflush +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t _pad_000058; + bridgereg_t b_wid_aux_err; + bridgereg_t _pad_000060; + bridgereg_t b_wid_resp_upper; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t _pad_000068; + bridgereg_t b_wid_resp_lower; + bridgereg_t _pad_000070; + bridgereg_t b_wid_tst_pin_ctrl; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t _pad_000078[2]; + bridgereg_t _pad_000080; + bridgereg_t b_dir_map; + bridgereg_t _pad_000088[2]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t _pad_000090; + bridgereg_t b_ram_perr; + bridgereg_t _pad_000098[2]; + bridgereg_t _pad_0000A0; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t b_arb; + bridgereg_t _pad_0000A8[2]; + bridgereg_t _pad_0000B0; + bridgereg_t b_nic; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t _pad_0000B8[2]; + bridgereg_t _pad_0000C0; + bridgereg_t b_bus_timeout; +#define b_pci_bus_timeout b_bus_timeout +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t _pad_0000C8; + bridgereg_t b_pci_cfg; + bridgereg_t _pad_0000D0; + bridgereg_t b_pci_err_upper; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t _pad_0000D8; + bridgereg_t b_pci_err_lower; + bridgereg_t _pad_0000E0[8]; +#define b_gio_err_lower b_pci_err_lower +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define b_gio_err_upper b_pci_err_upper + bridgereg_t _pad_000100; + bridgereg_t b_int_status; + bridgereg_t _pad_000108; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t b_int_enable; + bridgereg_t _pad_000110; + bridgereg_t b_int_rst_stat; + bridgereg_t _pad_000118; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t b_int_mode; + bridgereg_t _pad_000120; + bridgereg_t b_int_device; + bridgereg_t _pad_000128; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t b_int_host_err; + struct { + bridgereg_t __pad; + bridgereg_t addr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } b_int_addr[8]; + bridgereg_t _pad_000170[36]; + struct { + bridgereg_t __pad; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t reg; + } b_device[8]; + struct { + bridgereg_t __pad; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t reg; + } b_wr_req_buf[8]; + struct { + bridgereg_t __pad; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t reg; + } b_rrb_map[2]; +#define b_even_resp b_rrb_map[0].reg +#define b_odd_resp b_rrb_map[1].reg +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t _pad_000290; + bridgereg_t b_resp_status; + bridgereg_t _pad_000298; + bridgereg_t b_resp_clear; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t _pad_0002A0[24]; + char _pad_000300[0x10000 - 0x000300]; + union { + bridge_ate_t wr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct { + bridgereg_t _p_pad; + bridgereg_t rd; + } hi; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } b_int_ate_ram[128]; + char _pad_010400[0x11000 - 0x010400]; + struct { + bridgereg_t _p_pad; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bridgereg_t rd; + } b_int_ate_ram_lo[128]; + char _pad_011400[0x20000 - 0x011400]; + union { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u8 c[0x1000 / 1]; + u16 s[0x1000 / 2]; + u32 l[0x1000 / 4]; + u64 d[0x1000 / 8]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + union { + u8 c[0x100 / 1]; + u16 s[0x100 / 2]; + u32 l[0x100 / 4]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 d[0x100 / 8]; + } f[8]; + } b_type0_cfg_dev[8]; + union { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u8 c[0x1000 / 1]; + u16 s[0x1000 / 2]; + u32 l[0x1000 / 4]; + u64 d[0x1000 / 8]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } b_type1_cfg; + char _pad_029000[0x007000]; + union { + u8 c[8 / 1]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u16 s[8 / 2]; + u32 l[8 / 4]; + u64 d[8 / 8]; + } b_pci_iack; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u8 _pad_030007[0x04fff8]; + bridge_ate_t b_ext_ate_ram[0x10000]; + char _pad_100000[0x200000-0x100000]; + union { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u8 c[0x100000 / 1]; + u16 s[0x100000 / 2]; + u32 l[0x100000 / 4]; + u64 d[0x100000 / 8]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } b_devio_raw[10]; +#define b_devio(n) b_devio_raw[((n)<2)?(n*2):(n+2)] + union { + u8 c[0x400000 / 1]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u16 s[0x400000 / 2]; + u32 l[0x400000 / 4]; + u64 d[0x400000 / 8]; + } b_external_flash; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +} bridge_t; +typedef struct bridge_err_cmdword_s { + union { + u32 cmd_word; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct { + u32 didn:4, + sidn:4, + pactyp:4, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + tnum:5, + coh:1, + ds:2, + gbr:1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + vbpm:1, + error:1, + barr:1, + rsvd:8; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } berr_st; + } berr_un; +} bridge_err_cmdword_t; +#define berr_field berr_un.berr_st +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define BRIDGE_WID_ID WIDGET_ID +#define BRIDGE_WID_STAT WIDGET_STATUS +#define BRIDGE_WID_ERR_UPPER WIDGET_ERR_UPPER_ADDR +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_WID_ERR_LOWER WIDGET_ERR_LOWER_ADDR +#define BRIDGE_WID_CONTROL WIDGET_CONTROL +#define BRIDGE_WID_REQ_TIMEOUT WIDGET_REQ_TIMEOUT +#define BRIDGE_WID_INT_UPPER WIDGET_INTDEST_UPPER_ADDR +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_WID_INT_LOWER WIDGET_INTDEST_LOWER_ADDR +#define BRIDGE_WID_ERR_CMDWORD WIDGET_ERR_CMD_WORD +#define BRIDGE_WID_LLP WIDGET_LLP_CFG +#define BRIDGE_WID_TFLUSH WIDGET_TFLUSH +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_WID_AUX_ERR 0x00005C +#define BRIDGE_WID_RESP_UPPER 0x000064 +#define BRIDGE_WID_RESP_LOWER 0x00006C +#define BRIDGE_WID_TST_PIN_CTRL 0x000074 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_DIR_MAP 0x000084 +#define BRIDGE_RAM_PERR 0x000094 +#define BRIDGE_ARB 0x0000A4 +#define BRIDGE_NIC 0x0000B4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_BUS_TIMEOUT 0x0000C4 +#define BRIDGE_PCI_BUS_TIMEOUT BRIDGE_BUS_TIMEOUT +#define BRIDGE_PCI_CFG 0x0000CC +#define BRIDGE_PCI_ERR_UPPER 0x0000D4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_PCI_ERR_LOWER 0x0000DC +#define BRIDGE_INT_STATUS 0x000104 +#define BRIDGE_INT_ENABLE 0x00010C +#define BRIDGE_INT_RST_STAT 0x000114 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_INT_MODE 0x00011C +#define BRIDGE_INT_DEVICE 0x000124 +#define BRIDGE_INT_HOST_ERR 0x00012C +#define BRIDGE_INT_ADDR0 0x000134 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_INT_ADDR_OFF 0x000008 +#define BRIDGE_INT_ADDR(x) (BRIDGE_INT_ADDR0+(x)*BRIDGE_INT_ADDR_OFF) +#define BRIDGE_DEVICE0 0x000204 +#define BRIDGE_DEVICE_OFF 0x000008 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_DEVICE(x) (BRIDGE_DEVICE0+(x)*BRIDGE_DEVICE_OFF) +#define BRIDGE_WR_REQ_BUF0 0x000244 +#define BRIDGE_WR_REQ_BUF_OFF 0x000008 +#define BRIDGE_WR_REQ_BUF(x) (BRIDGE_WR_REQ_BUF0+(x)*BRIDGE_WR_REQ_BUF_OFF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_EVEN_RESP 0x000284 +#define BRIDGE_ODD_RESP 0x00028C +#define BRIDGE_RESP_STATUS 0x000294 +#define BRIDGE_RESP_CLEAR 0x00029C +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ATE_RAM 0x00010000 +#define BRIDGE_TYPE0_CFG_DEV0 0x00020000 +#define BRIDGE_TYPE0_CFG_SLOT_OFF 0x00001000 +#define BRIDGE_TYPE0_CFG_FUNC_OFF 0x00000100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_TYPE0_CFG_DEV(s) (BRIDGE_TYPE0_CFG_DEV0+ (s)*BRIDGE_TYPE0_CFG_SLOT_OFF) +#define BRIDGE_TYPE0_CFG_DEVF(s, f) (BRIDGE_TYPE0_CFG_DEV0+ (s)*BRIDGE_TYPE0_CFG_SLOT_OFF+ (f)*BRIDGE_TYPE0_CFG_FUNC_OFF) +#define BRIDGE_TYPE1_CFG 0x00028000 +#define BRIDGE_PCI_IACK 0x00030000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_EXT_SSRAM 0x00080000 +#define BRIDGE_DEV_CNT 8 +#define BRIDGE_DEVIO0 0x00200000 +#define BRIDGE_DEVIO1 0x00400000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_DEVIO2 0x00600000 +#define BRIDGE_DEVIO_OFF 0x00100000 +#define BRIDGE_DEVIO_2MB 0x00200000 +#define BRIDGE_DEVIO_1MB 0x00100000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_DEVIO(x) ((x)<=1 ? BRIDGE_DEVIO0+(x)*BRIDGE_DEVIO_2MB : BRIDGE_DEVIO2+((x)-2)*BRIDGE_DEVIO_1MB) +#define BRIDGE_EXTERNAL_FLASH 0x00C00000 +#define BRIDGE_WIDGET_PART_NUM 0xc002 +#define XBRIDGE_WIDGET_PART_NUM 0xd002 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_WIDGET_MFGR_NUM 0x036 +#define XBRIDGE_WIDGET_MFGR_NUM 0x024 +#define BRIDGE_REV_A 0x1 +#define BRIDGE_REV_B 0x2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_REV_C 0x3 +#define BRIDGE_REV_D 0x4 +#define BRIDGE_STAT_LLP_REC_CNT (0xFFu << 24) +#define BRIDGE_STAT_LLP_TX_CNT (0xFF << 16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_STAT_FLASH_SELECT (0x1 << 6) +#define BRIDGE_STAT_PCI_GIO_N (0x1 << 5) +#define BRIDGE_STAT_PENDING (0x1F << 0) +#define BRIDGE_CTRL_FLASH_WR_EN (0x1ul << 31) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_CTRL_EN_CLK50 (0x1 << 30) +#define BRIDGE_CTRL_EN_CLK40 (0x1 << 29) +#define BRIDGE_CTRL_EN_CLK33 (0x1 << 28) +#define BRIDGE_CTRL_RST(n) ((n) << 24) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_CTRL_RST_MASK (BRIDGE_CTRL_RST(0xF)) +#define BRIDGE_CTRL_RST_PIN(x) (BRIDGE_CTRL_RST(0x1 << (x))) +#define BRIDGE_CTRL_IO_SWAP (0x1 << 23) +#define BRIDGE_CTRL_MEM_SWAP (0x1 << 22) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_CTRL_PAGE_SIZE (0x1 << 21) +#define BRIDGE_CTRL_SS_PAR_BAD (0x1 << 20) +#define BRIDGE_CTRL_SS_PAR_EN (0x1 << 19) +#define BRIDGE_CTRL_SSRAM_SIZE(n) ((n) << 17) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_CTRL_SSRAM_SIZE_MASK (BRIDGE_CTRL_SSRAM_SIZE(0x3)) +#define BRIDGE_CTRL_SSRAM_512K (BRIDGE_CTRL_SSRAM_SIZE(0x3)) +#define BRIDGE_CTRL_SSRAM_128K (BRIDGE_CTRL_SSRAM_SIZE(0x2)) +#define BRIDGE_CTRL_SSRAM_64K (BRIDGE_CTRL_SSRAM_SIZE(0x1)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_CTRL_SSRAM_1K (BRIDGE_CTRL_SSRAM_SIZE(0x0)) +#define BRIDGE_CTRL_F_BAD_PKT (0x1 << 16) +#define BRIDGE_CTRL_LLP_XBAR_CRD(n) ((n) << 12) +#define BRIDGE_CTRL_LLP_XBAR_CRD_MASK (BRIDGE_CTRL_LLP_XBAR_CRD(0xf)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_CTRL_CLR_RLLP_CNT (0x1 << 11) +#define BRIDGE_CTRL_CLR_TLLP_CNT (0x1 << 10) +#define BRIDGE_CTRL_SYS_END (0x1 << 9) +#define BRIDGE_CTRL_MAX_TRANS(n) ((n) << 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_CTRL_MAX_TRANS_MASK (BRIDGE_CTRL_MAX_TRANS(0x1f)) +#define BRIDGE_CTRL_WIDGET_ID(n) ((n) << 0) +#define BRIDGE_CTRL_WIDGET_ID_MASK (BRIDGE_CTRL_WIDGET_ID(0xf)) +#define BRIDGE_RESP_ERRUPPR_DEVNUM_SHFT (20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_RESP_ERRUPPR_DEVNUM_MASK (0x7 << BRIDGE_RESP_ERRUPPR_DEVNUM_SHFT) +#define BRIDGE_RESP_ERRUPPR_BUFNUM_SHFT (16) +#define BRIDGE_RESP_ERRUPPR_BUFNUM_MASK (0xF << BRIDGE_RESP_ERRUPPR_BUFNUM_SHFT) +#define BRIDGE_RESP_ERRRUPPR_BUFMASK (0xFFFF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_RESP_ERRUPPR_BUFNUM(x) (((x) & BRIDGE_RESP_ERRUPPR_BUFNUM_MASK) >> BRIDGE_RESP_ERRUPPR_BUFNUM_SHFT) +#define BRIDGE_RESP_ERRUPPR_DEVICE(x) (((x) & BRIDGE_RESP_ERRUPPR_DEVNUM_MASK) >> BRIDGE_RESP_ERRUPPR_DEVNUM_SHFT) +#define BRIDGE_DIRMAP_W_ID_SHFT 20 +#define BRIDGE_DIRMAP_W_ID (0xf << BRIDGE_DIRMAP_W_ID_SHFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_DIRMAP_RMF_64 (0x1 << 18) +#define BRIDGE_DIRMAP_ADD512 (0x1 << 17) +#define BRIDGE_DIRMAP_OFF (0x1ffff << 0) +#define BRIDGE_DIRMAP_OFF_ADDRSHFT (31) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ARB_REQ_WAIT_TICK(x) ((x) << 16) +#define BRIDGE_ARB_REQ_WAIT_TICK_MASK BRIDGE_ARB_REQ_WAIT_TICK(0x3) +#define BRIDGE_ARB_REQ_WAIT_EN(x) ((x) << 8) +#define BRIDGE_ARB_REQ_WAIT_EN_MASK BRIDGE_ARB_REQ_WAIT_EN(0xff) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ARB_FREEZE_GNT (1 << 6) +#define BRIDGE_ARB_HPRI_RING_B2 (1 << 5) +#define BRIDGE_ARB_HPRI_RING_B1 (1 << 4) +#define BRIDGE_ARB_HPRI_RING_B0 (1 << 3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ARB_LPRI_RING_B2 (1 << 2) +#define BRIDGE_ARB_LPRI_RING_B1 (1 << 1) +#define BRIDGE_ARB_LPRI_RING_B0 (1 << 0) +#define BRIDGE_BUS_PCI_RETRY_HLD(x) ((x) << 16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_BUS_PCI_RETRY_HLD_MASK BRIDGE_BUS_PCI_RETRY_HLD(0x1f) +#define BRIDGE_BUS_GIO_TIMEOUT (1 << 12) +#define BRIDGE_BUS_PCI_RETRY_CNT(x) ((x) << 0) +#define BRIDGE_BUS_PCI_RETRY_MASK BRIDGE_BUS_PCI_RETRY_CNT(0x3ff) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ISR_MULTI_ERR (0x1u << 31) +#define BRIDGE_ISR_PMU_ESIZE_FAULT (0x1 << 30) +#define BRIDGE_ISR_UNEXP_RESP (0x1 << 29) +#define BRIDGE_ISR_BAD_XRESP_PKT (0x1 << 28) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ISR_BAD_XREQ_PKT (0x1 << 27) +#define BRIDGE_ISR_RESP_XTLK_ERR (0x1 << 26) +#define BRIDGE_ISR_REQ_XTLK_ERR (0x1 << 25) +#define BRIDGE_ISR_INVLD_ADDR (0x1 << 24) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ISR_UNSUPPORTED_XOP (0x1 << 23) +#define BRIDGE_ISR_XREQ_FIFO_OFLOW (0x1 << 22) +#define BRIDGE_ISR_LLP_REC_SNERR (0x1 << 21) +#define BRIDGE_ISR_LLP_REC_CBERR (0x1 << 20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ISR_LLP_RCTY (0x1 << 19) +#define BRIDGE_ISR_LLP_TX_RETRY (0x1 << 18) +#define BRIDGE_ISR_LLP_TCTY (0x1 << 17) +#define BRIDGE_ISR_SSRAM_PERR (0x1 << 16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ISR_PCI_ABORT (0x1 << 15) +#define BRIDGE_ISR_PCI_PARITY (0x1 << 14) +#define BRIDGE_ISR_PCI_SERR (0x1 << 13) +#define BRIDGE_ISR_PCI_PERR (0x1 << 12) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ISR_PCI_MST_TIMEOUT (0x1 << 11) +#define BRIDGE_ISR_GIO_MST_TIMEOUT BRIDGE_ISR_PCI_MST_TIMEOUT +#define BRIDGE_ISR_PCI_RETRY_CNT (0x1 << 10) +#define BRIDGE_ISR_XREAD_REQ_TIMEOUT (0x1 << 9) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ISR_GIO_B_ENBL_ERR (0x1 << 8) +#define BRIDGE_ISR_INT_MSK (0xff << 0) +#define BRIDGE_ISR_INT(x) (0x1 << (x)) +#define BRIDGE_ISR_LINK_ERROR (BRIDGE_ISR_LLP_REC_SNERR|BRIDGE_ISR_LLP_REC_CBERR| BRIDGE_ISR_LLP_RCTY|BRIDGE_ISR_LLP_TX_RETRY| BRIDGE_ISR_LLP_TCTY) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ISR_PCIBUS_PIOERR (BRIDGE_ISR_PCI_MST_TIMEOUT|BRIDGE_ISR_PCI_ABORT) +#define BRIDGE_ISR_PCIBUS_ERROR (BRIDGE_ISR_PCIBUS_PIOERR|BRIDGE_ISR_PCI_PERR| BRIDGE_ISR_PCI_SERR|BRIDGE_ISR_PCI_RETRY_CNT| BRIDGE_ISR_PCI_PARITY) +#define BRIDGE_ISR_XTALK_ERROR (BRIDGE_ISR_XREAD_REQ_TIMEOUT|BRIDGE_ISR_XREQ_FIFO_OFLOW| BRIDGE_ISR_UNSUPPORTED_XOP|BRIDGE_ISR_INVLD_ADDR| BRIDGE_ISR_REQ_XTLK_ERR|BRIDGE_ISR_RESP_XTLK_ERR| BRIDGE_ISR_BAD_XREQ_PKT|BRIDGE_ISR_BAD_XRESP_PKT| BRIDGE_ISR_UNEXP_RESP) +#define BRIDGE_ISR_ERRORS (BRIDGE_ISR_LINK_ERROR|BRIDGE_ISR_PCIBUS_ERROR| BRIDGE_ISR_XTALK_ERROR|BRIDGE_ISR_SSRAM_PERR| BRIDGE_ISR_PMU_ESIZE_FAULT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ISR_ERROR_FATAL ((BRIDGE_ISR_XTALK_ERROR & ~BRIDGE_ISR_XREAD_REQ_TIMEOUT)| BRIDGE_ISR_PCI_SERR|BRIDGE_ISR_PCI_PARITY ) +#define BRIDGE_ISR_ERROR_DUMP (BRIDGE_ISR_PCIBUS_ERROR|BRIDGE_ISR_PMU_ESIZE_FAULT| BRIDGE_ISR_XTALK_ERROR|BRIDGE_ISR_SSRAM_PERR) +#define BRIDGE_IMR_UNEXP_RESP BRIDGE_ISR_UNEXP_RESP +#define BRIDGE_IMR_PMU_ESIZE_FAULT BRIDGE_ISR_PMU_ESIZE_FAULT +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_IMR_BAD_XRESP_PKT BRIDGE_ISR_BAD_XRESP_PKT +#define BRIDGE_IMR_BAD_XREQ_PKT BRIDGE_ISR_BAD_XREQ_PKT +#define BRIDGE_IMR_RESP_XTLK_ERR BRIDGE_ISR_RESP_XTLK_ERR +#define BRIDGE_IMR_REQ_XTLK_ERR BRIDGE_ISR_REQ_XTLK_ERR +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_IMR_INVLD_ADDR BRIDGE_ISR_INVLD_ADDR +#define BRIDGE_IMR_UNSUPPORTED_XOP BRIDGE_ISR_UNSUPPORTED_XOP +#define BRIDGE_IMR_XREQ_FIFO_OFLOW BRIDGE_ISR_XREQ_FIFO_OFLOW +#define BRIDGE_IMR_LLP_REC_SNERR BRIDGE_ISR_LLP_REC_SNERR +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_IMR_LLP_REC_CBERR BRIDGE_ISR_LLP_REC_CBERR +#define BRIDGE_IMR_LLP_RCTY BRIDGE_ISR_LLP_RCTY +#define BRIDGE_IMR_LLP_TX_RETRY BRIDGE_ISR_LLP_TX_RETRY +#define BRIDGE_IMR_LLP_TCTY BRIDGE_ISR_LLP_TCTY +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_IMR_SSRAM_PERR BRIDGE_ISR_SSRAM_PERR +#define BRIDGE_IMR_PCI_ABORT BRIDGE_ISR_PCI_ABORT +#define BRIDGE_IMR_PCI_PARITY BRIDGE_ISR_PCI_PARITY +#define BRIDGE_IMR_PCI_SERR BRIDGE_ISR_PCI_SERR +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_IMR_PCI_PERR BRIDGE_ISR_PCI_PERR +#define BRIDGE_IMR_PCI_MST_TIMEOUT BRIDGE_ISR_PCI_MST_TIMEOUT +#define BRIDGE_IMR_GIO_MST_TIMEOUT BRIDGE_ISR_GIO_MST_TIMEOUT +#define BRIDGE_IMR_PCI_RETRY_CNT BRIDGE_ISR_PCI_RETRY_CNT +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_IMR_XREAD_REQ_TIMEOUT BRIDGE_ISR_XREAD_REQ_TIMEOUT +#define BRIDGE_IMR_GIO_B_ENBL_ERR BRIDGE_ISR_GIO_B_ENBL_ERR +#define BRIDGE_IMR_INT_MSK BRIDGE_ISR_INT_MSK +#define BRIDGE_IMR_INT(x) BRIDGE_ISR_INT(x) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_IRR_MULTI_CLR (0x1 << 6) +#define BRIDGE_IRR_CRP_GRP_CLR (0x1 << 5) +#define BRIDGE_IRR_RESP_BUF_GRP_CLR (0x1 << 4) +#define BRIDGE_IRR_REQ_DSP_GRP_CLR (0x1 << 3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_IRR_LLP_GRP_CLR (0x1 << 2) +#define BRIDGE_IRR_SSRAM_GRP_CLR (0x1 << 1) +#define BRIDGE_IRR_PCI_GRP_CLR (0x1 << 0) +#define BRIDGE_IRR_GIO_GRP_CLR (0x1 << 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_IRR_ALL_CLR 0x7f +#define BRIDGE_IRR_CRP_GRP (BRIDGE_ISR_UNEXP_RESP | BRIDGE_ISR_XREQ_FIFO_OFLOW) +#define BRIDGE_IRR_RESP_BUF_GRP (BRIDGE_ISR_BAD_XRESP_PKT | BRIDGE_ISR_RESP_XTLK_ERR | BRIDGE_ISR_XREAD_REQ_TIMEOUT) +#define BRIDGE_IRR_REQ_DSP_GRP (BRIDGE_ISR_UNSUPPORTED_XOP | BRIDGE_ISR_BAD_XREQ_PKT | BRIDGE_ISR_REQ_XTLK_ERR | BRIDGE_ISR_INVLD_ADDR) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_IRR_LLP_GRP (BRIDGE_ISR_LLP_REC_SNERR | BRIDGE_ISR_LLP_REC_CBERR | BRIDGE_ISR_LLP_RCTY | BRIDGE_ISR_LLP_TX_RETRY | BRIDGE_ISR_LLP_TCTY) +#define BRIDGE_IRR_SSRAM_GRP (BRIDGE_ISR_SSRAM_PERR | BRIDGE_ISR_PMU_ESIZE_FAULT) +#define BRIDGE_IRR_PCI_GRP (BRIDGE_ISR_PCI_ABORT | BRIDGE_ISR_PCI_PARITY | BRIDGE_ISR_PCI_SERR | BRIDGE_ISR_PCI_PERR | BRIDGE_ISR_PCI_MST_TIMEOUT | BRIDGE_ISR_PCI_RETRY_CNT) +#define BRIDGE_IRR_GIO_GRP (BRIDGE_ISR_GIO_B_ENBL_ERR | BRIDGE_ISR_GIO_MST_TIMEOUT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_INT_DEV_SHFT(n) ((n)*3) +#define BRIDGE_INT_DEV_MASK(n) (0x7 << BRIDGE_INT_DEV_SHFT(n)) +#define BRIDGE_INT_DEV_SET(_dev, _line) (_dev << BRIDGE_INT_DEV_SHFT(_line)) +#define BRIDGE_INT_ADDR_HOST 0x0003FF00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_INT_ADDR_FLD 0x000000FF +#define BRIDGE_TMO_PCI_RETRY_HLD_MASK 0x1f0000 +#define BRIDGE_TMO_GIO_TIMEOUT_MASK 0x001000 +#define BRIDGE_TMO_PCI_RETRY_CNT_MASK 0x0003ff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_TMO_PCI_RETRY_CNT_MAX 0x3ff +#define BRIDGE_INT_ADDR_NASID_SHFT 8 +#define BRIDGE_INT_ADDR_DEST_IO (1 << 17) +#define BRIDGE_INT_ADDR_DEST_MEM 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_INT_ADDR_MASK (1 << 17) +#define BRIDGE_DEV_ERR_LOCK_EN 0x10000000 +#define BRIDGE_DEV_PAGE_CHK_DIS 0x08000000 +#define BRIDGE_DEV_FORCE_PCI_PAR 0x04000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_DEV_VIRTUAL_EN 0x02000000 +#define BRIDGE_DEV_PMU_WRGA_EN 0x01000000 +#define BRIDGE_DEV_DIR_WRGA_EN 0x00800000 +#define BRIDGE_DEV_DEV_SIZE 0x00400000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_DEV_RT 0x00200000 +#define BRIDGE_DEV_SWAP_PMU 0x00100000 +#define BRIDGE_DEV_SWAP_DIR 0x00080000 +#define BRIDGE_DEV_PREF 0x00040000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_DEV_PRECISE 0x00020000 +#define BRIDGE_DEV_COH 0x00010000 +#define BRIDGE_DEV_BARRIER 0x00008000 +#define BRIDGE_DEV_GBR 0x00004000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_DEV_DEV_SWAP 0x00002000 +#define BRIDGE_DEV_DEV_IO_MEM 0x00001000 +#define BRIDGE_DEV_OFF_MASK 0x00000fff +#define BRIDGE_DEV_OFF_ADDR_SHFT 20 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_DEV_PMU_BITS (BRIDGE_DEV_PMU_WRGA_EN | BRIDGE_DEV_SWAP_PMU) +#define BRIDGE_DEV_D32_BITS (BRIDGE_DEV_DIR_WRGA_EN | BRIDGE_DEV_SWAP_DIR | BRIDGE_DEV_PREF | BRIDGE_DEV_PRECISE | BRIDGE_DEV_COH | BRIDGE_DEV_BARRIER) +#define BRIDGE_DEV_D64_BITS (BRIDGE_DEV_DIR_WRGA_EN | BRIDGE_DEV_SWAP_DIR | BRIDGE_DEV_COH | BRIDGE_DEV_BARRIER) +#define BRIDGE_ERRUPPR_DEVMASTER (0x1 << 20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ERRUPPR_PCIVDEV (0x1 << 19) +#define BRIDGE_ERRUPPR_DEVNUM_SHFT (16) +#define BRIDGE_ERRUPPR_DEVNUM_MASK (0x7 << BRIDGE_ERRUPPR_DEVNUM_SHFT) +#define BRIDGE_ERRUPPR_DEVICE(err) (((err) >> BRIDGE_ERRUPPR_DEVNUM_SHFT) & 0x7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_ERRUPPR_ADDRMASK (0xFFFF) +#define BRIDGE_INTMODE_CLR_PKT_EN(x) (0x1 << (x)) +#define BRIDGE_CREDIT 3 +#define BRIDGE_RRB_EN 0x8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_RRB_DEV 0x7 +#define BRIDGE_RRB_VDEV 0x4 +#define BRIDGE_RRB_PDEV 0x3 +#define BRIDGE_RRB_VALID(r) (0x00010000<<(r)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_RRB_INUSE(r) (0x00000001<<(r)) +#define BRIDGE_RRB_CLEAR(r) (0x00000001<<(r)) +#define XBOX_BRIDGE_WID 8 +#define FLASH_PROM1_BASE 0xE00000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define XBOX_RPS_EXISTS 1 << 6 +#define XBOX_RPS_FAIL 1 << 4 +#define BRIDGE_PIO32_XTALK_ALIAS_BASE 0x000040000000L +#define BRIDGE_PIO32_XTALK_ALIAS_LIMIT 0x00007FFFFFFFL +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_PIO64_XTALK_ALIAS_BASE 0x000080000000L +#define BRIDGE_PIO64_XTALK_ALIAS_LIMIT 0x0000BFFFFFFFL +#define BRIDGE_PCIIO_XTALK_ALIAS_BASE 0x000100000000L +#define BRIDGE_PCIIO_XTALK_ALIAS_LIMIT 0x0001FFFFFFFFL +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_MIN_PIO_ADDR_MEM 0x00000000 +#define BRIDGE_MAX_PIO_ADDR_MEM 0x3fffffff +#define BRIDGE_MIN_PIO_ADDR_IO 0x00000000 +#define BRIDGE_MAX_PIO_ADDR_IO 0xffffffff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_PCI_MEM32_BASE BRIDGE_PIO32_XTALK_ALIAS_BASE +#define BRIDGE_PCI_MEM32_LIMIT BRIDGE_PIO32_XTALK_ALIAS_LIMIT +#define BRIDGE_PCI_MEM64_BASE BRIDGE_PIO64_XTALK_ALIAS_BASE +#define BRIDGE_PCI_MEM64_LIMIT BRIDGE_PIO64_XTALK_ALIAS_LIMIT +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_PCI_IO_BASE BRIDGE_PCIIO_XTALK_ALIAS_BASE +#define BRIDGE_PCI_IO_LIMIT BRIDGE_PCIIO_XTALK_ALIAS_LIMIT +#define BRIDGE_LOCAL_BASE 0 +#define BRIDGE_DMA_MAPPED_BASE 0x40000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BRIDGE_DMA_MAPPED_SIZE 0x40000000 +#define BRIDGE_DMA_DIRECT_BASE 0x80000000 +#define BRIDGE_DMA_DIRECT_SIZE 0x80000000 +#define PCI32_LOCAL_BASE BRIDGE_LOCAL_BASE +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PCI32_MAPPED_BASE BRIDGE_DMA_MAPPED_BASE +#define PCI32_DIRECT_BASE BRIDGE_DMA_DIRECT_BASE +#define IS_PCI32_LOCAL(x) ((ulong_t)(x) < PCI32_MAPPED_BASE) +#define IS_PCI32_MAPPED(x) ((ulong_t)(x) < PCI32_DIRECT_BASE && (ulong_t)(x) >= PCI32_MAPPED_BASE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IS_PCI32_DIRECT(x) ((ulong_t)(x) >= PCI32_MAPPED_BASE) +#define IS_PCI64(x) ((ulong_t)(x) >= PCI64_BASE) +#define BRIDGE_GIO_MEM32_BASE BRIDGE_PIO32_XTALK_ALIAS_BASE +#define BRIDGE_GIO_MEM32_LIMIT BRIDGE_PIO32_XTALK_ALIAS_LIMIT +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GIO_LOCAL_BASE BRIDGE_LOCAL_BASE +#define GIO_MAPPED_BASE BRIDGE_DMA_MAPPED_BASE +#define GIO_DIRECT_BASE BRIDGE_DMA_DIRECT_BASE +#define IS_GIO_LOCAL(x) ((ulong_t)(x) < GIO_MAPPED_BASE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IS_GIO_MAPPED(x) ((ulong_t)(x) < GIO_DIRECT_BASE && (ulong_t)(x) >= GIO_MAPPED_BASE) +#define IS_GIO_DIRECT(x) ((ulong_t)(x) >= GIO_MAPPED_BASE) +#define BRIDGE_DIRECT_32_SEG_SIZE BRIDGE_DMA_DIRECT_SIZE +#define BRIDGE_DIRECT_32_TO_XTALK(dir_off,adr) ((dir_off) * BRIDGE_DIRECT_32_SEG_SIZE + ((adr) & (BRIDGE_DIRECT_32_SEG_SIZE - 1)) + PHYS_RAMBASE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PCI64_ATTR_TARG_MASK 0xf000000000000000 +#define PCI64_ATTR_TARG_SHFT 60 +#define PCI64_ATTR_PREF 0x0800000000000000 +#define PCI64_ATTR_PREC 0x0400000000000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PCI64_ATTR_VIRTUAL 0x0200000000000000 +#define PCI64_ATTR_BAR 0x0100000000000000 +#define PCI64_ATTR_RMF_MASK 0x00ff000000000000 +#define PCI64_ATTR_RMF_SHFT 48 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef __ASSEMBLY__ +typedef union ate_u { + u64 ent; + struct ate_s { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 rmf:16; + u64 addr:36; + u64 targ:4; + u64 reserved:3; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 barrier:1; + u64 prefetch:1; + u64 precise:1; + u64 coherent:1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 valid:1; + } field; +} ate_t; +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ATE_V 0x01 +#define ATE_CO 0x02 +#define ATE_PREC 0x04 +#define ATE_PREF 0x08 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ATE_BAR 0x10 +#define ATE_PFNSHIFT 12 +#define ATE_TIDSHIFT 8 +#define ATE_RMFSHIFT 48 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define mkate(xaddr, xid, attr) ((xaddr) & 0x0000fffffffff000ULL) | ((xid)<<ATE_TIDSHIFT) | (attr) +#define BRIDGE_INTERNAL_ATES 128 +struct bridge_controller { + struct pci_controller pc; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct resource mem; + struct resource io; + bridge_t *base; + nasid_t nasid; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int widget_id; + unsigned int irq_cpu; + dma64_addr_t baddr; + unsigned int pci_int[8]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define BRIDGE_CONTROLLER(bus) ((struct bridge_controller *)((bus)->sysdata)) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/percpu.h b/9/platforms/android-16/arch-mips/usr/include/asm/percpu.h new file mode 100644 index 0000000..3af8904 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/percpu.h @@ -0,0 +1,23 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_PERCPU_H +#define __ASM_PERCPU_H +#include <asm-generic/percpu.h> +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/pgalloc.h b/9/platforms/android-16/arch-mips/usr/include/asm/pgalloc.h new file mode 100644 index 0000000..0f16346 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/pgalloc.h @@ -0,0 +1,31 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_PGALLOC_H +#define _ASM_PGALLOC_H +#include <linux/highmem.h> +#include <linux/mm.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <linux/sched.h> +#define pmd_pgtable(pmd) pmd_page(pmd) +#define __pte_free_tlb(tlb,pte) do { pgtable_page_dtor(pte); tlb_remove_page((tlb), pte); } while (0) +#define pmd_free(mm, x) do { } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __pmd_free_tlb(tlb, x) do { } while (0) +#define check_pgt_cache() do { } while (0) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/pgtable-32.h b/9/platforms/android-16/arch-mips/usr/include/asm/pgtable-32.h new file mode 100644 index 0000000..f005083 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/pgtable-32.h @@ -0,0 +1,79 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_PGTABLE_32_H +#define _ASM_PGTABLE_32_H +#include <asm/addrspace.h> +#include <asm/page.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <linux/linkage.h> +#include <asm/cachectl.h> +#include <asm/fixmap.h> +#include <asm-generic/pgtable-nopmd.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PGDIR_SHIFT (2 * PAGE_SHIFT + PTE_ORDER - PTE_T_LOG2) +#define PGDIR_SIZE (1UL << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) +#define __PGD_ORDER (32 - 3 * PAGE_SHIFT + PGD_T_LOG2 + PTE_T_LOG2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PGD_ORDER (__PGD_ORDER >= 0 ? __PGD_ORDER : 0) +#define PUD_ORDER aieeee_attempt_to_allocate_pud +#define PMD_ORDER 1 +#define PTE_ORDER 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTRS_PER_PGD (USER_PTRS_PER_PGD * 2) +#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t)) +#define USER_PTRS_PER_PGD (0x80000000UL/PGDIR_SIZE) +#define FIRST_USER_ADDRESS 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VMALLOC_START MAP_BASE +#define PKMAP_BASE (0xfe000000UL) +#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) +#define pte_ERROR(e) printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define pgd_ERROR(e) printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) +#define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK) +#define pte_page(x) pfn_to_page(pte_pfn(x)) +#define pte_pfn(x) ((unsigned long)((x).pte >> _PFN_SHIFT)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define pfn_pte(pfn, prot) __pte(((unsigned long long)(pfn) << _PFN_SHIFT) | pgprot_val(prot)) +#define __pgd_offset(address) pgd_index(address) +#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) +#define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define pgd_offset_k(address) pgd_offset(&init_mm, address) +#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) +#define pgd_offset(mm, addr) ((mm)->pgd + pgd_index(addr)) +#define __pte_offset(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define pte_offset(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address)) +#define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address)) +#define pte_offset_map(dir, address) ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address)) +#define pte_unmap(pte) ((void)(pte)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __swp_type(x) (((x).val >> 8) & 0x1f) +#define __swp_offset(x) ((x).val >> 13) +#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 8) | ((offset) << 13) }) +#define PTE_FILE_MAX_BITS 28 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define pte_to_pgoff(_pte) ((((_pte).pte >> 1) & 0x7) | (((_pte).pte >> 2) & 0x8) | (((_pte).pte >> 8) << 4)) +#define pgoff_to_pte(off) ((pte_t) { (((off) & 0x7) << 1) | (((off) & 0x8) << 2) | (((off) >> 4) << 8) | _PAGE_FILE }) +#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) +#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/pgtable-bits.h b/9/platforms/android-16/arch-mips/usr/include/asm/pgtable-bits.h new file mode 100644 index 0000000..3df2c3d --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/pgtable-bits.h @@ -0,0 +1,54 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_PGTABLE_BITS_H +#define _ASM_PGTABLE_BITS_H +#define _PAGE_PRESENT (1<<0) +#define _PAGE_READ (1<<1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _PAGE_WRITE (1<<2) +#define _PAGE_ACCESSED (1<<3) +#define _PAGE_MODIFIED (1<<4) +#define _PAGE_FILE (1<<4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _PAGE_R4KBUG (1<<5) +#define _PAGE_GLOBAL (1<<6) +#define _PAGE_VALID (1<<7) +#define _PAGE_SILENT_READ (1<<7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _PAGE_DIRTY (1<<8) +#define _PAGE_SILENT_WRITE (1<<8) +#define _CACHE_SHIFT 9 +#define _CACHE_MASK (7<<9) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _CACHE_CACHABLE_NO_WA (0<<_CACHE_SHIFT) +#define _CACHE_CACHABLE_WA (1<<_CACHE_SHIFT) +#define _CACHE_UNCACHED (2<<_CACHE_SHIFT) +#define _CACHE_CACHABLE_NONCOHERENT (3<<_CACHE_SHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _CACHE_CACHABLE_CE (4<<_CACHE_SHIFT) +#define _CACHE_CACHABLE_COW (5<<_CACHE_SHIFT) +#define _CACHE_CACHABLE_COHERENT (5<<_CACHE_SHIFT) +#define _CACHE_CACHABLE_CUW (6<<_CACHE_SHIFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _CACHE_UNCACHED_ACCELERATED (7<<_CACHE_SHIFT) +#define __READABLE (_PAGE_READ | _PAGE_SILENT_READ | _PAGE_ACCESSED) +#define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED) +#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/pgtable.h b/9/platforms/android-16/arch-mips/usr/include/asm/pgtable.h new file mode 100644 index 0000000..46a5ba1 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/pgtable.h @@ -0,0 +1,79 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_PGTABLE_H +#define _ASM_PGTABLE_H +#include <asm/pgtable-32.h> +#include <asm/io.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/pgtable-bits.h> +struct mm_struct; +struct vm_area_struct; +#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _page_cachable_default) +#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | _page_cachable_default) +#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | _page_cachable_default) +#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | _PAGE_GLOBAL | _page_cachable_default) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PAGE_USERIO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _page_cachable_default) +#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED) +#define __P000 __pgprot(0) +#define __P001 __pgprot(0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __P010 __pgprot(0) +#define __P011 __pgprot(0) +#define __P100 __pgprot(0) +#define __P101 __pgprot(0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __P110 __pgprot(0) +#define __P111 __pgprot(0) +#define __S000 __pgprot(0) +#define __S001 __pgprot(0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __S010 __pgprot(0) +#define __S011 __pgprot(0) +#define __S100 __pgprot(0) +#define __S101 __pgprot(0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __S110 __pgprot(0) +#define __S111 __pgprot(0) +#define ZERO_PAGE(vaddr) (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask)))) +#define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT)) +#define pmd_page_vaddr(pmd) pmd_val(pmd) +#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL)) +#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval) +#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0) +#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1) +#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1) +#define pgprot_noncached pgprot_noncached +#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) +#define kern_addr_valid(addr) (1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) remap_pfn_range(vma, vaddr, pfn, size, prot) +#include <asm-generic/pgtable.h> +#define HAVE_ARCH_UNMAPPED_AREA +#define pgtable_cache_init() do { } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/poll.h b/9/platforms/android-16/arch-mips/usr/include/asm/poll.h new file mode 100644 index 0000000..8d6a297 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/poll.h @@ -0,0 +1,25 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_POLL_H +#define __ASM_POLL_H +#define POLLWRNORM POLLOUT +#define POLLWRBAND 0x0100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm-generic/poll.h> +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/posix_types.h b/9/platforms/android-16/arch-mips/usr/include/asm/posix_types.h new file mode 100644 index 0000000..99a2896 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/posix_types.h @@ -0,0 +1,95 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_POSIX_TYPES_H +#define _ASM_POSIX_TYPES_H +#include <asm/sgidefs.h> +typedef unsigned long __kernel_ino_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef unsigned int __kernel_mode_t; +#if _MIPS_SZLONG == 32 +typedef unsigned long __kernel_nlink_t; +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if _MIPS_SZLONG == 64 +typedef unsigned int __kernel_nlink_t; +#endif +typedef long __kernel_off_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef int __kernel_pid_t; +typedef int __kernel_ipc_pid_t; +typedef unsigned int __kernel_uid_t; +typedef unsigned int __kernel_gid_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if _MIPS_SZLONG == 32 +typedef unsigned int __kernel_size_t; +typedef int __kernel_ssize_t; +typedef int __kernel_ptrdiff_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#if _MIPS_SZLONG == 64 +typedef unsigned long __kernel_size_t; +typedef long __kernel_ssize_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef long __kernel_ptrdiff_t; +#endif +typedef long __kernel_time_t; +typedef long __kernel_suseconds_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef long __kernel_clock_t; +typedef int __kernel_timer_t; +typedef int __kernel_clockid_t; +typedef long __kernel_daddr_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef char * __kernel_caddr_t; +typedef unsigned short __kernel_uid16_t; +typedef unsigned short __kernel_gid16_t; +typedef unsigned int __kernel_uid32_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef unsigned int __kernel_gid32_t; +typedef __kernel_uid_t __kernel_old_uid_t; +typedef __kernel_gid_t __kernel_old_gid_t; +typedef unsigned int __kernel_old_dev_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifdef __GNUC__ +typedef long long __kernel_loff_t; +#endif +typedef struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if _MIPS_SZLONG == 32 + long val[2]; +#endif +#if _MIPS_SZLONG == 64 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int val[2]; +#endif +} __kernel_fsid_t; +#if !defined(__GLIBC__) || __GLIBC__ < 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#undef __FD_SET +#define __FD_SET(fd, fdsetp) (((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] |= (1<<((fd) & 31))) +#undef __FD_CLR +#define __FD_CLR(fd, fdsetp) (((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] &= ~(1<<((fd) & 31))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#undef __FD_ISSET +#define __FD_ISSET(fd, fdsetp) ((((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] & (1<<((fd) & 31))) != 0) +#undef __FD_ZERO +#define __FD_ZERO(fdsetp) (memset (fdsetp, 0, sizeof (*(fd_set *)(fdsetp)))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/prefetch.h b/9/platforms/android-16/arch-mips/usr/include/asm/prefetch.h new file mode 100644 index 0000000..a4386be --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/prefetch.h @@ -0,0 +1,34 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_PREFETCH_H +#define __ASM_PREFETCH_H +#define Pref_Load 0 +#define Pref_Store 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define Pref_LoadStreamed 4 +#define Pref_StoreStreamed 5 +#define Pref_LoadRetained 6 +#define Pref_StoreRetained 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define Pref_WriteBackInvalidate 25 +#define Pref_PrepareForStore 30 +#ifdef __ASSEMBLY__ +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/processor.h b/9/platforms/android-16/arch-mips/usr/include/asm/processor.h new file mode 100644 index 0000000..fe9ee76 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/processor.h @@ -0,0 +1,93 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_PROCESSOR_H +#define _ASM_PROCESSOR_H +#include <linux/cpumask.h> +#include <linux/threads.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/cachectl.h> +#include <asm/cpu.h> +#include <asm/cpu-info.h> +#include <asm/mipsregs.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/prefetch.h> +#include <asm/system.h> +#define current_text_addr() ({ __label__ _l; _l: &&_l;}) +#define TASK_SIZE 0x7fff8000UL +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define STACK_TOP TASK_SIZE +#define TASK_UNMAPPED_BASE ((TASK_SIZE / 3) & ~(PAGE_SIZE)) +#define NUM_FPU_REGS 32 +typedef __u64 fpureg_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mips_fpu_struct { + fpureg_t fpr[NUM_FPU_REGS]; + unsigned int fcr31; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NUM_DSP_REGS 6 +typedef __u32 dspreg_t; +struct mips_dsp_state { + dspreg_t dspr[NUM_DSP_REGS]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int dspcontrol; +}; +#define INIT_CPUMASK { {0,} } +typedef struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long seg; +} mm_segment_t; +#define ARCH_MIN_TASKALIGN 8 +struct mips_abi; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct thread_struct { + unsigned long reg16; + unsigned long reg17, reg18, reg19, reg20, reg21, reg22, reg23; + unsigned long reg29, reg30, reg31; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long cp0_status; + struct mips_fpu_struct fpu; + struct mips_dsp_state dsp; + unsigned long cp0_badvaddr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long cp0_baduaddr; + unsigned long error_code; + unsigned long trap_no; + unsigned long irix_trampoline; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long irix_oldctx; + struct mips_abi *abi; +}; +#define FPAFF_INIT +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, } +struct task_struct; +#define release_thread(thread) do { } while(0) +#define prepare_to_copy(tsk) do { } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + THREAD_SIZE - 32) +#define task_pt_regs(tsk) ((struct pt_regs *)__KSTK_TOS(tsk) - 1) +#define KSTK_EIP(tsk) (task_pt_regs(tsk)->cp0_epc) +#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[29]) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KSTK_STATUS(tsk) (task_pt_regs(tsk)->cp0_status) +#define cpu_relax() barrier() +#define return_address() ({__asm__ __volatile__("":::"$31");__builtin_return_address(0);}) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/ptrace.h b/9/platforms/android-16/arch-mips/usr/include/asm/ptrace.h new file mode 100644 index 0000000..43cfcf1 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/ptrace.h @@ -0,0 +1,63 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_PTRACE_H +#define _ASM_PTRACE_H +#define FPR_BASE 32 +#define PC 64 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CAUSE 65 +#define BADVADDR 66 +#define MMHI 67 +#define MMLO 68 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FPC_CSR 69 +#define FPC_EIR 70 +#define DSP_BASE 71 +#define DSP_CONTROL 77 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ACX 78 +struct pt_regs { + unsigned long pad0[6]; + unsigned long regs[32]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long cp0_status; + unsigned long hi; + unsigned long lo; + unsigned long cp0_badvaddr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long cp0_cause; + unsigned long cp0_epc; +} __attribute__ ((aligned (8))); +#define PTRACE_GETREGS 12 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTRACE_SETREGS 13 +#define PTRACE_GETFPREGS 14 +#define PTRACE_SETFPREGS 15 +#define PTRACE_OLDSETOPTIONS 21 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTRACE_GET_THREAD_AREA 25 +#define PTRACE_SET_THREAD_AREA 26 +#define PTRACE_PEEKTEXT_3264 0xc0 +#define PTRACE_PEEKDATA_3264 0xc1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PTRACE_POKETEXT_3264 0xc2 +#define PTRACE_POKEDATA_3264 0xc3 +#define PTRACE_GET_THREAD_AREA_3264 0xc4 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/reg.h b/9/platforms/android-16/arch-mips/usr/include/asm/reg.h new file mode 100644 index 0000000..1b8e8ee --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/reg.h @@ -0,0 +1,71 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_MIPS_REG_H +#define __ASM_MIPS_REG_H +#define EF_R0 6 +#define EF_R1 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_R2 8 +#define EF_R3 9 +#define EF_R4 10 +#define EF_R5 11 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_R6 12 +#define EF_R7 13 +#define EF_R8 14 +#define EF_R9 15 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_R10 16 +#define EF_R11 17 +#define EF_R12 18 +#define EF_R13 19 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_R14 20 +#define EF_R15 21 +#define EF_R16 22 +#define EF_R17 23 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_R18 24 +#define EF_R19 25 +#define EF_R20 26 +#define EF_R21 27 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_R22 28 +#define EF_R23 29 +#define EF_R24 30 +#define EF_R25 31 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_R26 32 +#define EF_R27 33 +#define EF_R28 34 +#define EF_R29 35 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_R30 36 +#define EF_R31 37 +#define EF_LO 38 +#define EF_HI 39 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_CP0_EPC 40 +#define EF_CP0_BADVADDR 41 +#define EF_CP0_STATUS 42 +#define EF_CP0_CAUSE 43 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_UNUSED0 44 +#define EF_SIZE 180 +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/regdef.h b/9/platforms/android-16/arch-mips/usr/include/asm/regdef.h new file mode 100644 index 0000000..12d9c42 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/regdef.h @@ -0,0 +1,118 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_REGDEF_H +#define _ASM_REGDEF_H +#include <asm/sgidefs.h> +#if _MIPS_SIM == _MIPS_SIM_ABI32 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define zero $0 +#define AT $1 +#define v0 $2 +#define v1 $3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define a0 $4 +#define a1 $5 +#define a2 $6 +#define a3 $7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define t0 $8 +#define t1 $9 +#define t2 $10 +#define t3 $11 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define t4 $12 +#define t5 $13 +#define t6 $14 +#define t7 $15 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define s0 $16 +#define s1 $17 +#define s2 $18 +#define s3 $19 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define s4 $20 +#define s5 $21 +#define s6 $22 +#define s7 $23 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define t8 $24 +#define t9 $25 +#define jp $25 +#define k0 $26 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define k1 $27 +#define gp $28 +#define sp $29 +#define fp $30 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define s8 $30 +#define ra $31 +#endif +#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define zero $0 +#define AT $at +#define v0 $2 +#define v1 $3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define a0 $4 +#define a1 $5 +#define a2 $6 +#define a3 $7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define a4 $8 +#define ta0 $8 +#define a5 $9 +#define ta1 $9 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define a6 $10 +#define ta2 $10 +#define a7 $11 +#define ta3 $11 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define t0 $12 +#define t1 $13 +#define t2 $14 +#define t3 $15 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define s0 $16 +#define s1 $17 +#define s2 $18 +#define s3 $19 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define s4 $20 +#define s5 $21 +#define s6 $22 +#define s7 $23 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define t8 $24 +#define t9 $25 +#define jp $25 +#define k0 $26 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define k1 $27 +#define gp $28 +#define sp $29 +#define fp $30 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define s8 $30 +#define ra $31 +#endif +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/resource.h b/9/platforms/android-16/arch-mips/usr/include/asm/resource.h new file mode 100644 index 0000000..1374d7d --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/resource.h @@ -0,0 +1,30 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_RESOURCE_H +#define _ASM_RESOURCE_H +#define RLIMIT_NOFILE 5 +#define RLIMIT_AS 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define RLIMIT_RSS 7 +#define RLIMIT_NPROC 8 +#define RLIMIT_MEMLOCK 9 +#define RLIM_INFINITY 0x7fffffffUL +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm-generic/resource.h> +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/scatterlist.h b/9/platforms/android-16/arch-mips/usr/include/asm/scatterlist.h new file mode 100644 index 0000000..fd697b0 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/scatterlist.h @@ -0,0 +1,34 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_SCATTERLIST_H +#define __ASM_SCATTERLIST_H +#include <asm/types.h> +struct scatterlist { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long page_link; + unsigned int offset; + dma_addr_t dma_address; + unsigned int length; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define sg_dma_address(sg) ((sg)->dma_address) +#define sg_dma_len(sg) ((sg)->length) +#define ISA_DMA_THRESHOLD (0x00ffffffUL) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sections.h b/9/platforms/android-16/arch-mips/usr/include/asm/sections.h new file mode 100644 index 0000000..ee51096 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sections.h @@ -0,0 +1,23 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SECTIONS_H +#define _ASM_SECTIONS_H +#include <asm-generic/sections.h> +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/segment.h b/9/platforms/android-16/arch-mips/usr/include/asm/segment.h new file mode 100644 index 0000000..e417612 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/segment.h @@ -0,0 +1,21 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SEGMENT_H +#define _ASM_SEGMENT_H +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sembuf.h b/9/platforms/android-16/arch-mips/usr/include/asm/sembuf.h new file mode 100644 index 0000000..b524f68 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sembuf.h @@ -0,0 +1,31 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SEMBUF_H +#define _ASM_SEMBUF_H +struct semid64_ds { + struct ipc64_perm sem_perm; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __kernel_time_t sem_otime; + __kernel_time_t sem_ctime; + unsigned long sem_nsems; + unsigned long __unused1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long __unused2; +}; +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/setup.h b/9/platforms/android-16/arch-mips/usr/include/asm/setup.h new file mode 100644 index 0000000..731e993 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/setup.h @@ -0,0 +1,23 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _MIPS_SETUP_H +#define _MIPS_SETUP_H +#define COMMAND_LINE_SIZE 256 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sgi/hpc3.h b/9/platforms/android-16/arch-mips/usr/include/asm/sgi/hpc3.h new file mode 100644 index 0000000..d4f4280 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sgi/hpc3.h @@ -0,0 +1,290 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _SGI_HPC3_H +#define _SGI_HPC3_H +#include <linux/types.h> +#include <asm/page.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct hpc_dma_desc { + u32 pbuf; + u32 cntinfo; +#define HPCDMA_EOX 0x80000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPCDMA_EOR 0x80000000 +#define HPCDMA_EOXP 0x40000000 +#define HPCDMA_EORP 0x40000000 +#define HPCDMA_XIE 0x20000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPCDMA_XIU 0x01000000 +#define HPCDMA_EIPC 0x00ff0000 +#define HPCDMA_ETXD 0x00008000 +#define HPCDMA_OWN 0x00004000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPCDMA_BCNT 0x00003fff + u32 pnext; +}; +struct hpc3_pbus_dmacregs { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 pbdma_bptr; + volatile u32 pbdma_dptr; + u32 _unused0[0x1000/4 - 2]; + volatile u32 pbdma_ctrl; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_PDMACTRL_INT 0x00000001 +#define HPC3_PDMACTRL_ISACT 0x00000002 +#define HPC3_PDMACTRL_SEL 0x00000002 +#define HPC3_PDMACTRL_RCV 0x00000004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_PDMACTRL_FLSH 0x00000008 +#define HPC3_PDMACTRL_ACT 0x00000010 +#define HPC3_PDMACTRL_LD 0x00000020 +#define HPC3_PDMACTRL_RT 0x00000040 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_PDMACTRL_HW 0x0000ff00 +#define HPC3_PDMACTRL_FB 0x003f0000 +#define HPC3_PDMACTRL_FE 0x3f000000 + u32 _unused1[0x1000/4 - 1]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct hpc3_scsiregs { + volatile u32 cbptr; + volatile u32 ndptr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 _unused0[0x1000/4 - 2]; + volatile u32 bcd; +#define HPC3_SBCD_BCNTMSK 0x00003fff +#define HPC3_SBCD_XIE 0x00004000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_SBCD_EOX 0x00008000 + volatile u32 ctrl; +#define HPC3_SCTRL_IRQ 0x01 +#define HPC3_SCTRL_ENDIAN 0x02 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_SCTRL_DIR 0x04 +#define HPC3_SCTRL_FLUSH 0x08 +#define HPC3_SCTRL_ACTIVE 0x10 +#define HPC3_SCTRL_AMASK 0x20 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_SCTRL_CRESET 0x40 +#define HPC3_SCTRL_PERR 0x80 + volatile u32 gfptr; + volatile u32 dfptr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 dconfig; +#define HPC3_SDCFG_HCLK 0x00001 +#define HPC3_SDCFG_D1 0x00006 +#define HPC3_SDCFG_D2 0x00038 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_SDCFG_D3 0x001c0 +#define HPC3_SDCFG_HWAT 0x00e00 +#define HPC3_SDCFG_HW 0x01000 +#define HPC3_SDCFG_SWAP 0x02000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_SDCFG_EPAR 0x04000 +#define HPC3_SDCFG_POLL 0x08000 +#define HPC3_SDCFG_ERLY 0x30000 + volatile u32 pconfig; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_SPCFG_P3 0x0003 +#define HPC3_SPCFG_P2W 0x001c +#define HPC3_SPCFG_P2R 0x01e0 +#define HPC3_SPCFG_P1 0x0e00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_SPCFG_HW 0x1000 +#define HPC3_SPCFG_SWAP 0x2000 +#define HPC3_SPCFG_EPAR 0x4000 +#define HPC3_SPCFG_FUJI 0x8000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 _unused1[0x1000/4 - 6]; +}; +struct hpc3_ethregs { + volatile u32 rx_cbptr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 rx_ndptr; + u32 _unused0[0x1000/4 - 2]; + volatile u32 rx_bcd; +#define HPC3_ERXBCD_BCNTMSK 0x00003fff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_ERXBCD_XIE 0x20000000 +#define HPC3_ERXBCD_EOX 0x80000000 + volatile u32 rx_ctrl; +#define HPC3_ERXCTRL_STAT50 0x0000003f +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_ERXCTRL_STAT6 0x00000040 +#define HPC3_ERXCTRL_STAT7 0x00000080 +#define HPC3_ERXCTRL_ENDIAN 0x00000100 +#define HPC3_ERXCTRL_ACTIVE 0x00000200 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_ERXCTRL_AMASK 0x00000400 +#define HPC3_ERXCTRL_RBO 0x00000800 + volatile u32 rx_gfptr; + volatile u32 rx_dfptr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 _unused1; + volatile u32 reset; +#define HPC3_ERST_CRESET 0x1 +#define HPC3_ERST_CLRIRQ 0x2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_ERST_LBACK 0x4 + volatile u32 dconfig; +#define HPC3_EDCFG_D1 0x0000f +#define HPC3_EDCFG_D2 0x000f0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_EDCFG_D3 0x00f00 +#define HPC3_EDCFG_WCTRL 0x01000 +#define HPC3_EDCFG_FRXDC 0x02000 +#define HPC3_EDCFG_FEOP 0x04000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_EDCFG_FIRQ 0x08000 +#define HPC3_EDCFG_PTO 0x30000 + volatile u32 pconfig; +#define HPC3_EPCFG_P1 0x000f +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_EPCFG_P2 0x00f0 +#define HPC3_EPCFG_P3 0x0f00 +#define HPC3_EPCFG_TST 0x1000 + u32 _unused2[0x1000/4 - 8]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 tx_cbptr; + volatile u32 tx_ndptr; + u32 _unused3[0x1000/4 - 2]; + volatile u32 tx_bcd; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_ETXBCD_BCNTMSK 0x00003fff +#define HPC3_ETXBCD_ESAMP 0x10000000 +#define HPC3_ETXBCD_XIE 0x20000000 +#define HPC3_ETXBCD_EOP 0x40000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_ETXBCD_EOX 0x80000000 + volatile u32 tx_ctrl; +#define HPC3_ETXCTRL_STAT30 0x0000000f +#define HPC3_ETXCTRL_STAT4 0x00000010 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_ETXCTRL_STAT75 0x000000e0 +#define HPC3_ETXCTRL_ENDIAN 0x00000100 +#define HPC3_ETXCTRL_ACTIVE 0x00000200 +#define HPC3_ETXCTRL_AMASK 0x00000400 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 tx_gfptr; + volatile u32 tx_dfptr; + u32 _unused4[0x1000/4 - 4]; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct hpc3_regs { + struct hpc3_pbus_dmacregs pbdma[8]; + struct hpc3_scsiregs scsi_chan0, scsi_chan1; + struct hpc3_ethregs ethregs; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 _unused0[0x18000/4]; + volatile u32 istat0; +#define HPC3_ISTAT_PBIMASK 0x0ff +#define HPC3_ISTAT_SC0MASK 0x100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_ISTAT_SC1MASK 0x200 + volatile u32 gio_misc; +#define HPC3_GIOMISC_ERTIME 0x1 +#define HPC3_GIOMISC_DENDIAN 0x2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 eeprom; +#define HPC3_EEPROM_EPROT 0x01 +#define HPC3_EEPROM_CSEL 0x02 +#define HPC3_EEPROM_ECLK 0x04 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_EEPROM_DATO 0x08 +#define HPC3_EEPROM_DATI 0x10 + volatile u32 istat1; + volatile u32 bestat; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_BESTAT_BLMASK 0x000ff +#define HPC3_BESTAT_CTYPE 0x00100 +#define HPC3_BESTAT_PIDSHIFT 9 +#define HPC3_BESTAT_PIDMASK 0x3f700 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 _unused1[0x14000/4 - 5]; + volatile u32 scsi0_ext[256]; + u32 _unused2[0x7c00/4]; + volatile u32 scsi1_ext[256]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 _unused3[0x7c00/4]; + volatile u32 eth_ext[320]; + u32 _unused4[0x3b00/4]; + volatile u32 pbus_extregs[16][256]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 pbus_dmacfg[8][128]; +#define HPC3_DMACFG_D3R_MASK 0x00000001 +#define HPC3_DMACFG_D3R_SHIFT 0 +#define HPC3_DMACFG_D4R_MASK 0x0000001e +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_DMACFG_D4R_SHIFT 1 +#define HPC3_DMACFG_D5R_MASK 0x000001e0 +#define HPC3_DMACFG_D5R_SHIFT 5 +#define HPC3_DMACFG_D3W_MASK 0x00000200 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_DMACFG_D3W_SHIFT 9 +#define HPC3_DMACFG_D4W_MASK 0x00003c00 +#define HPC3_DMACFG_D4W_SHIFT 10 +#define HPC3_DMACFG_D5W_MASK 0x0003c000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_DMACFG_D5W_SHIFT 14 +#define HPC3_DMACFG_DS16 0x00040000 +#define HPC3_DMACFG_EVENHI 0x00080000 +#define HPC3_DMACFG_RTIME 0x00200000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_DMACFG_BURST_MASK 0x07c00000 +#define HPC3_DMACFG_BURST_SHIFT 22 +#define HPC3_DMACFG_DRQLIVE 0x08000000 + volatile u32 pbus_piocfg[16][64]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_PIOCFG_P2R_MASK 0x00001 +#define HPC3_PIOCFG_P2R_SHIFT 0 +#define HPC3_PIOCFG_P3R_MASK 0x0001e +#define HPC3_PIOCFG_P3R_SHIFT 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_PIOCFG_P4R_MASK 0x001e0 +#define HPC3_PIOCFG_P4R_SHIFT 5 +#define HPC3_PIOCFG_P2W_MASK 0x00200 +#define HPC3_PIOCFG_P2W_SHIFT 9 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_PIOCFG_P3W_MASK 0x03c00 +#define HPC3_PIOCFG_P3W_SHIFT 10 +#define HPC3_PIOCFG_P4W_MASK 0x3c000 +#define HPC3_PIOCFG_P4W_SHIFT 14 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_PIOCFG_DS16 0x40000 +#define HPC3_PIOCFG_EVENHI 0x80000 + volatile u32 pbus_promwe; +#define HPC3_PROM_WENAB 0x1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 _unused5[0x0800/4 - 1]; + volatile u32 pbus_promswap; +#define HPC3_PROM_SWAP 0x1 + u32 _unused6[0x0800/4 - 1]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 pbus_gout; +#define HPC3_PROM_STAT 0x1 + u32 _unused7[0x1000/4 - 1]; + volatile u32 rtcregs[14]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 _unused8[50]; + volatile u32 bbram[8192-50-14]; +}; +#define HPC3_CHIP0_BASE 0x1fb80000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HPC3_CHIP1_BASE 0x1fb00000 +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sgi/ioc.h b/9/platforms/android-16/arch-mips/usr/include/asm/sgi/ioc.h new file mode 100644 index 0000000..db75b20 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sgi/ioc.h @@ -0,0 +1,221 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _SGI_IOC_H +#define _SGI_IOC_H +#include <linux/types.h> +#include <asm/sgi/pi1.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct sgioc_uart_regs { + u8 _ctrl1[3]; + volatile u8 ctrl1; + u8 _data1[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 data1; + u8 _ctrl2[3]; + volatile u8 ctrl2; + u8 _data2[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 data2; +}; +struct sgioc_keyb_regs { + u8 _data[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 data; + u8 _command[3]; + volatile u8 command; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct sgint_regs { + u8 _istat0[3]; + volatile u8 istat0; +#define SGINT_ISTAT0_FFULL 0x01 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGINT_ISTAT0_SCSI0 0x02 +#define SGINT_ISTAT0_SCSI1 0x04 +#define SGINT_ISTAT0_ENET 0x08 +#define SGINT_ISTAT0_GFXDMA 0x10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGINT_ISTAT0_PPORT 0x20 +#define SGINT_ISTAT0_HPC2 0x40 +#define SGINT_ISTAT0_LIO2 0x80 + u8 _imask0[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 imask0; + u8 _istat1[3]; + volatile u8 istat1; +#define SGINT_ISTAT1_ISDNI 0x01 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGINT_ISTAT1_PWR 0x02 +#define SGINT_ISTAT1_ISDNH 0x04 +#define SGINT_ISTAT1_LIO3 0x08 +#define SGINT_ISTAT1_HPC3 0x10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGINT_ISTAT1_AFAIL 0x20 +#define SGINT_ISTAT1_VIDEO 0x40 +#define SGINT_ISTAT1_GIO2 0x80 + u8 _imask1[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 imask1; + u8 _vmeistat[3]; + volatile u8 vmeistat; + u8 _cmeimask0[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 cmeimask0; + u8 _cmeimask1[3]; + volatile u8 cmeimask1; + u8 _cmepol[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 cmepol; + u8 _tclear[3]; + volatile u8 tclear; + u8 _errstat[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 errstat; + u32 _unused0[2]; + u8 _tcnt0[3]; + volatile u8 tcnt0; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u8 _tcnt1[3]; + volatile u8 tcnt1; + u8 _tcnt2[3]; + volatile u8 tcnt2; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u8 _tcword[3]; + volatile u8 tcword; +#define SGINT_TCWORD_BCD 0x01 +#define SGINT_TCWORD_MMASK 0x0e +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGINT_TCWORD_MITC 0x00 +#define SGINT_TCWORD_MOS 0x02 +#define SGINT_TCWORD_MRGEN 0x04 +#define SGINT_TCWORD_MSWGEN 0x06 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGINT_TCWORD_MSWST 0x08 +#define SGINT_TCWORD_MHWST 0x0a +#define SGINT_TCWORD_CMASK 0x30 +#define SGINT_TCWORD_CLAT 0x00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGINT_TCWORD_CLSB 0x10 +#define SGINT_TCWORD_CMSB 0x20 +#define SGINT_TCWORD_CALL 0x30 +#define SGINT_TCWORD_CNT0 0x00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGINT_TCWORD_CNT1 0x40 +#define SGINT_TCWORD_CNT2 0x80 +#define SGINT_TCWORD_CRBCK 0xc0 +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGINT_TIMER_CLOCK 1000000 +#define SGINT_TCSAMP_COUNTER ((SGINT_TIMER_CLOCK / HZ) + 255) +struct sgioc_regs { + struct pi1_regs pport; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 _unused0[2]; + struct sgioc_uart_regs uart; + struct sgioc_keyb_regs kbdmouse; + u8 _gcsel[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 gcsel; + u8 _genctrl[3]; + volatile u8 genctrl; + u8 _panel[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 panel; +#define SGIOC_PANEL_POWERON 0x01 +#define SGIOC_PANEL_POWERINTR 0x02 +#define SGIOC_PANEL_VOLDNINTR 0x10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGIOC_PANEL_VOLDNHOLD 0x20 +#define SGIOC_PANEL_VOLUPINTR 0x40 +#define SGIOC_PANEL_VOLUPHOLD 0x80 + u32 _unused1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u8 _sysid[3]; + volatile u8 sysid; +#define SGIOC_SYSID_FULLHOUSE 0x01 +#define SGIOC_SYSID_BOARDREV(x) (((x) & 0x1e) >> 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGIOC_SYSID_CHIPREV(x) (((x) & 0xe0) >> 5) + u32 _unused2; + u8 _read[3]; + volatile u8 read; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 _unused3; + u8 _dmasel[3]; + volatile u8 dmasel; +#define SGIOC_DMASEL_SCLK10MHZ 0x00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGIOC_DMASEL_ISDNB 0x01 +#define SGIOC_DMASEL_ISDNA 0x02 +#define SGIOC_DMASEL_PPORT 0x04 +#define SGIOC_DMASEL_SCLK667MHZ 0x10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGIOC_DMASEL_SCLKEXT 0x20 + u32 _unused4; + u8 _reset[3]; + volatile u8 reset; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGIOC_RESET_PPORT 0x01 +#define SGIOC_RESET_KBDMOUSE 0x02 +#define SGIOC_RESET_EISA 0x04 +#define SGIOC_RESET_ISDN 0x08 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGIOC_RESET_LC0OFF 0x10 +#define SGIOC_RESET_LC1OFF 0x20 + u32 _unused5; + u8 _write[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 write; +#define SGIOC_WRITE_NTHRESH 0x01 +#define SGIOC_WRITE_TPSPEED 0x02 +#define SGIOC_WRITE_EPSEL 0x04 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGIOC_WRITE_EASEL 0x08 +#define SGIOC_WRITE_U1AMODE 0x10 +#define SGIOC_WRITE_U0AMODE 0x20 +#define SGIOC_WRITE_MLO 0x40 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGIOC_WRITE_MHI 0x80 + u32 _unused6; + struct sgint_regs int3; + u32 _unused7[16]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 extio; +#define EXTIO_S0_IRQ_3 0x8000 +#define EXTIO_S0_IRQ_2 0x4000 +#define EXTIO_S0_IRQ_1 0x2000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EXTIO_S0_RETRACE 0x1000 +#define EXTIO_SG_IRQ_3 0x0800 +#define EXTIO_SG_IRQ_2 0x0400 +#define EXTIO_SG_IRQ_1 0x0200 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EXTIO_SG_RETRACE 0x0100 +#define EXTIO_GIO_33MHZ 0x0080 +#define EXTIO_EISA_BUSERR 0x0040 +#define EXTIO_MC_BUSERR 0x0020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EXTIO_HPC3_BUSERR 0x0010 +#define EXTIO_S0_STAT_1 0x0008 +#define EXTIO_S0_STAT_0 0x0004 +#define EXTIO_SG_STAT_1 0x0002 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EXTIO_SG_STAT_0 0x0001 +}; +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sgi/pi1.h b/9/platforms/android-16/arch-mips/usr/include/asm/sgi/pi1.h new file mode 100644 index 0000000..1aa0438 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sgi/pi1.h @@ -0,0 +1,99 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _SGI_PI1_H +#define _SGI_PI1_H +struct pi1_regs { + u8 _data[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 data; + u8 _ctrl[3]; + volatile u8 ctrl; +#define PI1_CTRL_STROBE_N 0x01 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI1_CTRL_AFD_N 0x02 +#define PI1_CTRL_INIT_N 0x04 +#define PI1_CTRL_SLIN_N 0x08 +#define PI1_CTRL_IRQ_ENA 0x10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI1_CTRL_DIR 0x20 +#define PI1_CTRL_SEL 0x40 + u8 _status[3]; + volatile u8 status; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI1_STAT_DEVID 0x03 +#define PI1_STAT_NOINK 0x04 +#define PI1_STAT_ERROR 0x08 +#define PI1_STAT_ONLINE 0x10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI1_STAT_PE 0x20 +#define PI1_STAT_ACK 0x40 +#define PI1_STAT_BUSY 0x80 + u8 _dmactrl[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 dmactrl; +#define PI1_DMACTRL_FIFO_EMPTY 0x01 +#define PI1_DMACTRL_ABORT 0x02 +#define PI1_DMACTRL_STDMODE 0x00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI1_DMACTRL_SGIMODE 0x04 +#define PI1_DMACTRL_RICOHMODE 0x08 +#define PI1_DMACTRL_HPMODE 0x0c +#define PI1_DMACTRL_BLKMODE 0x10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI1_DMACTRL_FIFO_CLEAR 0x20 +#define PI1_DMACTRL_READ 0x40 +#define PI1_DMACTRL_RUN 0x80 + u8 _intstat[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 intstat; +#define PI1_INTSTAT_ACK 0x04 +#define PI1_INTSTAT_FEMPTY 0x08 +#define PI1_INTSTAT_NOINK 0x10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI1_INTSTAT_ONLINE 0x20 +#define PI1_INTSTAT_ERR 0x40 +#define PI1_INTSTAT_PE 0x80 + u8 _intmask[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 intmask; +#define PI1_INTMASK_ACK 0x04 +#define PI1_INTMASK_FIFO_EMPTY 0x08 +#define PI1_INTMASK_NOINK 0x10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI1_INTMASK_ONLINE 0x20 +#define PI1_INTMASK_ERR 0x40 +#define PI1_INTMASK_PE 0x80 + u8 _timer1[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 timer1; +#define PI1_TIME1 0x27 + u8 _timer2[3]; + volatile u8 timer2; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI1_TIME2 0x13 + u8 _timer3[3]; + volatile u8 timer3; +#define PI1_TIME3 0x10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u8 _timer4[3]; + volatile u8 timer4; +#define PI1_TIME4 0x00 +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sgiarcs.h b/9/platforms/android-16/arch-mips/usr/include/asm/sgiarcs.h new file mode 100644 index 0000000..5fe0d47 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sgiarcs.h @@ -0,0 +1,360 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SGIARCS_H +#define _ASM_SGIARCS_H +#include <asm/types.h> +#include <asm/fw/arc/types.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PROM_ESUCCESS 0x00 +#define PROM_E2BIG 0x01 +#define PROM_EACCESS 0x02 +#define PROM_EAGAIN 0x03 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PROM_EBADF 0x04 +#define PROM_EBUSY 0x05 +#define PROM_EFAULT 0x06 +#define PROM_EINVAL 0x07 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PROM_EIO 0x08 +#define PROM_EISDIR 0x09 +#define PROM_EMFILE 0x0a +#define PROM_EMLINK 0x0b +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PROM_ENAMETOOLONG 0x0c +#define PROM_ENODEV 0x0d +#define PROM_ENOENT 0x0e +#define PROM_ENOEXEC 0x0f +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PROM_ENOMEM 0x10 +#define PROM_ENOSPC 0x11 +#define PROM_ENOTDIR 0x12 +#define PROM_ENOTTY 0x13 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PROM_ENXIO 0x14 +#define PROM_EROFS 0x15 +#define PROM_EADDRNOTAVAIL 0x1f +#define PROM_ETIMEDOUT 0x20 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PROM_ECONNABORTED 0x21 +#define PROM_ENOCONNECT 0x22 +enum linux_devclass { + system, processor, cache, adapter, controller, peripheral, memory +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +enum linux_devtypes { + Arc, Cpu, Fpu, + picache, pdcache, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + sicache, sdcache, sccache, + memdev, eisa_adapter, tc_adapter, scsi_adapter, dti_adapter, + multifunc_adapter, dsk_controller, tp_controller, cdrom_controller, + worm_controller, serial_controller, net_controller, disp_controller, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + parallel_controller, ptr_controller, kbd_controller, audio_controller, + misc_controller, disk_peripheral, flpy_peripheral, tp_peripheral, + modem_peripheral, monitor_peripheral, printer_peripheral, + ptr_peripheral, kbd_peripheral, term_peripheral, line_peripheral, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + net_peripheral, misc_peripheral, anon +}; +enum linux_identifier { + bogus, ronly, removable, consin, consout, input, output +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct linux_component { + enum linux_devclass class; + enum linux_devtypes type; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + enum linux_identifier iflags; + USHORT vers; + USHORT rev; + ULONG key; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ULONG amask; + ULONG cdsize; + ULONG ilen; + _PULONG iname; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +typedef struct linux_component pcomponent; +struct linux_sysid { + char vend[8], prod[8]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +enum arcs_memtypes { + arcs_eblock, + arcs_rvpage, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + arcs_fcontig, + arcs_free, + arcs_bmem, + arcs_prog, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + arcs_atmp, + arcs_aperm, +}; +enum arc_memtypes { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + arc_eblock, + arc_rvpage, + arc_free, + arc_bmem, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + arc_prog, + arc_atmp, + arc_aperm, + arc_fcontig, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +union linux_memtypes { + enum arcs_memtypes arcs; + enum arc_memtypes arc; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct linux_mdesc { + union linux_memtypes type; + ULONG base; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ULONG pages; +}; +struct linux_tinfo { + unsigned short yr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned short mnth; + unsigned short day; + unsigned short hr; + unsigned short min; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned short sec; + unsigned short msec; +}; +struct linux_vdirent { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ULONG namelen; + unsigned char attr; + char fname[32]; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum linux_omode { + rdonly, wronly, rdwr, wronly_creat, rdwr_creat, + wronly_ssede, rdwr_ssede, dirent, dirent_creat +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +enum linux_seekmode { + absolute, relative +}; +enum linux_mountops { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + media_load, media_unload +}; +struct linux_bigint { +#ifdef __MIPSEL__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 lo; + s32 hi; +#else + s32 hi; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 lo; +#endif +}; +struct linux_finfo { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct linux_bigint begin; + struct linux_bigint end; + struct linux_bigint cur; + enum linux_devtypes dtype; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long namelen; + unsigned char attr; + char name[32]; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct linux_romvec { + LONG load; + LONG invoke; + LONG exec; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + LONG halt; + LONG pdown; + LONG restart; + LONG reboot; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + LONG imode; + LONG _unused1; + LONG next_component; + LONG child_component; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + LONG parent_component; + LONG component_data; + LONG child_add; + LONG comp_del; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + LONG component_by_path; + LONG cfg_save; + LONG get_sysid; + LONG get_mdesc; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + LONG _unused2; + LONG get_tinfo; + LONG get_rtime; + LONG get_vdirent; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + LONG open; + LONG close; + LONG read; + LONG get_rstatus; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + LONG write; + LONG seek; + LONG mount; + LONG get_evar; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + LONG set_evar; + LONG get_finfo; + LONG set_finfo; + LONG cache_flush; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + LONG TestUnicodeCharacter; + LONG GetDisplayStatus; +}; +typedef struct _SYSTEM_PARAMETER_BLOCK { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ULONG magic; +#define PROMBLOCK_MAGIC 0x53435241 + ULONG len; + USHORT ver; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + USHORT rev; + _PLONG rs_block; + _PLONG dbg_block; + _PLONG gevect; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + _PLONG utlbvect; + ULONG rveclen; + _PVOID romvec; + ULONG pveclen; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + _PVOID pvector; + ULONG adap_cnt; + ULONG adap_typ0; + ULONG adap_vcnt0; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + _PVOID adap_vector; + ULONG adap_typ1; + ULONG adap_vcnt1; + _PVOID adap_vector1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +} SYSTEM_PARAMETER_BLOCK, *PSYSTEM_PARAMETER_BLOCK; +#define PROMBLOCK ((PSYSTEM_PARAMETER_BLOCK) (int)0xA0001000) +#define ROMVECTOR ((struct linux_romvec *) (long)(PROMBLOCK)->romvec) +union linux_cache_key { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct param { +#ifdef __MIPSEL__ + unsigned short size; + unsigned char lsize; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char bsize; +#else + unsigned char bsize; + unsigned char lsize; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned short size; +#endif + } info; + unsigned long allinfo; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct linux_cdata { + char *name; + int mlen; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + enum linux_devtypes type; +}; +#define SGIPROM_STDIN 0 +#define SGIPROM_STDOUT 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGIPROM_ROFILE 0x01 +#define SGIPROM_HFILE 0x02 +#define SGIPROM_SFILE 0x04 +#define SGIPROM_AFILE 0x08 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGIPROM_DFILE 0x10 +#define SGIPROM_DELFILE 0x20 +struct sgi_partition { + unsigned char flag; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGIPART_UNUSED 0x00 +#define SGIPART_ACTIVE 0x80 + unsigned char shead, ssect, scyl; + unsigned char systype; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char ehead, esect, ecyl; + unsigned char rsect0, rsect1, rsect2, rsect3; + unsigned char tsect0, tsect1, tsect2, tsect3; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SGIBBLOCK_MAGIC 0xaa55 +#define SGIBBLOCK_MAXPART 0x0004 +struct sgi_bootblock { + unsigned char _unused[446]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct sgi_partition partitions[SGIBBLOCK_MAXPART]; + unsigned short magic; +}; +struct sgi_bparm_block { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned short bytes_sect; + unsigned char sect_clust; + unsigned short sect_resv; + unsigned char nfats; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned short nroot_dirents; + unsigned short sect_volume; + unsigned char media_type; + unsigned short sect_fat; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned short sect_track; + unsigned short nheads; + unsigned short nhsects; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct sgi_bsector { + unsigned char jmpinfo[3]; + unsigned char manuf_name[8]; + struct sgi_bparm_block info; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define SMB_DEBUG_MAGIC 0xfeeddead +struct linux_smonblock { + unsigned long magic; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + void (*handler)(void); + unsigned long dtable_base; + int (*printf)(const char *fmt, ...); + unsigned long btable_base; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long mpflushreqs; + unsigned long ntab; + unsigned long stab; + int smax; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sgidefs.h b/9/platforms/android-16/arch-mips/usr/include/asm/sgidefs.h new file mode 100644 index 0000000..d63f15e --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sgidefs.h @@ -0,0 +1,38 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_SGIDEFS_H +#define __ASM_SGIDEFS_H +#ifndef __linux__ +#error Use a Linux compiler or give up. +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define _MIPS_ISA_MIPS1 1 +#define _MIPS_ISA_MIPS2 2 +#define _MIPS_ISA_MIPS3 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _MIPS_ISA_MIPS4 4 +#define _MIPS_ISA_MIPS5 5 +#define _MIPS_ISA_MIPS32 6 +#define _MIPS_ISA_MIPS64 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _MIPS_SIM_ABI32 1 +#define _MIPS_SIM_NABI32 2 +#define _MIPS_SIM_ABI64 3 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/shmbuf.h b/9/platforms/android-16/arch-mips/usr/include/asm/shmbuf.h new file mode 100644 index 0000000..3f7d0b1 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/shmbuf.h @@ -0,0 +1,50 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SHMBUF_H +#define _ASM_SHMBUF_H +struct shmid64_ds { + struct ipc64_perm shm_perm; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + size_t shm_segsz; + __kernel_time_t shm_atime; + __kernel_time_t shm_dtime; + __kernel_time_t shm_ctime; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __kernel_pid_t shm_cpid; + __kernel_pid_t shm_lpid; + unsigned long shm_nattch; + unsigned long __unused1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long __unused2; +}; +struct shminfo64 { + unsigned long shmmax; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long shmmin; + unsigned long shmmni; + unsigned long shmseg; + unsigned long shmall; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long __unused1; + unsigned long __unused2; + unsigned long __unused3; + unsigned long __unused4; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/shmparam.h b/9/platforms/android-16/arch-mips/usr/include/asm/shmparam.h new file mode 100644 index 0000000..d5ec78f --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/shmparam.h @@ -0,0 +1,24 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SHMPARAM_H +#define _ASM_SHMPARAM_H +#define __ARCH_FORCE_SHMLBA 1 +#define SHMLBA 0x40000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/bcm1480_int.h b/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/bcm1480_int.h new file mode 100644 index 0000000..b14f1ca --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/bcm1480_int.h @@ -0,0 +1,295 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _BCM1480_INT_H +#define _BCM1480_INT_H +#include "sb1250_defs.h" +#define K_BCM1480_INT_SOURCES 128 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _BCM1480_INT_HIGH(k) (k) +#define _BCM1480_INT_LOW(k) ((k)+64) +#define K_BCM1480_INT_ADDR_TRAP _BCM1480_INT_HIGH(1) +#define K_BCM1480_INT_GPIO_0 _BCM1480_INT_HIGH(4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_GPIO_1 _BCM1480_INT_HIGH(5) +#define K_BCM1480_INT_GPIO_2 _BCM1480_INT_HIGH(6) +#define K_BCM1480_INT_GPIO_3 _BCM1480_INT_HIGH(7) +#define K_BCM1480_INT_PCI_INTA _BCM1480_INT_HIGH(8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_PCI_INTB _BCM1480_INT_HIGH(9) +#define K_BCM1480_INT_PCI_INTC _BCM1480_INT_HIGH(10) +#define K_BCM1480_INT_PCI_INTD _BCM1480_INT_HIGH(11) +#define K_BCM1480_INT_CYCLE_CP0 _BCM1480_INT_HIGH(12) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_CYCLE_CP1 _BCM1480_INT_HIGH(13) +#define K_BCM1480_INT_CYCLE_CP2 _BCM1480_INT_HIGH(14) +#define K_BCM1480_INT_CYCLE_CP3 _BCM1480_INT_HIGH(15) +#define K_BCM1480_INT_TIMER_0 _BCM1480_INT_HIGH(20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_TIMER_1 _BCM1480_INT_HIGH(21) +#define K_BCM1480_INT_TIMER_2 _BCM1480_INT_HIGH(22) +#define K_BCM1480_INT_TIMER_3 _BCM1480_INT_HIGH(23) +#define K_BCM1480_INT_DM_CH_0 _BCM1480_INT_HIGH(28) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_DM_CH_1 _BCM1480_INT_HIGH(29) +#define K_BCM1480_INT_DM_CH_2 _BCM1480_INT_HIGH(30) +#define K_BCM1480_INT_DM_CH_3 _BCM1480_INT_HIGH(31) +#define K_BCM1480_INT_MAC_0 _BCM1480_INT_HIGH(36) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_MAC_0_CH1 _BCM1480_INT_HIGH(37) +#define K_BCM1480_INT_MAC_1 _BCM1480_INT_HIGH(38) +#define K_BCM1480_INT_MAC_1_CH1 _BCM1480_INT_HIGH(39) +#define K_BCM1480_INT_MAC_2 _BCM1480_INT_HIGH(40) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_MAC_2_CH1 _BCM1480_INT_HIGH(41) +#define K_BCM1480_INT_MAC_3 _BCM1480_INT_HIGH(42) +#define K_BCM1480_INT_MAC_3_CH1 _BCM1480_INT_HIGH(43) +#define K_BCM1480_INT_PMI_LOW _BCM1480_INT_HIGH(52) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_PMI_HIGH _BCM1480_INT_HIGH(53) +#define K_BCM1480_INT_PMO_LOW _BCM1480_INT_HIGH(54) +#define K_BCM1480_INT_PMO_HIGH _BCM1480_INT_HIGH(55) +#define K_BCM1480_INT_MBOX_0_0 _BCM1480_INT_HIGH(56) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_MBOX_0_1 _BCM1480_INT_HIGH(57) +#define K_BCM1480_INT_MBOX_0_2 _BCM1480_INT_HIGH(58) +#define K_BCM1480_INT_MBOX_0_3 _BCM1480_INT_HIGH(59) +#define K_BCM1480_INT_MBOX_1_0 _BCM1480_INT_HIGH(60) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_MBOX_1_1 _BCM1480_INT_HIGH(61) +#define K_BCM1480_INT_MBOX_1_2 _BCM1480_INT_HIGH(62) +#define K_BCM1480_INT_MBOX_1_3 _BCM1480_INT_HIGH(63) +#define K_BCM1480_INT_BAD_ECC _BCM1480_INT_LOW(1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_COR_ECC _BCM1480_INT_LOW(2) +#define K_BCM1480_INT_IO_BUS _BCM1480_INT_LOW(3) +#define K_BCM1480_INT_PERF_CNT _BCM1480_INT_LOW(4) +#define K_BCM1480_INT_SW_PERF_CNT _BCM1480_INT_LOW(5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_TRACE_FREEZE _BCM1480_INT_LOW(6) +#define K_BCM1480_INT_SW_TRACE_FREEZE _BCM1480_INT_LOW(7) +#define K_BCM1480_INT_WATCHDOG_TIMER_0 _BCM1480_INT_LOW(8) +#define K_BCM1480_INT_WATCHDOG_TIMER_1 _BCM1480_INT_LOW(9) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_WATCHDOG_TIMER_2 _BCM1480_INT_LOW(10) +#define K_BCM1480_INT_WATCHDOG_TIMER_3 _BCM1480_INT_LOW(11) +#define K_BCM1480_INT_PCI_ERROR _BCM1480_INT_LOW(16) +#define K_BCM1480_INT_PCI_RESET _BCM1480_INT_LOW(17) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_NODE_CONTROLLER _BCM1480_INT_LOW(18) +#define K_BCM1480_INT_HOST_BRIDGE _BCM1480_INT_LOW(19) +#define K_BCM1480_INT_PORT_0_FATAL _BCM1480_INT_LOW(20) +#define K_BCM1480_INT_PORT_0_NONFATAL _BCM1480_INT_LOW(21) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_PORT_1_FATAL _BCM1480_INT_LOW(22) +#define K_BCM1480_INT_PORT_1_NONFATAL _BCM1480_INT_LOW(23) +#define K_BCM1480_INT_PORT_2_FATAL _BCM1480_INT_LOW(24) +#define K_BCM1480_INT_PORT_2_NONFATAL _BCM1480_INT_LOW(25) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_LDT_SMI _BCM1480_INT_LOW(32) +#define K_BCM1480_INT_LDT_NMI _BCM1480_INT_LOW(33) +#define K_BCM1480_INT_LDT_INIT _BCM1480_INT_LOW(34) +#define K_BCM1480_INT_LDT_STARTUP _BCM1480_INT_LOW(35) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_LDT_EXT _BCM1480_INT_LOW(36) +#define K_BCM1480_INT_SMB_0 _BCM1480_INT_LOW(40) +#define K_BCM1480_INT_SMB_1 _BCM1480_INT_LOW(41) +#define K_BCM1480_INT_PCMCIA _BCM1480_INT_LOW(42) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_UART_0 _BCM1480_INT_LOW(44) +#define K_BCM1480_INT_UART_1 _BCM1480_INT_LOW(45) +#define K_BCM1480_INT_UART_2 _BCM1480_INT_LOW(46) +#define K_BCM1480_INT_UART_3 _BCM1480_INT_LOW(47) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_GPIO_4 _BCM1480_INT_LOW(52) +#define K_BCM1480_INT_GPIO_5 _BCM1480_INT_LOW(53) +#define K_BCM1480_INT_GPIO_6 _BCM1480_INT_LOW(54) +#define K_BCM1480_INT_GPIO_7 _BCM1480_INT_LOW(55) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_GPIO_8 _BCM1480_INT_LOW(56) +#define K_BCM1480_INT_GPIO_9 _BCM1480_INT_LOW(57) +#define K_BCM1480_INT_GPIO_10 _BCM1480_INT_LOW(58) +#define K_BCM1480_INT_GPIO_11 _BCM1480_INT_LOW(59) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_GPIO_12 _BCM1480_INT_LOW(60) +#define K_BCM1480_INT_GPIO_13 _BCM1480_INT_LOW(61) +#define K_BCM1480_INT_GPIO_14 _BCM1480_INT_LOW(62) +#define K_BCM1480_INT_GPIO_15 _BCM1480_INT_LOW(63) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define _BCM1480_INT_MASK(w, n) _SB_MAKEMASK(w, ((n) & 0x3F)) +#define _BCM1480_INT_MASK1(n) _SB_MAKEMASK1(((n) & 0x3F)) +#define _BCM1480_INT_OFFSET(n) (((n) & 0x40) << 6) +#define M_BCM1480_INT_CASCADE _BCM1480_INT_MASK1(_BCM1480_INT_HIGH(0)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_ADDR_TRAP _BCM1480_INT_MASK1(K_BCM1480_INT_ADDR_TRAP) +#define M_BCM1480_INT_GPIO_0 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_0) +#define M_BCM1480_INT_GPIO_1 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_1) +#define M_BCM1480_INT_GPIO_2 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_GPIO_3 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_3) +#define M_BCM1480_INT_PCI_INTA _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTA) +#define M_BCM1480_INT_PCI_INTB _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTB) +#define M_BCM1480_INT_PCI_INTC _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTC) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_PCI_INTD _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_INTD) +#define M_BCM1480_INT_CYCLE_CP0 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP0) +#define M_BCM1480_INT_CYCLE_CP1 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP1) +#define M_BCM1480_INT_CYCLE_CP2 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_CYCLE_CP3 _BCM1480_INT_MASK1(K_BCM1480_INT_CYCLE_CP3) +#define M_BCM1480_INT_TIMER_0 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_0) +#define M_BCM1480_INT_TIMER_1 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_1) +#define M_BCM1480_INT_TIMER_2 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_TIMER_3 _BCM1480_INT_MASK1(K_BCM1480_INT_TIMER_3) +#define M_BCM1480_INT_DM_CH_0 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_0) +#define M_BCM1480_INT_DM_CH_1 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_1) +#define M_BCM1480_INT_DM_CH_2 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_DM_CH_3 _BCM1480_INT_MASK1(K_BCM1480_INT_DM_CH_3) +#define M_BCM1480_INT_MAC_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_0) +#define M_BCM1480_INT_MAC_0_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_0_CH1) +#define M_BCM1480_INT_MAC_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_MAC_1_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_1_CH1) +#define M_BCM1480_INT_MAC_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_2) +#define M_BCM1480_INT_MAC_2_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_2_CH1) +#define M_BCM1480_INT_MAC_3 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_MAC_3_CH1 _BCM1480_INT_MASK1(K_BCM1480_INT_MAC_3_CH1) +#define M_BCM1480_INT_PMI_LOW _BCM1480_INT_MASK1(K_BCM1480_INT_PMI_LOW) +#define M_BCM1480_INT_PMI_HIGH _BCM1480_INT_MASK1(K_BCM1480_INT_PMI_HIGH) +#define M_BCM1480_INT_PMO_LOW _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_LOW) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_PMO_HIGH _BCM1480_INT_MASK1(K_BCM1480_INT_PMO_HIGH) +#define M_BCM1480_INT_MBOX_ALL _BCM1480_INT_MASK(8, K_BCM1480_INT_MBOX_0_0) +#define M_BCM1480_INT_MBOX_0_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_0) +#define M_BCM1480_INT_MBOX_0_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_MBOX_0_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_2) +#define M_BCM1480_INT_MBOX_0_3 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_0_3) +#define M_BCM1480_INT_MBOX_1_0 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_0) +#define M_BCM1480_INT_MBOX_1_1 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_MBOX_1_2 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_2) +#define M_BCM1480_INT_MBOX_1_3 _BCM1480_INT_MASK1(K_BCM1480_INT_MBOX_1_3) +#define M_BCM1480_INT_BAD_ECC _BCM1480_INT_MASK1(K_BCM1480_INT_BAD_ECC) +#define M_BCM1480_INT_COR_ECC _BCM1480_INT_MASK1(K_BCM1480_INT_COR_ECC) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_IO_BUS _BCM1480_INT_MASK1(K_BCM1480_INT_IO_BUS) +#define M_BCM1480_INT_PERF_CNT _BCM1480_INT_MASK1(K_BCM1480_INT_PERF_CNT) +#define M_BCM1480_INT_SW_PERF_CNT _BCM1480_INT_MASK1(K_BCM1480_INT_SW_PERF_CNT) +#define M_BCM1480_INT_TRACE_FREEZE _BCM1480_INT_MASK1(K_BCM1480_INT_TRACE_FREEZE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_SW_TRACE_FREEZE _BCM1480_INT_MASK1(K_BCM1480_INT_SW_TRACE_FREEZE) +#define M_BCM1480_INT_WATCHDOG_TIMER_0 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_0) +#define M_BCM1480_INT_WATCHDOG_TIMER_1 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_1) +#define M_BCM1480_INT_WATCHDOG_TIMER_2 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_WATCHDOG_TIMER_3 _BCM1480_INT_MASK1(K_BCM1480_INT_WATCHDOG_TIMER_3) +#define M_BCM1480_INT_PCI_ERROR _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_ERROR) +#define M_BCM1480_INT_PCI_RESET _BCM1480_INT_MASK1(K_BCM1480_INT_PCI_RESET) +#define M_BCM1480_INT_NODE_CONTROLLER _BCM1480_INT_MASK1(K_BCM1480_INT_NODE_CONTROLLER) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_HOST_BRIDGE _BCM1480_INT_MASK1(K_BCM1480_INT_HOST_BRIDGE) +#define M_BCM1480_INT_PORT_0_FATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_0_FATAL) +#define M_BCM1480_INT_PORT_0_NONFATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_0_NONFATAL) +#define M_BCM1480_INT_PORT_1_FATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_1_FATAL) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_PORT_1_NONFATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_1_NONFATAL) +#define M_BCM1480_INT_PORT_2_FATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_2_FATAL) +#define M_BCM1480_INT_PORT_2_NONFATAL _BCM1480_INT_MASK1(K_BCM1480_INT_PORT_2_NONFATAL) +#define M_BCM1480_INT_LDT_SMI _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_SMI) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_LDT_NMI _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_NMI) +#define M_BCM1480_INT_LDT_INIT _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_INIT) +#define M_BCM1480_INT_LDT_STARTUP _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_STARTUP) +#define M_BCM1480_INT_LDT_EXT _BCM1480_INT_MASK1(K_BCM1480_INT_LDT_EXT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_SMB_0 _BCM1480_INT_MASK1(K_BCM1480_INT_SMB_0) +#define M_BCM1480_INT_SMB_1 _BCM1480_INT_MASK1(K_BCM1480_INT_SMB_1) +#define M_BCM1480_INT_PCMCIA _BCM1480_INT_MASK1(K_BCM1480_INT_PCMCIA) +#define M_BCM1480_INT_UART_0 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_UART_1 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_1) +#define M_BCM1480_INT_UART_2 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_2) +#define M_BCM1480_INT_UART_3 _BCM1480_INT_MASK1(K_BCM1480_INT_UART_3) +#define M_BCM1480_INT_GPIO_4 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_GPIO_5 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_5) +#define M_BCM1480_INT_GPIO_6 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_6) +#define M_BCM1480_INT_GPIO_7 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_7) +#define M_BCM1480_INT_GPIO_8 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_GPIO_9 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_9) +#define M_BCM1480_INT_GPIO_10 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_10) +#define M_BCM1480_INT_GPIO_11 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_11) +#define M_BCM1480_INT_GPIO_12 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_12) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_GPIO_13 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_13) +#define M_BCM1480_INT_GPIO_14 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_14) +#define M_BCM1480_INT_GPIO_15 _BCM1480_INT_MASK1(K_BCM1480_INT_GPIO_15) +#define K_BCM1480_INT_MAP_I0 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_MAP_I1 1 +#define K_BCM1480_INT_MAP_I2 2 +#define K_BCM1480_INT_MAP_I3 3 +#define K_BCM1480_INT_MAP_I4 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_MAP_I5 5 +#define K_BCM1480_INT_MAP_NMI 6 +#define K_BCM1480_INT_MAP_DINT 7 +#define S_BCM1480_INT_HT_INTMSG 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_INT_HT_INTMSG _SB_MAKEMASK(3, S_BCM1480_INT_HT_INTMSG) +#define V_BCM1480_INT_HT_INTMSG(x) _SB_MAKEVALUE(x, S_BCM1480_INT_HT_INTMSG) +#define G_BCM1480_INT_HT_INTMSG(x) _SB_GETVALUE(x, S_BCM1480_INT_HT_INTMSG, M_BCM1480_INT_HT_INTMSG) +#define K_BCM1480_INT_HT_INTMSG_FIXED 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_HT_INTMSG_ARBITRATED 1 +#define K_BCM1480_INT_HT_INTMSG_SMI 2 +#define K_BCM1480_INT_HT_INTMSG_NMI 3 +#define K_BCM1480_INT_HT_INTMSG_INIT 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_INT_HT_INTMSG_STARTUP 5 +#define K_BCM1480_INT_HT_INTMSG_EXTINT 6 +#define K_BCM1480_INT_HT_INTMSG_RESERVED 7 +#define M_BCM1480_INT_HT_TRIGGERMODE _SB_MAKEMASK1(3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define V_BCM1480_INT_HT_EDGETRIGGER 0 +#define V_BCM1480_INT_HT_LEVELTRIGGER M_BCM1480_INT_HT_TRIGGERMODE +#define M_BCM1480_INT_HT_DESTMODE _SB_MAKEMASK1(4) +#define V_BCM1480_INT_HT_PHYSICALDEST 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define V_BCM1480_INT_HT_LOGICALDEST M_BCM1480_INT_HT_DESTMODE +#define S_BCM1480_INT_HT_INTDEST 5 +#define M_BCM1480_INT_HT_INTDEST _SB_MAKEMASK(8, S_BCM1480_INT_HT_INTDEST) +#define V_BCM1480_INT_HT_INTDEST(x) _SB_MAKEVALUE(x, S_BCM1480_INT_HT_INTDEST) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_BCM1480_INT_HT_INTDEST(x) _SB_GETVALUE(x, S_BCM1480_INT_HT_INTDEST, M_BCM1480_INT_HT_INTDEST) +#define S_BCM1480_INT_HT_VECTOR 13 +#define M_BCM1480_INT_HT_VECTOR _SB_MAKEMASK(8, S_BCM1480_INT_HT_VECTOR) +#define V_BCM1480_INT_HT_VECTOR(x) _SB_MAKEVALUE(x, S_BCM1480_INT_HT_VECTOR) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_BCM1480_INT_HT_VECTOR(x) _SB_GETVALUE(x, S_BCM1480_INT_HT_VECTOR, M_BCM1480_INT_HT_VECTOR) +#define M_BCM1480_HTVECT_RAISE_INTLDT_HIGH 0x00 +#define M_BCM1480_HTVECT_RAISE_MBOX_0 0x40 +#define M_BCM1480_HTVECT_RAISE_INTLDT_LO 0x80 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_HTVECT_RAISE_MBOX_1 0xC0 +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/bcm1480_scd.h b/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/bcm1480_scd.h new file mode 100644 index 0000000..250aca8 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/bcm1480_scd.h @@ -0,0 +1,209 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _BCM1480_SCD_H +#define _BCM1480_SCD_H +#include "sb1250_defs.h" +#include "sb1250_scd.h" +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_PART_BCM1480 0x1406 +#define K_SYS_PART_BCM1280 0x1206 +#define K_SYS_PART_BCM1455 0x1407 +#define K_SYS_PART_BCM1255 0x1257 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_PART_BCM1158 0x1156 +#define M_BCM1480_SYS_RESERVED0 _SB_MAKEMASK1(0) +#define M_BCM1480_SYS_HT_MINRSTCNT _SB_MAKEMASK1(1) +#define M_BCM1480_SYS_RESERVED2 _SB_MAKEMASK1(2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_SYS_RESERVED3 _SB_MAKEMASK1(3) +#define M_BCM1480_SYS_RESERVED4 _SB_MAKEMASK1(4) +#define M_BCM1480_SYS_IOB_DIV _SB_MAKEMASK1(5) +#define S_BCM1480_SYS_PLL_DIV _SB_MAKE64(6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_SYS_PLL_DIV _SB_MAKEMASK(5, S_BCM1480_SYS_PLL_DIV) +#define V_BCM1480_SYS_PLL_DIV(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_PLL_DIV) +#define G_BCM1480_SYS_PLL_DIV(x) _SB_GETVALUE(x, S_BCM1480_SYS_PLL_DIV, M_BCM1480_SYS_PLL_DIV) +#define S_BCM1480_SYS_SW_DIV _SB_MAKE64(11) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_SYS_SW_DIV _SB_MAKEMASK(5, S_BCM1480_SYS_SW_DIV) +#define V_BCM1480_SYS_SW_DIV(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_SW_DIV) +#define G_BCM1480_SYS_SW_DIV(x) _SB_GETVALUE(x, S_BCM1480_SYS_SW_DIV, M_BCM1480_SYS_SW_DIV) +#define M_BCM1480_SYS_PCMCIA_ENABLE _SB_MAKEMASK1(16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_SYS_DUART1_ENABLE _SB_MAKEMASK1(17) +#define S_BCM1480_SYS_BOOT_MODE _SB_MAKE64(18) +#define M_BCM1480_SYS_BOOT_MODE _SB_MAKEMASK(2, S_BCM1480_SYS_BOOT_MODE) +#define V_BCM1480_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_BOOT_MODE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_BCM1480_SYS_BOOT_MODE(x) _SB_GETVALUE(x, S_BCM1480_SYS_BOOT_MODE, M_BCM1480_SYS_BOOT_MODE) +#define K_BCM1480_SYS_BOOT_MODE_ROM32 0 +#define K_BCM1480_SYS_BOOT_MODE_ROM8 1 +#define K_BCM1480_SYS_BOOT_MODE_SMBUS_SMALL 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_SYS_BOOT_MODE_SMBUS_BIG 3 +#define M_BCM1480_SYS_BOOT_MODE_SMBUS _SB_MAKEMASK1(19) +#define M_BCM1480_SYS_PCI_HOST _SB_MAKEMASK1(20) +#define M_BCM1480_SYS_PCI_ARBITER _SB_MAKEMASK1(21) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_SYS_BIG_ENDIAN _SB_MAKEMASK1(22) +#define M_BCM1480_SYS_GENCLK_EN _SB_MAKEMASK1(23) +#define M_BCM1480_SYS_GEN_PARITY_EN _SB_MAKEMASK1(24) +#define M_BCM1480_SYS_RESERVED25 _SB_MAKEMASK1(25) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_BCM1480_SYS_CONFIG 26 +#define M_BCM1480_SYS_CONFIG _SB_MAKEMASK(6, S_BCM1480_SYS_CONFIG) +#define V_BCM1480_SYS_CONFIG(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_CONFIG) +#define G_BCM1480_SYS_CONFIG(x) _SB_GETVALUE(x, S_BCM1480_SYS_CONFIG, M_BCM1480_SYS_CONFIG) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_SYS_RESERVED32 _SB_MAKEMASK(32, 15) +#define S_BCM1480_SYS_NODEID 47 +#define M_BCM1480_SYS_NODEID _SB_MAKEMASK(4, S_BCM1480_SYS_NODEID) +#define V_BCM1480_SYS_NODEID(x) _SB_MAKEVALUE(x, S_BCM1480_SYS_NODEID) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_BCM1480_SYS_NODEID(x) _SB_GETVALUE(x, S_BCM1480_SYS_NODEID, M_BCM1480_SYS_NODEID) +#define M_BCM1480_SYS_CCNUMA_EN _SB_MAKEMASK1(51) +#define M_BCM1480_SYS_CPU_RESET_0 _SB_MAKEMASK1(52) +#define M_BCM1480_SYS_CPU_RESET_1 _SB_MAKEMASK1(53) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_SYS_CPU_RESET_2 _SB_MAKEMASK1(54) +#define M_BCM1480_SYS_CPU_RESET_3 _SB_MAKEMASK1(55) +#define S_BCM1480_SYS_DISABLECPU0 56 +#define M_BCM1480_SYS_DISABLECPU0 _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_BCM1480_SYS_DISABLECPU1 57 +#define M_BCM1480_SYS_DISABLECPU1 _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU1) +#define S_BCM1480_SYS_DISABLECPU2 58 +#define M_BCM1480_SYS_DISABLECPU2 _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_BCM1480_SYS_DISABLECPU3 59 +#define M_BCM1480_SYS_DISABLECPU3 _SB_MAKEMASK1(S_BCM1480_SYS_DISABLECPU3) +#define M_BCM1480_SYS_SB_SOFTRES _SB_MAKEMASK1(60) +#define M_BCM1480_SYS_EXT_RESET _SB_MAKEMASK1(61) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_SYS_SYSTEM_RESET _SB_MAKEMASK1(62) +#define M_BCM1480_SYS_SW_FLAG _SB_MAKEMASK1(63) +#define M_BCM1480_SCD_WDOG_ENABLE _SB_MAKEMASK1(0) +#define S_BCM1480_SCD_WDOG_RESET_TYPE 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(5, S_BCM1480_SCD_WDOG_RESET_TYPE) +#define V_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_MAKEVALUE(x, S_BCM1480_SCD_WDOG_RESET_TYPE) +#define G_BCM1480_SCD_WDOG_RESET_TYPE(x) _SB_GETVALUE(x, S_BCM1480_SCD_WDOG_RESET_TYPE, M_BCM1480_SCD_WDOG_RESET_TYPE) +#define K_BCM1480_SCD_WDOG_RESET_FULL 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_SCD_WDOG_RESET_SOFT 1 +#define K_BCM1480_SCD_WDOG_RESET_CPU0 3 +#define K_BCM1480_SCD_WDOG_RESET_CPU1 5 +#define K_BCM1480_SCD_WDOG_RESET_CPU2 9 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_SCD_WDOG_RESET_CPU3 17 +#define K_BCM1480_SCD_WDOG_RESET_ALL_CPUS 31 +#define M_BCM1480_SCD_WDOG_HAS_RESET _SB_MAKEMASK1(8) +#define S_SPC_CFG_SRC4 32 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SPC_CFG_SRC4 _SB_MAKEMASK(8, S_SPC_CFG_SRC4) +#define V_SPC_CFG_SRC4(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC4) +#define G_SPC_CFG_SRC4(x) _SB_GETVALUE(x, S_SPC_CFG_SRC4, M_SPC_CFG_SRC4) +#define S_SPC_CFG_SRC5 40 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SPC_CFG_SRC5 _SB_MAKEMASK(8, S_SPC_CFG_SRC5) +#define V_SPC_CFG_SRC5(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC5) +#define G_SPC_CFG_SRC5(x) _SB_GETVALUE(x, S_SPC_CFG_SRC5, M_SPC_CFG_SRC5) +#define S_SPC_CFG_SRC6 48 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SPC_CFG_SRC6 _SB_MAKEMASK(8, S_SPC_CFG_SRC6) +#define V_SPC_CFG_SRC6(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC6) +#define G_SPC_CFG_SRC6(x) _SB_GETVALUE(x, S_SPC_CFG_SRC6, M_SPC_CFG_SRC6) +#define S_SPC_CFG_SRC7 56 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SPC_CFG_SRC7 _SB_MAKEMASK(8, S_SPC_CFG_SRC7) +#define V_SPC_CFG_SRC7(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC7) +#define G_SPC_CFG_SRC7(x) _SB_GETVALUE(x, S_SPC_CFG_SRC7, M_SPC_CFG_SRC7) +#define M_BCM1480_SPC_CFG_CLEAR _SB_MAKEMASK1(0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_SPC_CFG_ENABLE _SB_MAKEMASK1(1) +#if ??? +#define M_SPC_CFG_CLEAR M_BCM1480_SPC_CFG_CLEAR +#define M_SPC_CFG_ENABLE M_BCM1480_SPC_CFG_ENABLE +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define S_BCM1480_SPC_CNT_COUNT 0 +#define M_BCM1480_SPC_CNT_COUNT _SB_MAKEMASK(40, S_BCM1480_SPC_CNT_COUNT) +#define V_BCM1480_SPC_CNT_COUNT(x) _SB_MAKEVALUE(x, S_BCM1480_SPC_CNT_COUNT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_BCM1480_SPC_CNT_COUNT(x) _SB_GETVALUE(x, S_BCM1480_SPC_CNT_COUNT, M_BCM1480_SPC_CNT_COUNT) +#define M_BCM1480_SPC_CNT_OFLOW _SB_MAKEMASK1(40) +#define M_BCM1480_ATRAP_INDEX _SB_MAKEMASK(4, 0) +#define M_BCM1480_ATRAP_ADDRESS _SB_MAKEMASK(40, 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_BCM1480_ATRAP_CFG_CNT 0 +#define M_BCM1480_ATRAP_CFG_CNT _SB_MAKEMASK(3, S_BCM1480_ATRAP_CFG_CNT) +#define V_BCM1480_ATRAP_CFG_CNT(x) _SB_MAKEVALUE(x, S_BCM1480_ATRAP_CFG_CNT) +#define G_BCM1480_ATRAP_CFG_CNT(x) _SB_GETVALUE(x, S_BCM1480_ATRAP_CFG_CNT, M_BCM1480_ATRAP_CFG_CNT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_ATRAP_CFG_WRITE _SB_MAKEMASK1(3) +#define M_BCM1480_ATRAP_CFG_ALL _SB_MAKEMASK1(4) +#define M_BCM1480_ATRAP_CFG_INV _SB_MAKEMASK1(5) +#define M_BCM1480_ATRAP_CFG_USESRC _SB_MAKEMASK1(6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_ATRAP_CFG_SRCINV _SB_MAKEMASK1(7) +#define S_BCM1480_ATRAP_CFG_AGENTID 8 +#define M_BCM1480_ATRAP_CFG_AGENTID _SB_MAKEMASK(4, S_BCM1480_ATRAP_CFG_AGENTID) +#define V_BCM1480_ATRAP_CFG_AGENTID(x) _SB_MAKEVALUE(x, S_BCM1480_ATRAP_CFG_AGENTID) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_BCM1480_ATRAP_CFG_AGENTID(x) _SB_GETVALUE(x, S_BCM1480_ATRAP_CFG_AGENTID, M_BCM1480_ATRAP_CFG_AGENTID) +#define K_BCM1480_BUS_AGENT_CPU0 0 +#define K_BCM1480_BUS_AGENT_CPU1 1 +#define K_BCM1480_BUS_AGENT_NC 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_BUS_AGENT_IOB 3 +#define K_BCM1480_BUS_AGENT_SCD 4 +#define K_BCM1480_BUS_AGENT_L2C 6 +#define K_BCM1480_BUS_AGENT_MC 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_BUS_AGENT_CPU2 8 +#define K_BCM1480_BUS_AGENT_CPU3 9 +#define K_BCM1480_BUS_AGENT_PM 10 +#define S_BCM1480_ATRAP_CFG_CATTR 12 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_ATRAP_CFG_CATTR _SB_MAKEMASK(2, S_BCM1480_ATRAP_CFG_CATTR) +#define V_BCM1480_ATRAP_CFG_CATTR(x) _SB_MAKEVALUE(x, S_BCM1480_ATRAP_CFG_CATTR) +#define G_BCM1480_ATRAP_CFG_CATTR(x) _SB_GETVALUE(x, S_BCM1480_ATRAP_CFG_CATTR, M_BCM1480_ATRAP_CFG_CATTR) +#define K_BCM1480_ATRAP_CFG_CATTR_IGNORE 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BCM1480_ATRAP_CFG_CATTR_UNC 1 +#define K_BCM1480_ATRAP_CFG_CATTR_NONCOH 2 +#define K_BCM1480_ATRAP_CFG_CATTR_COHERENT 3 +#define M_BCM1480_ATRAP_CFG_CATTRINV _SB_MAKEMASK1(14) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_BCM1480_SCD_TRSEQ_TID_MATCH_EN _SB_MAKEMASK1(25) +#define S_BCM1480_SCD_TRSEQ_SWFUNC 26 +#define M_BCM1480_SCD_TRSEQ_SWFUNC _SB_MAKEMASK(2, S_BCM1480_SCD_TRSEQ_SWFUNC) +#define V_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_MAKEVALUE(x, S_BCM1480_SCD_TRSEQ_SWFUNC) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_BCM1480_SCD_TRSEQ_SWFUNC(x) _SB_GETVALUE(x, S_BCM1480_SCD_TRSEQ_SWFUNC, M_BCM1480_SCD_TRSEQ_SWFUNC) +#define S_BCM1480_SCD_TRACE_CFG_MODE 16 +#define M_BCM1480_SCD_TRACE_CFG_MODE _SB_MAKEMASK(2, S_BCM1480_SCD_TRACE_CFG_MODE) +#define V_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_MAKEVALUE(x, S_BCM1480_SCD_TRACE_CFG_MODE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_BCM1480_SCD_TRACE_CFG_MODE(x) _SB_GETVALUE(x, S_BCM1480_SCD_TRACE_CFG_MODE, M_BCM1480_SCD_TRACE_CFG_MODE) +#define K_BCM1480_SCD_TRACE_CFG_MODE_BLOCKERS 0 +#define K_BCM1480_SCD_TRACE_CFG_MODE_BYTEEN_INT 1 +#define K_BCM1480_SCD_TRACE_CFG_MODE_FLOW_ID 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/sb1250.h b/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/sb1250.h new file mode 100644 index 0000000..d2738dd --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/sb1250.h @@ -0,0 +1,36 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SIBYTE_SB1250_H +#define _ASM_SIBYTE_SB1250_H +#define SIBYTE_RELEASE 0x02111403 +#define SB1250_NR_IRQS 64 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BCM1480_NR_IRQS 128 +#define BCM1480_NR_IRQS_HALF 64 +#define SB1250_DUART_MINOR_BASE 64 +#ifndef __ASSEMBLY__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/addrspace.h> +#include <asm/sibyte/sb1250_scd.h> +#include <asm/sibyte/bcm1480_scd.h> +#define AT_spin __asm__ __volatile__ ( ".set noat\n" "li $at, 0\n" "1: beqz $at, 1b\n" ".set at\n" ) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define IOADDR(a) ((void __iomem *)(IO_BASE + (a))) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/sb1250_int.h b/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/sb1250_int.h new file mode 100644 index 0000000..0b01b75 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/sb1250_int.h @@ -0,0 +1,238 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _SB1250_INT_H +#define _SB1250_INT_H +#include "sb1250_defs.h" +#define K_INT_SOURCES 64 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_WATCHDOG_TIMER_0 0 +#define K_INT_WATCHDOG_TIMER_1 1 +#define K_INT_TIMER_0 2 +#define K_INT_TIMER_1 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_TIMER_2 4 +#define K_INT_TIMER_3 5 +#define K_INT_SMB_0 6 +#define K_INT_SMB_1 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_UART_0 8 +#define K_INT_UART_1 9 +#define K_INT_SER_0 10 +#define K_INT_SER_1 11 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_PCMCIA 12 +#define K_INT_ADDR_TRAP 13 +#define K_INT_PERF_CNT 14 +#define K_INT_TRACE_FREEZE 15 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_BAD_ECC 16 +#define K_INT_COR_ECC 17 +#define K_INT_IO_BUS 18 +#define K_INT_MAC_0 19 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_MAC_1 20 +#define K_INT_MAC_2 21 +#define K_INT_DM_CH_0 22 +#define K_INT_DM_CH_1 23 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_DM_CH_2 24 +#define K_INT_DM_CH_3 25 +#define K_INT_MBOX_0 26 +#define K_INT_MBOX_1 27 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_MBOX_2 28 +#define K_INT_MBOX_3 29 +#if ??? || ??? +#define K_INT_CYCLE_CP0_INT 30 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_CYCLE_CP1_INT 31 +#endif +#define K_INT_GPIO_0 32 +#define K_INT_GPIO_1 33 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_GPIO_2 34 +#define K_INT_GPIO_3 35 +#define K_INT_GPIO_4 36 +#define K_INT_GPIO_5 37 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_GPIO_6 38 +#define K_INT_GPIO_7 39 +#define K_INT_GPIO_8 40 +#define K_INT_GPIO_9 41 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_GPIO_10 42 +#define K_INT_GPIO_11 43 +#define K_INT_GPIO_12 44 +#define K_INT_GPIO_13 45 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_GPIO_14 46 +#define K_INT_GPIO_15 47 +#define K_INT_LDT_FATAL 48 +#define K_INT_LDT_NONFATAL 49 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_LDT_SMI 50 +#define K_INT_LDT_NMI 51 +#define K_INT_LDT_INIT 52 +#define K_INT_LDT_STARTUP 53 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_LDT_EXT 54 +#define K_INT_PCI_ERROR 55 +#define K_INT_PCI_INTA 56 +#define K_INT_PCI_INTB 57 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_PCI_INTC 58 +#define K_INT_PCI_INTD 59 +#define K_INT_SPARE_2 60 +#if ??? || ??? +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_MAC_0_CH1 61 +#define K_INT_MAC_1_CH1 62 +#define K_INT_MAC_2_CH1 63 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_WATCHDOG_TIMER_0 _SB_MAKEMASK1(K_INT_WATCHDOG_TIMER_0) +#define M_INT_WATCHDOG_TIMER_1 _SB_MAKEMASK1(K_INT_WATCHDOG_TIMER_1) +#define M_INT_TIMER_0 _SB_MAKEMASK1(K_INT_TIMER_0) +#define M_INT_TIMER_1 _SB_MAKEMASK1(K_INT_TIMER_1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_TIMER_2 _SB_MAKEMASK1(K_INT_TIMER_2) +#define M_INT_TIMER_3 _SB_MAKEMASK1(K_INT_TIMER_3) +#define M_INT_SMB_0 _SB_MAKEMASK1(K_INT_SMB_0) +#define M_INT_SMB_1 _SB_MAKEMASK1(K_INT_SMB_1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_UART_0 _SB_MAKEMASK1(K_INT_UART_0) +#define M_INT_UART_1 _SB_MAKEMASK1(K_INT_UART_1) +#define M_INT_SER_0 _SB_MAKEMASK1(K_INT_SER_0) +#define M_INT_SER_1 _SB_MAKEMASK1(K_INT_SER_1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_PCMCIA _SB_MAKEMASK1(K_INT_PCMCIA) +#define M_INT_ADDR_TRAP _SB_MAKEMASK1(K_INT_ADDR_TRAP) +#define M_INT_PERF_CNT _SB_MAKEMASK1(K_INT_PERF_CNT) +#define M_INT_TRACE_FREEZE _SB_MAKEMASK1(K_INT_TRACE_FREEZE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_BAD_ECC _SB_MAKEMASK1(K_INT_BAD_ECC) +#define M_INT_COR_ECC _SB_MAKEMASK1(K_INT_COR_ECC) +#define M_INT_IO_BUS _SB_MAKEMASK1(K_INT_IO_BUS) +#define M_INT_MAC_0 _SB_MAKEMASK1(K_INT_MAC_0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_MAC_1 _SB_MAKEMASK1(K_INT_MAC_1) +#define M_INT_MAC_2 _SB_MAKEMASK1(K_INT_MAC_2) +#define M_INT_DM_CH_0 _SB_MAKEMASK1(K_INT_DM_CH_0) +#define M_INT_DM_CH_1 _SB_MAKEMASK1(K_INT_DM_CH_1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_DM_CH_2 _SB_MAKEMASK1(K_INT_DM_CH_2) +#define M_INT_DM_CH_3 _SB_MAKEMASK1(K_INT_DM_CH_3) +#define M_INT_MBOX_0 _SB_MAKEMASK1(K_INT_MBOX_0) +#define M_INT_MBOX_1 _SB_MAKEMASK1(K_INT_MBOX_1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_MBOX_2 _SB_MAKEMASK1(K_INT_MBOX_2) +#define M_INT_MBOX_3 _SB_MAKEMASK1(K_INT_MBOX_3) +#define M_INT_MBOX_ALL _SB_MAKEMASK(4, K_INT_MBOX_0) +#if ??? || ??? +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_CYCLE_CP0_INT _SB_MAKEMASK1(K_INT_CYCLE_CP0_INT) +#define M_INT_CYCLE_CP1_INT _SB_MAKEMASK1(K_INT_CYCLE_CP1_INT) +#endif +#define M_INT_GPIO_0 _SB_MAKEMASK1(K_INT_GPIO_0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_GPIO_1 _SB_MAKEMASK1(K_INT_GPIO_1) +#define M_INT_GPIO_2 _SB_MAKEMASK1(K_INT_GPIO_2) +#define M_INT_GPIO_3 _SB_MAKEMASK1(K_INT_GPIO_3) +#define M_INT_GPIO_4 _SB_MAKEMASK1(K_INT_GPIO_4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_GPIO_5 _SB_MAKEMASK1(K_INT_GPIO_5) +#define M_INT_GPIO_6 _SB_MAKEMASK1(K_INT_GPIO_6) +#define M_INT_GPIO_7 _SB_MAKEMASK1(K_INT_GPIO_7) +#define M_INT_GPIO_8 _SB_MAKEMASK1(K_INT_GPIO_8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_GPIO_9 _SB_MAKEMASK1(K_INT_GPIO_9) +#define M_INT_GPIO_10 _SB_MAKEMASK1(K_INT_GPIO_10) +#define M_INT_GPIO_11 _SB_MAKEMASK1(K_INT_GPIO_11) +#define M_INT_GPIO_12 _SB_MAKEMASK1(K_INT_GPIO_12) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_GPIO_13 _SB_MAKEMASK1(K_INT_GPIO_13) +#define M_INT_GPIO_14 _SB_MAKEMASK1(K_INT_GPIO_14) +#define M_INT_GPIO_15 _SB_MAKEMASK1(K_INT_GPIO_15) +#define M_INT_LDT_FATAL _SB_MAKEMASK1(K_INT_LDT_FATAL) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_LDT_NONFATAL _SB_MAKEMASK1(K_INT_LDT_NONFATAL) +#define M_INT_LDT_SMI _SB_MAKEMASK1(K_INT_LDT_SMI) +#define M_INT_LDT_NMI _SB_MAKEMASK1(K_INT_LDT_NMI) +#define M_INT_LDT_INIT _SB_MAKEMASK1(K_INT_LDT_INIT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_LDT_STARTUP _SB_MAKEMASK1(K_INT_LDT_STARTUP) +#define M_INT_LDT_EXT _SB_MAKEMASK1(K_INT_LDT_EXT) +#define M_INT_PCI_ERROR _SB_MAKEMASK1(K_INT_PCI_ERROR) +#define M_INT_PCI_INTA _SB_MAKEMASK1(K_INT_PCI_INTA) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_PCI_INTB _SB_MAKEMASK1(K_INT_PCI_INTB) +#define M_INT_PCI_INTC _SB_MAKEMASK1(K_INT_PCI_INTC) +#define M_INT_PCI_INTD _SB_MAKEMASK1(K_INT_PCI_INTD) +#define M_INT_SPARE_2 _SB_MAKEMASK1(K_INT_SPARE_2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if ??? || ??? +#define M_INT_MAC_0_CH1 _SB_MAKEMASK1(K_INT_MAC_0_CH1) +#define M_INT_MAC_1_CH1 _SB_MAKEMASK1(K_INT_MAC_1_CH1) +#define M_INT_MAC_2_CH1 _SB_MAKEMASK1(K_INT_MAC_2_CH1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define K_INT_MAP_I0 0 +#define K_INT_MAP_I1 1 +#define K_INT_MAP_I2 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_MAP_I3 3 +#define K_INT_MAP_I4 4 +#define K_INT_MAP_I5 5 +#define K_INT_MAP_NMI 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_MAP_DINT 7 +#define S_INT_LDT_INTMSG 0 +#define M_INT_LDT_INTMSG _SB_MAKEMASK(3, S_INT_LDT_INTMSG) +#define V_INT_LDT_INTMSG(x) _SB_MAKEVALUE(x, S_INT_LDT_INTMSG) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_INT_LDT_INTMSG(x) _SB_GETVALUE(x, S_INT_LDT_INTMSG, M_INT_LDT_INTMSG) +#define K_INT_LDT_INTMSG_FIXED 0 +#define K_INT_LDT_INTMSG_ARBITRATED 1 +#define K_INT_LDT_INTMSG_SMI 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_LDT_INTMSG_NMI 3 +#define K_INT_LDT_INTMSG_INIT 4 +#define K_INT_LDT_INTMSG_STARTUP 5 +#define K_INT_LDT_INTMSG_EXTINT 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_INT_LDT_INTMSG_RESERVED 7 +#define M_INT_LDT_EDGETRIGGER 0 +#define M_INT_LDT_LEVELTRIGGER _SB_MAKEMASK1(3) +#define M_INT_LDT_PHYSICALDEST 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_INT_LDT_LOGICALDEST _SB_MAKEMASK1(4) +#define S_INT_LDT_INTDEST 5 +#define M_INT_LDT_INTDEST _SB_MAKEMASK(10, S_INT_LDT_INTDEST) +#define V_INT_LDT_INTDEST(x) _SB_MAKEVALUE(x, S_INT_LDT_INTDEST) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_INT_LDT_INTDEST(x) _SB_GETVALUE(x, S_INT_LDT_INTDEST, M_INT_LDT_INTDEST) +#define S_INT_LDT_VECTOR 13 +#define M_INT_LDT_VECTOR _SB_MAKEMASK(8, S_INT_LDT_VECTOR) +#define V_INT_LDT_VECTOR(x) _SB_MAKEVALUE(x, S_INT_LDT_VECTOR) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_INT_LDT_VECTOR(x) _SB_GETVALUE(x, S_INT_LDT_VECTOR, M_INT_LDT_VECTOR) +#define M_LDTVECT_RAISEINT 0x00 +#define M_LDTVECT_RAISEMBOX 0x40 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/sb1250_scd.h b/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/sb1250_scd.h new file mode 100644 index 0000000..55e4a5a --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sibyte/sb1250_scd.h @@ -0,0 +1,539 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _SB1250_SCD_H +#define _SB1250_SCD_H +#include "sb1250_defs.h" +#define M_SYS_RESERVED _SB_MAKEMASK(8, 0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SYS_REVISION _SB_MAKE64(8) +#define M_SYS_REVISION _SB_MAKEMASK(8, S_SYS_REVISION) +#define V_SYS_REVISION(x) _SB_MAKEVALUE(x, S_SYS_REVISION) +#define G_SYS_REVISION(x) _SB_GETVALUE(x, S_SYS_REVISION, M_SYS_REVISION) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_REVISION_BCM1250_PASS1 0x01 +#define K_SYS_REVISION_BCM1250_PASS2 0x03 +#define K_SYS_REVISION_BCM1250_A1 0x03 +#define K_SYS_REVISION_BCM1250_A2 0x04 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_REVISION_BCM1250_A3 0x05 +#define K_SYS_REVISION_BCM1250_A4 0x06 +#define K_SYS_REVISION_BCM1250_A6 0x07 +#define K_SYS_REVISION_BCM1250_A8 0x0b +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_REVISION_BCM1250_A9 0x08 +#define K_SYS_REVISION_BCM1250_A10 K_SYS_REVISION_BCM1250_A8 +#define K_SYS_REVISION_BCM1250_PASS2_2 0x10 +#define K_SYS_REVISION_BCM1250_B0 K_SYS_REVISION_BCM1250_B1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_REVISION_BCM1250_B1 0x10 +#define K_SYS_REVISION_BCM1250_B2 0x11 +#define K_SYS_REVISION_BCM1250_C0 0x20 +#define K_SYS_REVISION_BCM1250_C1 0x21 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_REVISION_BCM1250_C2 0x22 +#define K_SYS_REVISION_BCM1250_C3 0x23 +#if ??? +#define K_SYS_REVISION_PASS1 K_SYS_REVISION_BCM1250_PASS1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_REVISION_PASS2 K_SYS_REVISION_BCM1250_PASS2 +#define K_SYS_REVISION_PASS2_2 K_SYS_REVISION_BCM1250_PASS2_2 +#define K_SYS_REVISION_PASS3 K_SYS_REVISION_BCM1250_PASS3 +#define K_SYS_REVISION_BCM1250_PASS3 K_SYS_REVISION_BCM1250_C0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define K_SYS_REVISION_BCM112x_A1 0x20 +#define K_SYS_REVISION_BCM112x_A2 0x21 +#define K_SYS_REVISION_BCM112x_A3 0x22 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_REVISION_BCM112x_A4 0x23 +#define K_SYS_REVISION_BCM112x_B0 0x30 +#define K_SYS_REVISION_BCM1480_S0 0x01 +#define K_SYS_REVISION_BCM1480_A1 0x02 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_REVISION_BCM1480_A2 0x03 +#define K_SYS_REVISION_BCM1480_A3 0x04 +#define K_SYS_REVISION_BCM1480_B0 0x11 +#define S_SYS_L2C_SIZE _SB_MAKE64(20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SYS_L2C_SIZE _SB_MAKEMASK(4, S_SYS_L2C_SIZE) +#define V_SYS_L2C_SIZE(x) _SB_MAKEVALUE(x, S_SYS_L2C_SIZE) +#define G_SYS_L2C_SIZE(x) _SB_GETVALUE(x, S_SYS_L2C_SIZE, M_SYS_L2C_SIZE) +#define K_SYS_L2C_SIZE_1MB 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_L2C_SIZE_512KB 5 +#define K_SYS_L2C_SIZE_256KB 2 +#define K_SYS_L2C_SIZE_128KB 1 +#define K_SYS_L2C_SIZE_BCM1250 K_SYS_L2C_SIZE_512KB +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_L2C_SIZE_BCM1125 K_SYS_L2C_SIZE_256KB +#define K_SYS_L2C_SIZE_BCM1122 K_SYS_L2C_SIZE_128KB +#define S_SYS_NUM_CPUS _SB_MAKE64(24) +#define M_SYS_NUM_CPUS _SB_MAKEMASK(4, S_SYS_NUM_CPUS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define V_SYS_NUM_CPUS(x) _SB_MAKEVALUE(x, S_SYS_NUM_CPUS) +#define G_SYS_NUM_CPUS(x) _SB_GETVALUE(x, S_SYS_NUM_CPUS, M_SYS_NUM_CPUS) +#define S_SYS_PART _SB_MAKE64(16) +#define M_SYS_PART _SB_MAKEMASK(16, S_SYS_PART) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define V_SYS_PART(x) _SB_MAKEVALUE(x, S_SYS_PART) +#define G_SYS_PART(x) _SB_GETVALUE(x, S_SYS_PART, M_SYS_PART) +#define K_SYS_PART_SB1250 0x1250 +#define K_SYS_PART_BCM1120 0x1121 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_PART_BCM1125 0x1123 +#define K_SYS_PART_BCM1125H 0x1124 +#define K_SYS_PART_BCM1122 0x1113 +#define S_SYS_SOC_TYPE _SB_MAKE64(16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SYS_SOC_TYPE _SB_MAKEMASK(4, S_SYS_SOC_TYPE) +#define V_SYS_SOC_TYPE(x) _SB_MAKEVALUE(x, S_SYS_SOC_TYPE) +#define G_SYS_SOC_TYPE(x) _SB_GETVALUE(x, S_SYS_SOC_TYPE, M_SYS_SOC_TYPE) +#define K_SYS_SOC_TYPE_BCM1250 0x0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_SOC_TYPE_BCM1120 0x1 +#define K_SYS_SOC_TYPE_BCM1250_ALT 0x2 +#define K_SYS_SOC_TYPE_BCM1125 0x3 +#define K_SYS_SOC_TYPE_BCM1125H 0x4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_SOC_TYPE_BCM1250_ALT2 0x5 +#define K_SYS_SOC_TYPE_BCM1x80 0x6 +#define K_SYS_SOC_TYPE_BCM1x55 0x7 +#ifdef __ASSEMBLER__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYS_SOC_TYPE(dest, sysrev) .set push ; .set reorder ; dsrl dest, sysrev, S_SYS_SOC_TYPE ; andi dest, dest, (M_SYS_SOC_TYPE >> S_SYS_SOC_TYPE); beq dest, K_SYS_SOC_TYPE_BCM1250_ALT, 991f ; beq dest, K_SYS_SOC_TYPE_BCM1250_ALT2, 991f ; b 992f ; 991: li dest, K_SYS_SOC_TYPE_BCM1250 ; 992: .set pop +#else +#define SYS_SOC_TYPE(sysrev) ((G_SYS_SOC_TYPE(sysrev) == K_SYS_SOC_TYPE_BCM1250_ALT || G_SYS_SOC_TYPE(sysrev) == K_SYS_SOC_TYPE_BCM1250_ALT2) ? K_SYS_SOC_TYPE_BCM1250 : G_SYS_SOC_TYPE(sysrev)) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SYS_WID _SB_MAKE64(32) +#define M_SYS_WID _SB_MAKEMASK(32, S_SYS_WID) +#define V_SYS_WID(x) _SB_MAKEVALUE(x, S_SYS_WID) +#define G_SYS_WID(x) _SB_GETVALUE(x, S_SYS_WID, M_SYS_WID) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if SIBYTE_HDR_FEATURE_1250_112x +#define S_SYS_WAFERID1_200 _SB_MAKE64(0) +#define M_SYS_WAFERID1_200 _SB_MAKEMASK(32, S_SYS_WAFERID1_200) +#define V_SYS_WAFERID1_200(x) _SB_MAKEVALUE(x, S_SYS_WAFERID1_200) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_SYS_WAFERID1_200(x) _SB_GETVALUE(x, S_SYS_WAFERID1_200, M_SYS_WAFERID1_200) +#define S_SYS_BIN _SB_MAKE64(32) +#define M_SYS_BIN _SB_MAKEMASK(4, S_SYS_BIN) +#define V_SYS_BIN(x) _SB_MAKEVALUE(x, S_SYS_BIN) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_SYS_BIN(x) _SB_GETVALUE(x, S_SYS_BIN, M_SYS_BIN) +#define S_SYS_WAFERID2_200 _SB_MAKE64(36) +#define M_SYS_WAFERID2_200 _SB_MAKEMASK(4, S_SYS_WAFERID2_200) +#define V_SYS_WAFERID2_200(x) _SB_MAKEVALUE(x, S_SYS_WAFERID2_200) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_SYS_WAFERID2_200(x) _SB_GETVALUE(x, S_SYS_WAFERID2_200, M_SYS_WAFERID2_200) +#define S_SYS_WAFERID_300 _SB_MAKE64(0) +#define M_SYS_WAFERID_300 _SB_MAKEMASK(40, S_SYS_WAFERID_300) +#define V_SYS_WAFERID_300(x) _SB_MAKEVALUE(x, S_SYS_WAFERID_300) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_SYS_WAFERID_300(x) _SB_GETVALUE(x, S_SYS_WAFERID_300, M_SYS_WAFERID_300) +#define S_SYS_XPOS _SB_MAKE64(40) +#define M_SYS_XPOS _SB_MAKEMASK(6, S_SYS_XPOS) +#define V_SYS_XPOS(x) _SB_MAKEVALUE(x, S_SYS_XPOS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_SYS_XPOS(x) _SB_GETVALUE(x, S_SYS_XPOS, M_SYS_XPOS) +#define S_SYS_YPOS _SB_MAKE64(46) +#define M_SYS_YPOS _SB_MAKEMASK(6, S_SYS_YPOS) +#define V_SYS_YPOS(x) _SB_MAKEVALUE(x, S_SYS_YPOS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_SYS_YPOS(x) _SB_GETVALUE(x, S_SYS_YPOS, M_SYS_YPOS) +#endif +#if SIBYTE_HDR_FEATURE_1250_112x +#define M_SYS_LDT_PLL_BYP _SB_MAKEMASK1(3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SYS_PCI_SYNC_TEST_MODE _SB_MAKEMASK1(4) +#define M_SYS_IOB0_DIV _SB_MAKEMASK1(5) +#define M_SYS_IOB1_DIV _SB_MAKEMASK1(6) +#define S_SYS_PLL_DIV _SB_MAKE64(7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SYS_PLL_DIV _SB_MAKEMASK(5, S_SYS_PLL_DIV) +#define V_SYS_PLL_DIV(x) _SB_MAKEVALUE(x, S_SYS_PLL_DIV) +#define G_SYS_PLL_DIV(x) _SB_GETVALUE(x, S_SYS_PLL_DIV, M_SYS_PLL_DIV) +#define M_SYS_SER0_ENABLE _SB_MAKEMASK1(12) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SYS_SER0_RSTB_EN _SB_MAKEMASK1(13) +#define M_SYS_SER1_ENABLE _SB_MAKEMASK1(14) +#define M_SYS_SER1_RSTB_EN _SB_MAKEMASK1(15) +#define M_SYS_PCMCIA_ENABLE _SB_MAKEMASK1(16) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SYS_BOOT_MODE _SB_MAKE64(17) +#define M_SYS_BOOT_MODE _SB_MAKEMASK(2, S_SYS_BOOT_MODE) +#define V_SYS_BOOT_MODE(x) _SB_MAKEVALUE(x, S_SYS_BOOT_MODE) +#define G_SYS_BOOT_MODE(x) _SB_GETVALUE(x, S_SYS_BOOT_MODE, M_SYS_BOOT_MODE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SYS_BOOT_MODE_ROM32 0 +#define K_SYS_BOOT_MODE_ROM8 1 +#define K_SYS_BOOT_MODE_SMBUS_SMALL 2 +#define K_SYS_BOOT_MODE_SMBUS_BIG 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SYS_PCI_HOST _SB_MAKEMASK1(19) +#define M_SYS_PCI_ARBITER _SB_MAKEMASK1(20) +#define M_SYS_SOUTH_ON_LDT _SB_MAKEMASK1(21) +#define M_SYS_BIG_ENDIAN _SB_MAKEMASK1(22) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SYS_GENCLK_EN _SB_MAKEMASK1(23) +#define M_SYS_LDT_TEST_EN _SB_MAKEMASK1(24) +#define M_SYS_GEN_PARITY_EN _SB_MAKEMASK1(25) +#define S_SYS_CONFIG 26 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SYS_CONFIG _SB_MAKEMASK(6, S_SYS_CONFIG) +#define V_SYS_CONFIG(x) _SB_MAKEVALUE(x, S_SYS_CONFIG) +#define G_SYS_CONFIG(x) _SB_GETVALUE(x, S_SYS_CONFIG, M_SYS_CONFIG) +#define M_SYS_CLKSTOP _SB_MAKEMASK1(32) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SYS_CLKSTEP _SB_MAKEMASK1(33) +#define S_SYS_CLKCOUNT 34 +#define M_SYS_CLKCOUNT _SB_MAKEMASK(8, S_SYS_CLKCOUNT) +#define V_SYS_CLKCOUNT(x) _SB_MAKEVALUE(x, S_SYS_CLKCOUNT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_SYS_CLKCOUNT(x) _SB_GETVALUE(x, S_SYS_CLKCOUNT, M_SYS_CLKCOUNT) +#define M_SYS_PLL_BYPASS _SB_MAKEMASK1(42) +#define S_SYS_PLL_IREF 43 +#define M_SYS_PLL_IREF _SB_MAKEMASK(2, S_SYS_PLL_IREF) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SYS_PLL_VCO 45 +#define M_SYS_PLL_VCO _SB_MAKEMASK(2, S_SYS_PLL_VCO) +#define S_SYS_PLL_VREG 47 +#define M_SYS_PLL_VREG _SB_MAKEMASK(2, S_SYS_PLL_VREG) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SYS_MEM_RESET _SB_MAKEMASK1(49) +#define M_SYS_L2C_RESET _SB_MAKEMASK1(50) +#define M_SYS_IO_RESET_0 _SB_MAKEMASK1(51) +#define M_SYS_IO_RESET_1 _SB_MAKEMASK1(52) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SYS_SCD_RESET _SB_MAKEMASK1(53) +#define M_SYS_CPU_RESET_0 _SB_MAKEMASK1(54) +#define M_SYS_CPU_RESET_1 _SB_MAKEMASK1(55) +#define M_SYS_UNICPU0 _SB_MAKEMASK1(56) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SYS_UNICPU1 _SB_MAKEMASK1(57) +#define M_SYS_SB_SOFTRES _SB_MAKEMASK1(58) +#define M_SYS_EXT_RESET _SB_MAKEMASK1(59) +#define M_SYS_SYSTEM_RESET _SB_MAKEMASK1(60) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SYS_MISR_MODE _SB_MAKEMASK1(61) +#define M_SYS_MISR_RESET _SB_MAKEMASK1(62) +#if ??? || ??? +#define M_SYS_SW_FLAG _SB_MAKEMASK1(63) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#endif +#define S_MBOX_INT_3 0 +#define M_MBOX_INT_3 _SB_MAKEMASK(16, S_MBOX_INT_3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_MBOX_INT_2 16 +#define M_MBOX_INT_2 _SB_MAKEMASK(16, S_MBOX_INT_2) +#define S_MBOX_INT_1 32 +#define M_MBOX_INT_1 _SB_MAKEMASK(16, S_MBOX_INT_1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_MBOX_INT_0 48 +#define M_MBOX_INT_0 _SB_MAKEMASK(16, S_MBOX_INT_0) +#define V_SCD_WDOG_FREQ 1000000 +#define S_SCD_WDOG_INIT 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SCD_WDOG_INIT _SB_MAKEMASK(23, S_SCD_WDOG_INIT) +#define S_SCD_WDOG_CNT 0 +#define M_SCD_WDOG_CNT _SB_MAKEMASK(23, S_SCD_WDOG_CNT) +#define S_SCD_WDOG_ENABLE 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SCD_WDOG_ENABLE _SB_MAKEMASK1(S_SCD_WDOG_ENABLE) +#define S_SCD_WDOG_RESET_TYPE 2 +#define M_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(3, S_SCD_WDOG_RESET_TYPE) +#define V_SCD_WDOG_RESET_TYPE(x) _SB_MAKEVALUE(x, S_SCD_WDOG_RESET_TYPE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_SCD_WDOG_RESET_TYPE(x) _SB_GETVALUE(x, S_SCD_WDOG_RESET_TYPE, M_SCD_WDOG_RESET_TYPE) +#define K_SCD_WDOG_RESET_FULL 0 +#define K_SCD_WDOG_RESET_SOFT 1 +#define K_SCD_WDOG_RESET_CPU0 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SCD_WDOG_RESET_CPU1 5 +#define K_SCD_WDOG_RESET_BOTH_CPUS 7 +#if ??? +#define S_SCD_WDOG_HAS_RESET 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SCD_WDOG_HAS_RESET _SB_MAKEMASK1(S_SCD_WDOG_HAS_RESET) +#endif +#define V_SCD_TIMER_FREQ 1000000 +#define S_SCD_TIMER_INIT 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SCD_TIMER_INIT _SB_MAKEMASK(23, S_SCD_TIMER_INIT) +#define V_SCD_TIMER_INIT(x) _SB_MAKEVALUE(x, S_SCD_TIMER_INIT) +#define G_SCD_TIMER_INIT(x) _SB_GETVALUE(x, S_SCD_TIMER_INIT, M_SCD_TIMER_INIT) +#define V_SCD_TIMER_WIDTH 23 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_TIMER_CNT 0 +#define M_SCD_TIMER_CNT _SB_MAKEMASK(V_SCD_TIMER_WIDTH, S_SCD_TIMER_CNT) +#define V_SCD_TIMER_CNT(x) _SB_MAKEVALUE(x, S_SCD_TIMER_CNT) +#define G_SCD_TIMER_CNT(x) _SB_GETVALUE(x, S_SCD_TIMER_CNT, M_SCD_TIMER_CNT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SCD_TIMER_ENABLE _SB_MAKEMASK1(0) +#define M_SCD_TIMER_MODE _SB_MAKEMASK1(1) +#define M_SCD_TIMER_MODE_CONTINUOUS M_SCD_TIMER_MODE +#define S_SPC_CFG_SRC0 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SPC_CFG_SRC0 _SB_MAKEMASK(8, S_SPC_CFG_SRC0) +#define V_SPC_CFG_SRC0(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC0) +#define G_SPC_CFG_SRC0(x) _SB_GETVALUE(x, S_SPC_CFG_SRC0, M_SPC_CFG_SRC0) +#define S_SPC_CFG_SRC1 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SPC_CFG_SRC1 _SB_MAKEMASK(8, S_SPC_CFG_SRC1) +#define V_SPC_CFG_SRC1(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC1) +#define G_SPC_CFG_SRC1(x) _SB_GETVALUE(x, S_SPC_CFG_SRC1, M_SPC_CFG_SRC1) +#define S_SPC_CFG_SRC2 16 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SPC_CFG_SRC2 _SB_MAKEMASK(8, S_SPC_CFG_SRC2) +#define V_SPC_CFG_SRC2(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC2) +#define G_SPC_CFG_SRC2(x) _SB_GETVALUE(x, S_SPC_CFG_SRC2, M_SPC_CFG_SRC2) +#define S_SPC_CFG_SRC3 24 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SPC_CFG_SRC3 _SB_MAKEMASK(8, S_SPC_CFG_SRC3) +#define V_SPC_CFG_SRC3(x) _SB_MAKEVALUE(x, S_SPC_CFG_SRC3) +#define G_SPC_CFG_SRC3(x) _SB_GETVALUE(x, S_SPC_CFG_SRC3, M_SPC_CFG_SRC3) +#if SIBYTE_HDR_FEATURE_1250_112x +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SPC_CFG_CLEAR _SB_MAKEMASK1(32) +#define M_SPC_CFG_ENABLE _SB_MAKEMASK1(33) +#endif +#define S_SCD_BERR_TID 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SCD_BERR_TID _SB_MAKEMASK(10, S_SCD_BERR_TID) +#define V_SCD_BERR_TID(x) _SB_MAKEVALUE(x, S_SCD_BERR_TID) +#define G_SCD_BERR_TID(x) _SB_GETVALUE(x, S_SCD_BERR_TID, M_SCD_BERR_TID) +#define S_SCD_BERR_RID 18 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SCD_BERR_RID _SB_MAKEMASK(4, S_SCD_BERR_RID) +#define V_SCD_BERR_RID(x) _SB_MAKEVALUE(x, S_SCD_BERR_RID) +#define G_SCD_BERR_RID(x) _SB_GETVALUE(x, S_SCD_BERR_RID, M_SCD_BERR_RID) +#define S_SCD_BERR_DCODE 22 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SCD_BERR_DCODE _SB_MAKEMASK(3, S_SCD_BERR_DCODE) +#define V_SCD_BERR_DCODE(x) _SB_MAKEVALUE(x, S_SCD_BERR_DCODE) +#define G_SCD_BERR_DCODE(x) _SB_GETVALUE(x, S_SCD_BERR_DCODE, M_SCD_BERR_DCODE) +#define M_SCD_BERR_MULTERRS _SB_MAKEMASK1(30) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_L2ECC_CORR_D 0 +#define M_SCD_L2ECC_CORR_D _SB_MAKEMASK(8, S_SCD_L2ECC_CORR_D) +#define V_SCD_L2ECC_CORR_D(x) _SB_MAKEVALUE(x, S_SCD_L2ECC_CORR_D) +#define G_SCD_L2ECC_CORR_D(x) _SB_GETVALUE(x, S_SCD_L2ECC_CORR_D, M_SCD_L2ECC_CORR_D) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_L2ECC_BAD_D 8 +#define M_SCD_L2ECC_BAD_D _SB_MAKEMASK(8, S_SCD_L2ECC_BAD_D) +#define V_SCD_L2ECC_BAD_D(x) _SB_MAKEVALUE(x, S_SCD_L2ECC_BAD_D) +#define G_SCD_L2ECC_BAD_D(x) _SB_GETVALUE(x, S_SCD_L2ECC_BAD_D, M_SCD_L2ECC_BAD_D) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_L2ECC_CORR_T 16 +#define M_SCD_L2ECC_CORR_T _SB_MAKEMASK(8, S_SCD_L2ECC_CORR_T) +#define V_SCD_L2ECC_CORR_T(x) _SB_MAKEVALUE(x, S_SCD_L2ECC_CORR_T) +#define G_SCD_L2ECC_CORR_T(x) _SB_GETVALUE(x, S_SCD_L2ECC_CORR_T, M_SCD_L2ECC_CORR_T) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_L2ECC_BAD_T 24 +#define M_SCD_L2ECC_BAD_T _SB_MAKEMASK(8, S_SCD_L2ECC_BAD_T) +#define V_SCD_L2ECC_BAD_T(x) _SB_MAKEVALUE(x, S_SCD_L2ECC_BAD_T) +#define G_SCD_L2ECC_BAD_T(x) _SB_GETVALUE(x, S_SCD_L2ECC_BAD_T, M_SCD_L2ECC_BAD_T) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_MEM_ECC_CORR 0 +#define M_SCD_MEM_ECC_CORR _SB_MAKEMASK(8, S_SCD_MEM_ECC_CORR) +#define V_SCD_MEM_ECC_CORR(x) _SB_MAKEVALUE(x, S_SCD_MEM_ECC_CORR) +#define G_SCD_MEM_ECC_CORR(x) _SB_GETVALUE(x, S_SCD_MEM_ECC_CORR, M_SCD_MEM_ECC_CORR) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_MEM_ECC_BAD 8 +#define M_SCD_MEM_ECC_BAD _SB_MAKEMASK(8, S_SCD_MEM_ECC_BAD) +#define V_SCD_MEM_ECC_BAD(x) _SB_MAKEVALUE(x, S_SCD_MEM_ECC_BAD) +#define G_SCD_MEM_ECC_BAD(x) _SB_GETVALUE(x, S_SCD_MEM_ECC_BAD, M_SCD_MEM_ECC_BAD) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_MEM_BUSERR 16 +#define M_SCD_MEM_BUSERR _SB_MAKEMASK(8, S_SCD_MEM_BUSERR) +#define V_SCD_MEM_BUSERR(x) _SB_MAKEVALUE(x, S_SCD_MEM_BUSERR) +#define G_SCD_MEM_BUSERR(x) _SB_GETVALUE(x, S_SCD_MEM_BUSERR, M_SCD_MEM_BUSERR) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if SIBYTE_HDR_FEATURE_1250_112x +#define M_ATRAP_INDEX _SB_MAKEMASK(4, 0) +#define M_ATRAP_ADDRESS _SB_MAKEMASK(40, 0) +#define S_ATRAP_CFG_CNT 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_ATRAP_CFG_CNT _SB_MAKEMASK(3, S_ATRAP_CFG_CNT) +#define V_ATRAP_CFG_CNT(x) _SB_MAKEVALUE(x, S_ATRAP_CFG_CNT) +#define G_ATRAP_CFG_CNT(x) _SB_GETVALUE(x, S_ATRAP_CFG_CNT, M_ATRAP_CFG_CNT) +#define M_ATRAP_CFG_WRITE _SB_MAKEMASK1(3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_ATRAP_CFG_ALL _SB_MAKEMASK1(4) +#define M_ATRAP_CFG_INV _SB_MAKEMASK1(5) +#define M_ATRAP_CFG_USESRC _SB_MAKEMASK1(6) +#define M_ATRAP_CFG_SRCINV _SB_MAKEMASK1(7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_ATRAP_CFG_AGENTID 8 +#define M_ATRAP_CFG_AGENTID _SB_MAKEMASK(4, S_ATRAP_CFG_AGENTID) +#define V_ATRAP_CFG_AGENTID(x) _SB_MAKEVALUE(x, S_ATRAP_CFG_AGENTID) +#define G_ATRAP_CFG_AGENTID(x) _SB_GETVALUE(x, S_ATRAP_CFG_AGENTID, M_ATRAP_CFG_AGENTID) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BUS_AGENT_CPU0 0 +#define K_BUS_AGENT_CPU1 1 +#define K_BUS_AGENT_IOB0 2 +#define K_BUS_AGENT_IOB1 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_BUS_AGENT_SCD 4 +#define K_BUS_AGENT_L2C 6 +#define K_BUS_AGENT_MC 7 +#define S_ATRAP_CFG_CATTR 12 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_ATRAP_CFG_CATTR _SB_MAKEMASK(3, S_ATRAP_CFG_CATTR) +#define V_ATRAP_CFG_CATTR(x) _SB_MAKEVALUE(x, S_ATRAP_CFG_CATTR) +#define G_ATRAP_CFG_CATTR(x) _SB_GETVALUE(x, S_ATRAP_CFG_CATTR, M_ATRAP_CFG_CATTR) +#define K_ATRAP_CFG_CATTR_IGNORE 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_ATRAP_CFG_CATTR_UNC 1 +#define K_ATRAP_CFG_CATTR_CACHEABLE 2 +#define K_ATRAP_CFG_CATTR_NONCOH 3 +#define K_ATRAP_CFG_CATTR_COHERENT 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_ATRAP_CFG_CATTR_NOTUNC 5 +#define K_ATRAP_CFG_CATTR_NOTNONCOH 6 +#define K_ATRAP_CFG_CATTR_NOTCOHERENT 7 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SCD_TRACE_CFG_RESET _SB_MAKEMASK1(0) +#define M_SCD_TRACE_CFG_START_READ _SB_MAKEMASK1(1) +#define M_SCD_TRACE_CFG_START _SB_MAKEMASK1(2) +#define M_SCD_TRACE_CFG_STOP _SB_MAKEMASK1(3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SCD_TRACE_CFG_FREEZE _SB_MAKEMASK1(4) +#define M_SCD_TRACE_CFG_FREEZE_FULL _SB_MAKEMASK1(5) +#define M_SCD_TRACE_CFG_DEBUG_FULL _SB_MAKEMASK1(6) +#define M_SCD_TRACE_CFG_FULL _SB_MAKEMASK1(7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if ??? || ??? || ??? +#define M_SCD_TRACE_CFG_FORCECNT _SB_MAKEMASK1(8) +#endif +#if SIBYTE_HDR_FEATURE_1250_112x +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_TRACE_CFG_CUR_ADDR 10 +#else +#if ??? +#define S_SCD_TRACE_CFG_CUR_ADDR 24 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#endif +#define M_SCD_TRACE_CFG_CUR_ADDR _SB_MAKEMASK(8, S_SCD_TRACE_CFG_CUR_ADDR) +#define V_SCD_TRACE_CFG_CUR_ADDR(x) _SB_MAKEVALUE(x, S_SCD_TRACE_CFG_CUR_ADDR) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_SCD_TRACE_CFG_CUR_ADDR(x) _SB_GETVALUE(x, S_SCD_TRACE_CFG_CUR_ADDR, M_SCD_TRACE_CFG_CUR_ADDR) +#define S_SCD_TREVT_ADDR_MATCH 0 +#define M_SCD_TREVT_ADDR_MATCH _SB_MAKEMASK(4, S_SCD_TREVT_ADDR_MATCH) +#define V_SCD_TREVT_ADDR_MATCH(x) _SB_MAKEVALUE(x, S_SCD_TREVT_ADDR_MATCH) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_SCD_TREVT_ADDR_MATCH(x) _SB_GETVALUE(x, S_SCD_TREVT_ADDR_MATCH, M_SCD_TREVT_ADDR_MATCH) +#define M_SCD_TREVT_REQID_MATCH _SB_MAKEMASK1(4) +#define M_SCD_TREVT_DATAID_MATCH _SB_MAKEMASK1(5) +#define M_SCD_TREVT_RESPID_MATCH _SB_MAKEMASK1(6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SCD_TREVT_INTERRUPT _SB_MAKEMASK1(7) +#define M_SCD_TREVT_DEBUG_PIN _SB_MAKEMASK1(9) +#define M_SCD_TREVT_WRITE _SB_MAKEMASK1(10) +#define M_SCD_TREVT_READ _SB_MAKEMASK1(11) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_TREVT_REQID 12 +#define M_SCD_TREVT_REQID _SB_MAKEMASK(4, S_SCD_TREVT_REQID) +#define V_SCD_TREVT_REQID(x) _SB_MAKEVALUE(x, S_SCD_TREVT_REQID) +#define G_SCD_TREVT_REQID(x) _SB_GETVALUE(x, S_SCD_TREVT_REQID, M_SCD_TREVT_REQID) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_TREVT_RESPID 16 +#define M_SCD_TREVT_RESPID _SB_MAKEMASK(4, S_SCD_TREVT_RESPID) +#define V_SCD_TREVT_RESPID(x) _SB_MAKEVALUE(x, S_SCD_TREVT_RESPID) +#define G_SCD_TREVT_RESPID(x) _SB_GETVALUE(x, S_SCD_TREVT_RESPID, M_SCD_TREVT_RESPID) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_TREVT_DATAID 20 +#define M_SCD_TREVT_DATAID _SB_MAKEMASK(4, S_SCD_TREVT_DATAID) +#define V_SCD_TREVT_DATAID(x) _SB_MAKEVALUE(x, S_SCD_TREVT_DATAID) +#define G_SCD_TREVT_DATAID(x) _SB_GETVALUE(x, S_SCD_TREVT_DATAID, M_SCD_TREVT_DATID) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_TREVT_COUNT 24 +#define M_SCD_TREVT_COUNT _SB_MAKEMASK(8, S_SCD_TREVT_COUNT) +#define V_SCD_TREVT_COUNT(x) _SB_MAKEVALUE(x, S_SCD_TREVT_COUNT) +#define G_SCD_TREVT_COUNT(x) _SB_GETVALUE(x, S_SCD_TREVT_COUNT, M_SCD_TREVT_COUNT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_TRSEQ_EVENT4 0 +#define M_SCD_TRSEQ_EVENT4 _SB_MAKEMASK(4, S_SCD_TRSEQ_EVENT4) +#define V_SCD_TRSEQ_EVENT4(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_EVENT4) +#define G_SCD_TRSEQ_EVENT4(x) _SB_GETVALUE(x, S_SCD_TRSEQ_EVENT4, M_SCD_TRSEQ_EVENT4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_TRSEQ_EVENT3 4 +#define M_SCD_TRSEQ_EVENT3 _SB_MAKEMASK(4, S_SCD_TRSEQ_EVENT3) +#define V_SCD_TRSEQ_EVENT3(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_EVENT3) +#define G_SCD_TRSEQ_EVENT3(x) _SB_GETVALUE(x, S_SCD_TRSEQ_EVENT3, M_SCD_TRSEQ_EVENT3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_TRSEQ_EVENT2 8 +#define M_SCD_TRSEQ_EVENT2 _SB_MAKEMASK(4, S_SCD_TRSEQ_EVENT2) +#define V_SCD_TRSEQ_EVENT2(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_EVENT2) +#define G_SCD_TRSEQ_EVENT2(x) _SB_GETVALUE(x, S_SCD_TRSEQ_EVENT2, M_SCD_TRSEQ_EVENT2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define S_SCD_TRSEQ_EVENT1 12 +#define M_SCD_TRSEQ_EVENT1 _SB_MAKEMASK(4, S_SCD_TRSEQ_EVENT1) +#define V_SCD_TRSEQ_EVENT1(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_EVENT1) +#define G_SCD_TRSEQ_EVENT1(x) _SB_GETVALUE(x, S_SCD_TRSEQ_EVENT1, M_SCD_TRSEQ_EVENT1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SCD_TRSEQ_E0 0 +#define K_SCD_TRSEQ_E1 1 +#define K_SCD_TRSEQ_E2 2 +#define K_SCD_TRSEQ_E3 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SCD_TRSEQ_E0_E1 4 +#define K_SCD_TRSEQ_E1_E2 5 +#define K_SCD_TRSEQ_E2_E3 6 +#define K_SCD_TRSEQ_E0_E1_E2 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SCD_TRSEQ_E0_E1_E2_E3 8 +#define K_SCD_TRSEQ_E0E1 9 +#define K_SCD_TRSEQ_E0E1E2 10 +#define K_SCD_TRSEQ_E0E1E2E3 11 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SCD_TRSEQ_E0E1_E2 12 +#define K_SCD_TRSEQ_E0E1_E2E3 13 +#define K_SCD_TRSEQ_E0E1_E2_E3 14 +#define K_SCD_TRSEQ_IGNORED 15 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SCD_TRSEQ_TRIGGER_ALL (V_SCD_TRSEQ_EVENT1(K_SCD_TRSEQ_IGNORED) | V_SCD_TRSEQ_EVENT2(K_SCD_TRSEQ_IGNORED) | V_SCD_TRSEQ_EVENT3(K_SCD_TRSEQ_IGNORED) | V_SCD_TRSEQ_EVENT4(K_SCD_TRSEQ_IGNORED)) +#define S_SCD_TRSEQ_FUNCTION 16 +#define M_SCD_TRSEQ_FUNCTION _SB_MAKEMASK(4, S_SCD_TRSEQ_FUNCTION) +#define V_SCD_TRSEQ_FUNCTION(x) _SB_MAKEVALUE(x, S_SCD_TRSEQ_FUNCTION) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define G_SCD_TRSEQ_FUNCTION(x) _SB_GETVALUE(x, S_SCD_TRSEQ_FUNCTION, M_SCD_TRSEQ_FUNCTION) +#define K_SCD_TRSEQ_FUNC_NOP 0 +#define K_SCD_TRSEQ_FUNC_START 1 +#define K_SCD_TRSEQ_FUNC_STOP 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K_SCD_TRSEQ_FUNC_FREEZE 3 +#define V_SCD_TRSEQ_FUNC_NOP V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_NOP) +#define V_SCD_TRSEQ_FUNC_START V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_START) +#define V_SCD_TRSEQ_FUNC_STOP V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_STOP) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define V_SCD_TRSEQ_FUNC_FREEZE V_SCD_TRSEQ_FUNCTION(K_SCD_TRSEQ_FUNC_FREEZE) +#define M_SCD_TRSEQ_ASAMPLE _SB_MAKEMASK1(18) +#define M_SCD_TRSEQ_DSAMPLE _SB_MAKEMASK1(19) +#define M_SCD_TRSEQ_DEBUGPIN _SB_MAKEMASK1(20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define M_SCD_TRSEQ_DEBUGCPU _SB_MAKEMASK1(21) +#define M_SCD_TRSEQ_CLEARUSE _SB_MAKEMASK1(22) +#define M_SCD_TRSEQ_ALLD_A _SB_MAKEMASK1(23) +#define M_SCD_TRSEQ_ALL_A _SB_MAKEMASK1(24) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sigcontext.h b/9/platforms/android-16/arch-mips/usr/include/asm/sigcontext.h new file mode 100644 index 0000000..d3742f3 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sigcontext.h @@ -0,0 +1,75 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SIGCONTEXT_H +#define _ASM_SIGCONTEXT_H +#include <asm/sgidefs.h> +#if _MIPS_SIM == _MIPS_SIM_ABI32 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct sigcontext { + unsigned int sc_regmask; + unsigned int sc_status; + unsigned long long sc_pc; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long long sc_regs[32]; + unsigned long long sc_fpregs[32]; + unsigned int sc_acx; + unsigned int sc_fpc_csr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int sc_fpc_eir; + unsigned int sc_used_math; + unsigned int sc_dsp; + unsigned long long sc_mdhi; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long long sc_mdlo; + unsigned long sc_hi1; + unsigned long sc_lo1; + unsigned long sc_hi2; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long sc_lo2; + unsigned long sc_hi3; + unsigned long sc_lo3; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#if _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 +#include <linux/posix_types.h> +struct sigcontext { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __u64 sc_regs[32]; + __u64 sc_fpregs[32]; + __u64 sc_mdhi; + __u64 sc_hi1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __u64 sc_hi2; + __u64 sc_hi3; + __u64 sc_mdlo; + __u64 sc_lo1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __u64 sc_lo2; + __u64 sc_lo3; + __u64 sc_pc; + __u32 sc_fpc_csr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __u32 sc_used_math; + __u32 sc_dsp; + __u32 sc_reserved; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/siginfo.h b/9/platforms/android-16/arch-mips/usr/include/asm/siginfo.h new file mode 100644 index 0000000..8fdbf77 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/siginfo.h @@ -0,0 +1,98 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SIGINFO_H +#define _ASM_SIGINFO_H +#define __ARCH_SIGEV_PREAMBLE_SIZE (sizeof(long) + 2*sizeof(int)) +#undef __ARCH_SI_TRAPNO +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HAVE_ARCH_SIGINFO_T +#define HAVE_ARCH_COPY_SIGINFO +struct siginfo; +#define __ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm-generic/siginfo.h> +typedef struct siginfo { + int si_signo; + int si_code; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int si_errno; + int __pad0[SI_MAX_SIZE / sizeof(int) - SI_PAD_SIZE - 3]; + union { + int _pad[SI_PAD_SIZE]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct { + pid_t _pid; + __ARCH_SI_UID_T _uid; + } _kill; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct { + timer_t _tid; + int _overrun; + char _pad[sizeof( __ARCH_SI_UID_T) - sizeof(int)]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + sigval_t _sigval; + int _sys_private; + } _timer; + struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + pid_t _pid; + __ARCH_SI_UID_T _uid; + sigval_t _sigval; + } _rt; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct { + pid_t _pid; + __ARCH_SI_UID_T _uid; + int _status; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + clock_t _utime; + clock_t _stime; + } _sigchld; + struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + pid_t _pid; + clock_t _utime; + int _status; + clock_t _stime; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } _irix_sigchld; + struct { + void __user *_addr; +#ifdef __ARCH_SI_TRAPNO +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + int _trapno; +#endif + } _sigfault; + struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __ARCH_SI_BAND_T _band; + int _fd; + } _sigpoll; + } _sifields; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +} siginfo_t; +#undef SI_ASYNCIO +#undef SI_TIMER +#undef SI_MESGQ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SI_ASYNCIO -2 +#define SI_TIMER __SI_CODE(__SI_TIMER, -3) +#define SI_MESGQ __SI_CODE(__SI_MESGQ, -4) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/signal.h b/9/platforms/android-16/arch-mips/usr/include/asm/signal.h new file mode 100644 index 0000000..5f5ac77 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/signal.h @@ -0,0 +1,124 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SIGNAL_H +#define _ASM_SIGNAL_H +#include <linux/types.h> +#define _NSIG 128 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NSIG 128 +#define _NSIG_BPW (sizeof(unsigned long) * 8) +#define _NSIG_WORDS (_NSIG / _NSIG_BPW) +typedef struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long sig[_NSIG_WORDS]; +} sigset_t; +typedef unsigned long old_sigset_t; +#define SIGHUP 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIGINT 2 +#define SIGQUIT 3 +#define SIGILL 4 +#define SIGTRAP 5 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIGIOT 6 +#define SIGABRT SIGIOT +#define SIGEMT 7 +#define SIGFPE 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIGKILL 9 +#define SIGBUS 10 +#define SIGSEGV 11 +#define SIGSYS 12 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIGPIPE 13 +#define SIGALRM 14 +#define SIGTERM 15 +#define SIGUSR1 16 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIGUSR2 17 +#define SIGCHLD 18 +#define SIGCLD SIGCHLD +#define SIGPWR 19 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIGWINCH 20 +#define SIGURG 21 +#define SIGIO 22 +#define SIGPOLL SIGIO +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIGSTOP 23 +#define SIGTSTP 24 +#define SIGCONT 25 +#define SIGTTIN 26 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIGTTOU 27 +#define SIGVTALRM 28 +#define SIGPROF 29 +#define SIGXCPU 30 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIGXFSZ 31 +#define SIGRTMIN 32 +#define SIGRTMAX _NSIG +#define SA_ONSTACK 0x08000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SA_RESETHAND 0x80000000 +#define SA_RESTART 0x10000000 +#define SA_SIGINFO 0x00000008 +#define SA_NODEFER 0x40000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SA_NOCLDWAIT 0x00010000 +#define SA_NOCLDSTOP 0x00000001 +#define SA_NOMASK SA_NODEFER +#define SA_ONESHOT SA_RESETHAND +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SA_RESTORER 0x04000000 +#define SS_ONSTACK 1 +#define SS_DISABLE 2 +#define MINSIGSTKSZ 2048 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIGSTKSZ 8192 +struct siginfo; +#define SIG_BLOCK 1 +#define SIG_UNBLOCK 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIG_SETMASK 3 +#include <asm-generic/signal.h> +struct sigaction { + unsigned int sa_flags; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + union { + __sighandler_t sa_handler; + void (*sa_sigaction) (int, struct siginfo *, void *); + } __sigaction_handler; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define sa_handler __sigaction_handler.sa_handler +#define sa_sigaction __sigaction_handler.sa_sigaction + sigset_t sa_mask; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct k_sigaction { + struct sigaction sa; +}; +typedef struct sigaltstack { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + void *ss_sp; + size_t ss_size; + int ss_flags; +} stack_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/smp-ops.h b/9/platforms/android-16/arch-mips/usr/include/asm/smp-ops.h new file mode 100644 index 0000000..f80f01c --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/smp-ops.h @@ -0,0 +1,23 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_SMP_OPS_H +#define __ASM_SMP_OPS_H +struct plat_smp_ops; +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/smp.h b/9/platforms/android-16/arch-mips/usr/include/asm/smp.h new file mode 100644 index 0000000..87eea88 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/smp.h @@ -0,0 +1,38 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_SMP_H +#define __ASM_SMP_H +#include <linux/bitops.h> +#include <linux/linkage.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <linux/threads.h> +#include <linux/cpumask.h> +#include <asm/atomic.h> +#include <asm/smp-ops.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define raw_smp_processor_id() (current_thread_info()->cpu) +#define cpu_number_map(cpu) __cpu_number_map[cpu] +#define cpu_logical_map(cpu) __cpu_logical_map[cpu] +#define NO_PROC_ID (-1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SMP_RESCHEDULE_YOURSELF 0x1 +#define SMP_CALL_FUNCTION 0x2 +#define cpu_possible_map phys_cpu_present_map +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sn/addrs.h b/9/platforms/android-16/arch-mips/usr/include/asm/sn/addrs.h new file mode 100644 index 0000000..d243613 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sn/addrs.h @@ -0,0 +1,188 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SN_ADDRS_H +#define _ASM_SN_ADDRS_H +#ifndef __ASSEMBLY__ +#include <linux/types.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#include <asm/addrspace.h> +#include <asm/sn/kldir.h> +#ifndef __ASSEMBLY__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PS_UINT_CAST (unsigned long) +#define UINT64_CAST (unsigned long) +#define HUBREG_CAST (volatile hubreg_t *) +#else +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PS_UINT_CAST +#define UINT64_CAST +#define HUBREG_CAST +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NASID_GET_META(_n) ((_n) >> NASID_LOCAL_BITS) +#define NASID_MAKE(_m, _l) (((_m) << NASID_LOCAL_BITS) | (_l)) +#define NODE_ADDRSPACE_MASK (NODE_ADDRSPACE_SIZE - 1) +#define TO_NODE_ADDRSPACE(_pa) (UINT64_CAST (_pa) & NODE_ADDRSPACE_MASK) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CHANGE_ADDR_NASID(_pa, _nasid) ((UINT64_CAST(_pa) & ~NASID_MASK) | (UINT64_CAST(_nasid) << NASID_SHFT)) +#define NODE_OFFSET(_n) (UINT64_CAST (_n) << NODE_SIZE_BITS) +#define NODE_CAC_BASE(_n) (CAC_BASE + NODE_OFFSET(_n)) +#define NODE_HSPEC_BASE(_n) (HSPEC_BASE + NODE_OFFSET(_n)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NODE_IO_BASE(_n) (IO_BASE + NODE_OFFSET(_n)) +#define NODE_MSPEC_BASE(_n) (MSPEC_BASE + NODE_OFFSET(_n)) +#define NODE_UNCAC_BASE(_n) (UNCAC_BASE + NODE_OFFSET(_n)) +#define TO_NODE(_n, _x) (NODE_OFFSET(_n) | ((_x) )) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TO_NODE_CAC(_n, _x) (NODE_CAC_BASE(_n) | ((_x) & TO_PHYS_MASK)) +#define TO_NODE_UNCAC(_n, _x) (NODE_UNCAC_BASE(_n) | ((_x) & TO_PHYS_MASK)) +#define TO_NODE_MSPEC(_n, _x) (NODE_MSPEC_BASE(_n) | ((_x) & TO_PHYS_MASK)) +#define TO_NODE_HSPEC(_n, _x) (NODE_HSPEC_BASE(_n) | ((_x) & TO_PHYS_MASK)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define RAW_NODE_SWIN_BASE(nasid, widget) (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS)) +#define WIDGETID_GET(addr) ((unsigned char)((addr >> SWIN_SIZE_BITS) & 0xff)) +#define SWIN_SIZE_BITS 24 +#define SWIN_SIZE (UINT64_CAST 1 << 24) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SWIN_SIZEMASK (SWIN_SIZE - 1) +#define SWIN_WIDGET_MASK 0xF +#define SWIN_WIDGETADDR(addr) ((addr) & SWIN_SIZEMASK) +#define SWIN_WIDGETNUM(addr) (((addr) >> SWIN_SIZE_BITS) & SWIN_WIDGET_MASK) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NODE_SWIN_ADDR(nasid, addr) (((addr) >= NODE_SWIN_BASE(nasid, 0)) && ((addr) < (NODE_SWIN_BASE(nasid, HUB_NUM_WIDGET) + SWIN_SIZE) )) +#define UALIAS_BASE HSPEC_BASE +#define UALIAS_SIZE 0x10000000 +#define UALIAS_LIMIT (UALIAS_BASE + UALIAS_SIZE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HUB_REGISTER_WIDGET 1 +#define IALIAS_BASE NODE_SWIN_BASE(0, HUB_REGISTER_WIDGET) +#define IALIAS_SIZE 0x800000 +#define IS_IALIAS(_a) (((_a) >= IALIAS_BASE) && ((_a) < (IALIAS_BASE + IALIAS_SIZE))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NODE_BDOOR_BASE(_n) (NODE_HSPEC_BASE(_n) + (NODE_ADDRSPACE_SIZE/2)) +#define NODE_BDECC_BASE(_n) (NODE_BDOOR_BASE(_n)) +#define NODE_BDDIR_BASE(_n) (NODE_BDOOR_BASE(_n) + (NODE_ADDRSPACE_SIZE/4)) +#define LOCAL_HUB_ADDR(_x) (HUBREG_CAST (IALIAS_BASE + (_x))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define REMOTE_HUB_ADDR(_n, _x) (HUBREG_CAST (NODE_SWIN_BASE(_n, 1) + 0x800000 + (_x))) +#ifndef __ASSEMBLY__ +#define HUB_L(_a) *(_a) +#define HUB_S(_a, _d) *(_a) = (_d) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LOCAL_HUB_L(_r) HUB_L(LOCAL_HUB_ADDR(_r)) +#define LOCAL_HUB_S(_r, _d) HUB_S(LOCAL_HUB_ADDR(_r), (_d)) +#define REMOTE_HUB_L(_n, _r) HUB_L(REMOTE_HUB_ADDR((_n), (_r))) +#define REMOTE_HUB_S(_n, _r, _d) HUB_S(REMOTE_HUB_ADDR((_n), (_r)), (_d)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define REMOTE_HUB_PI_L(_n, _sn, _r) HUB_L(REMOTE_HUB_PI_ADDR((_n), (_sn), (_r))) +#define REMOTE_HUB_PI_S(_n, _sn, _r, _d) HUB_S(REMOTE_HUB_PI_ADDR((_n), (_sn), (_r)), (_d)) +#endif +#define HUB_REG_PTR(_base, _off) (HUBREG_CAST((__psunsigned_t)(_base) + (__psunsigned_t)(_off))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HUB_REG_PTR_L(_base, _off) HUB_L(HUB_REG_PTR((_base), (_off))) +#define HUB_REG_PTR_S(_base, _off, _data) HUB_S(HUB_REG_PTR((_base), (_off)), (_data)) +#define PHYS_RAMBASE 0x0 +#define K0_RAMBASE PHYS_TO_K0(PHYS_RAMBASE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EX_HANDLER_OFFSET(slice) ((slice) << 16) +#define EX_HANDLER_ADDR(nasid, slice) PHYS_TO_K0(NODE_OFFSET(nasid) | EX_HANDLER_OFFSET(slice)) +#define EX_HANDLER_SIZE 0x0400 +#define EX_FRAME_OFFSET(slice) ((slice) << 16 | 0x400) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EX_FRAME_ADDR(nasid, slice) PHYS_TO_K0(NODE_OFFSET(nasid) | EX_FRAME_OFFSET(slice)) +#define EX_FRAME_SIZE 0x0c00 +#define ARCS_SPB_OFFSET 0x1000 +#define ARCS_SPB_ADDR(nasid) PHYS_TO_K0(NODE_OFFSET(nasid) | ARCS_SPB_OFFSET) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ARCS_SPB_SIZE 0x0400 +#define KLDIR_OFFSET 0x2000 +#define KLDIR_ADDR(nasid) TO_NODE_UNCAC((nasid), KLDIR_OFFSET) +#define KLDIR_SIZE 0x0400 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KLI_LAUNCH 0 +#define KLI_KLCONFIG 1 +#define KLI_NMI 2 +#define KLI_GDA 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KLI_FREEMEM 4 +#define KLI_SYMMON_STK 5 +#define KLI_PI_ERROR 6 +#define KLI_KERN_VARS 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KLI_KERN_XP 8 +#define KLI_KERN_PARTID 9 +#ifndef __ASSEMBLY__ +#define KLD_BASE(nasid) ((kldir_ent_t *) KLDIR_ADDR(nasid)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KLD_LAUNCH(nasid) (KLD_BASE(nasid) + KLI_LAUNCH) +#define KLD_NMI(nasid) (KLD_BASE(nasid) + KLI_NMI) +#define KLD_KLCONFIG(nasid) (KLD_BASE(nasid) + KLI_KLCONFIG) +#define KLD_PI_ERROR(nasid) (KLD_BASE(nasid) + KLI_PI_ERROR) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KLD_GDA(nasid) (KLD_BASE(nasid) + KLI_GDA) +#define KLD_SYMMON_STK(nasid) (KLD_BASE(nasid) + KLI_SYMMON_STK) +#define KLD_FREEMEM(nasid) (KLD_BASE(nasid) + KLI_FREEMEM) +#define KLD_KERN_VARS(nasid) (KLD_BASE(nasid) + KLI_KERN_VARS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KLD_KERN_XP(nasid) (KLD_BASE(nasid) + KLI_KERN_XP) +#define KLD_KERN_PARTID(nasid) (KLD_BASE(nasid) + KLI_KERN_PARTID) +#define LAUNCH_OFFSET(nasid, slice) (KLD_LAUNCH(nasid)->offset + KLD_LAUNCH(nasid)->stride * (slice)) +#define LAUNCH_ADDR(nasid, slice) TO_NODE_UNCAC((nasid), LAUNCH_OFFSET(nasid, slice)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define LAUNCH_SIZE(nasid) KLD_LAUNCH(nasid)->size +#define NMI_OFFSET(nasid, slice) (KLD_NMI(nasid)->offset + KLD_NMI(nasid)->stride * (slice)) +#define NMI_ADDR(nasid, slice) TO_NODE_UNCAC((nasid), NMI_OFFSET(nasid, slice)) +#define NMI_SIZE(nasid) KLD_NMI(nasid)->size +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KLCONFIG_OFFSET(nasid) KLD_KLCONFIG(nasid)->offset +#define KLCONFIG_ADDR(nasid) TO_NODE_UNCAC((nasid), KLCONFIG_OFFSET(nasid)) +#define KLCONFIG_SIZE(nasid) KLD_KLCONFIG(nasid)->size +#define GDA_ADDR(nasid) KLD_GDA(nasid)->pointer +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GDA_SIZE(nasid) KLD_GDA(nasid)->size +#define SYMMON_STK_OFFSET(nasid, slice) (KLD_SYMMON_STK(nasid)->offset + KLD_SYMMON_STK(nasid)->stride * (slice)) +#define SYMMON_STK_STRIDE(nasid) KLD_SYMMON_STK(nasid)->stride +#define SYMMON_STK_ADDR(nasid, slice) TO_NODE_CAC((nasid), SYMMON_STK_OFFSET(nasid, slice)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYMMON_STK_SIZE(nasid) KLD_SYMMON_STK(nasid)->stride +#define SYMMON_STK_END(nasid) (SYMMON_STK_ADDR(nasid, 0) + KLD_SYMMON_STK(nasid)->size) +#define UNIX_DEBUG_LOADADDR 0x300000 +#define SYMMON_LOADADDR(nasid) TO_NODE(nasid, PHYS_TO_K0(UNIX_DEBUG_LOADADDR - 0x1000)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FREEMEM_OFFSET(nasid) KLD_FREEMEM(nasid)->offset +#define FREEMEM_ADDR(nasid) SYMMON_STK_END(nasid) +#define FREEMEM_SIZE(nasid) KLD_FREEMEM(nasid)->size +#define PI_ERROR_OFFSET(nasid) KLD_PI_ERROR(nasid)->offset +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERROR_ADDR(nasid) TO_NODE_UNCAC((nasid), PI_ERROR_OFFSET(nasid)) +#define PI_ERROR_SIZE(nasid) KLD_PI_ERROR(nasid)->size +#define NODE_OFFSET_TO_K0(_nasid, _off) PHYS_TO_K0((NODE_OFFSET(_nasid) + (_off)) | CAC_BASE) +#define NODE_OFFSET_TO_K1(_nasid, _off) TO_UNCAC((NODE_OFFSET(_nasid) + (_off)) | UNCAC_BASE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define K0_TO_NODE_OFFSET(_k0addr) ((__psunsigned_t)(_k0addr) & NODE_ADDRSPACE_MASK) +#define KERN_VARS_ADDR(nasid) KLD_KERN_VARS(nasid)->pointer +#define KERN_VARS_SIZE(nasid) KLD_KERN_VARS(nasid)->size +#define KERN_XP_ADDR(nasid) KLD_KERN_XP(nasid)->pointer +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KERN_XP_SIZE(nasid) KLD_KERN_XP(nasid)->size +#define GPDA_ADDR(nasid) TO_NODE_CAC(nasid, GPDA_OFFSET) +#endif +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sn/arch.h b/9/platforms/android-16/arch-mips/usr/include/asm/sn/arch.h new file mode 100644 index 0000000..f6ceb20 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sn/arch.h @@ -0,0 +1,40 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SN_ARCH_H +#define _ASM_SN_ARCH_H +#include <linux/types.h> +#include <asm/sn/types.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef u64 hubreg_t; +#define cputonasid(cpu) (sn_cpu_info[(cpu)].p_nasid) +#define cputoslice(cpu) (sn_cpu_info[(cpu)].p_slice) +#define makespnum(_nasid, _slice) (((_nasid) << CPUS_PER_NODE_SHFT) | (_slice)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INVALID_NASID (nasid_t)-1 +#define INVALID_CNODEID (cnodeid_t)-1 +#define INVALID_PNODEID (pnodeid_t)-1 +#define INVALID_MODULE (moduleid_t)-1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INVALID_PARTID (partid_t)-1 +#define NASID_TO_REGION(nnode) ((nnode) >> (is_fine_dirmode() ? NASID_TO_FINEREG_SHFT : NASID_TO_COARSEREG_SHFT)) +#define NASID_TO_COMPACT_NODEID(nnode) (nasid_to_compact_node[nnode]) +#define COMPACT_TO_NASID_NODEID(cnode) (compact_to_nasid_node[cnode]) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CPUID_TO_COMPACT_NODEID(cpu) (cpuid_to_compact_node[(cpu)]) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sn/hub.h b/9/platforms/android-16/arch-mips/usr/include/asm/sn/hub.h new file mode 100644 index 0000000..cbb1dbd --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sn/hub.h @@ -0,0 +1,29 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_SN_HUB_H +#define __ASM_SN_HUB_H +#include <linux/types.h> +#include <linux/cpumask.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/sn/types.h> +#include <asm/sn/io.h> +#include <asm/sn/klkernvars.h> +#include <asm/xtalk/xtalk.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sn/io.h b/9/platforms/android-16/arch-mips/usr/include/asm/sn/io.h new file mode 100644 index 0000000..2b8a101 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sn/io.h @@ -0,0 +1,44 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SN_IO_H +#define _ASM_SN_IO_H +#define IIO_ITTE_BASE 0x400160 +#define IIO_ITTE(bigwin) (IIO_ITTE_BASE + 8*(bigwin)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ITTE_OFFSET_BITS 5 +#define IIO_ITTE_OFFSET_MASK ((1<<IIO_ITTE_OFFSET_BITS)-1) +#define IIO_ITTE_OFFSET_SHIFT 0 +#define IIO_ITTE_WIDGET_BITS 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ITTE_WIDGET_MASK ((1<<IIO_ITTE_WIDGET_BITS)-1) +#define IIO_ITTE_WIDGET_SHIFT 8 +#define IIO_ITTE_IOSP 1 +#define IIO_ITTE_IOSP_MASK 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ITTE_IOSP_SHIFT 12 +#define HUB_PIO_MAP_TO_MEM 0 +#define HUB_PIO_MAP_TO_IO 1 +#define IIO_ITTE_INVALID_WIDGET 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ITTE_PUT(nasid, bigwin, io_or_mem, widget, addr) REMOTE_HUB_S((nasid), IIO_ITTE(bigwin), (((((addr) >> BWIN_SIZE_BITS) & IIO_ITTE_OFFSET_MASK) << IIO_ITTE_OFFSET_SHIFT) | (io_or_mem << IIO_ITTE_IOSP_SHIFT) | (((widget) & IIO_ITTE_WIDGET_MASK) << IIO_ITTE_WIDGET_SHIFT))) +#define IIO_ITTE_DISABLE(nasid, bigwin) IIO_ITTE_PUT((nasid), HUB_PIO_MAP_TO_MEM, (bigwin), IIO_ITTE_INVALID_WIDGET, 0) +#define IIO_ITTE_GET(nasid, bigwin) REMOTE_HUB_ADDR((nasid), IIO_ITTE(bigwin)) +#define IIO_IOPRB(_x) (IIO_IOPRB_0 + ( ( (_x) < HUB_WIDGET_ID_MIN ? (_x) : (_x) - (HUB_WIDGET_ID_MIN-1)) << 3) ) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sn/ioc3.h b/9/platforms/android-16/arch-mips/usr/include/asm/sn/ioc3.h new file mode 100644 index 0000000..9771304 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sn/ioc3.h @@ -0,0 +1,645 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _IOC3_H +#define _IOC3_H +#include <linux/types.h> +typedef volatile struct ioc3_uartregs { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + union { + volatile u8 rbr; + volatile u8 thr; + volatile u8 dll; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } u1; + union { + volatile u8 ier; + volatile u8 dlm; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } u2; + union { + volatile u8 iir; + volatile u8 fcr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } u3; + volatile u8 iu_lcr; + volatile u8 iu_mcr; + volatile u8 iu_lsr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 iu_msr; + volatile u8 iu_scr; +} ioc3_uregs_t; +#define iu_rbr u1.rbr +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define iu_thr u1.thr +#define iu_dll u1.dll +#define iu_ier u2.ier +#define iu_dlm u2.dlm +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define iu_iir u3.iir +#define iu_fcr u3.fcr +struct ioc3_sioregs { + volatile u8 fill[0x141]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 uartc; + volatile u8 kbdcg; + volatile u8 fill0[0x150 - 0x142 - 1]; + volatile u8 pp_data; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 pp_dsr; + volatile u8 pp_dcr; + volatile u8 fill1[0x158 - 0x152 - 1]; + volatile u8 pp_fifa; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 pp_cfgb; + volatile u8 pp_ecr; + volatile u8 fill2[0x168 - 0x15a - 1]; + volatile u8 rtcad; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u8 rtcdat; + volatile u8 fill3[0x170 - 0x169 - 1]; + struct ioc3_uartregs uartb; + struct ioc3_uartregs uarta; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct ioc3 { + volatile u32 pad0[7]; + volatile u32 sio_ir; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 sio_ies; + volatile u32 sio_iec; + volatile u32 sio_cr; + volatile u32 int_out; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 mcr; + volatile u32 gpcr_s; + volatile u32 gpcr_c; + volatile u32 gpdr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 gppr_0; + volatile u32 gppr_1; + volatile u32 gppr_2; + volatile u32 gppr_3; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 gppr_4; + volatile u32 gppr_5; + volatile u32 gppr_6; + volatile u32 gppr_7; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 gppr_8; + volatile u32 gppr_9; + volatile u32 gppr_10; + volatile u32 gppr_11; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 gppr_12; + volatile u32 gppr_13; + volatile u32 gppr_14; + volatile u32 gppr_15; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 ppbr_h_a; + volatile u32 ppbr_l_a; + volatile u32 ppcr_a; + volatile u32 ppcr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 ppbr_h_b; + volatile u32 ppbr_l_b; + volatile u32 ppcr_b; + volatile u32 km_csr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 k_rd; + volatile u32 m_rd; + volatile u32 k_wd; + volatile u32 m_wd; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 sbbr_h; + volatile u32 sbbr_l; + volatile u32 sscr_a; + volatile u32 stpir_a; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 stcir_a; + volatile u32 srpir_a; + volatile u32 srcir_a; + volatile u32 srtr_a; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 shadow_a; + volatile u32 sscr_b; + volatile u32 stpir_b; + volatile u32 stcir_b; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 srpir_b; + volatile u32 srcir_b; + volatile u32 srtr_b; + volatile u32 shadow_b; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 emcr; + volatile u32 eisr; + volatile u32 eier; + volatile u32 ercsr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 erbr_h; + volatile u32 erbr_l; + volatile u32 erbar; + volatile u32 ercir; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 erpir; + volatile u32 ertr; + volatile u32 etcsr; + volatile u32 ersr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 etcdc; + volatile u32 ebir; + volatile u32 etbr_h; + volatile u32 etbr_l; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 etcir; + volatile u32 etpir; + volatile u32 emar_h; + volatile u32 emar_l; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 ehar_h; + volatile u32 ehar_l; + volatile u32 micr; + volatile u32 midr_r; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 midr_w; + volatile u32 pad1[(0x20000 - 0x00154) / 4]; + struct ioc3_sioregs sregs; + volatile u32 pad2[(0x40000 - 0x20180) / 4]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + volatile u32 ssram[(0x80000 - 0x40000) / 4]; +}; +struct ioc3_erxbuf { + u32 w0; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 err; +}; +#define ERXBUF_IPCKSUM_MASK 0x0000ffff +#define ERXBUF_BYTECNT_MASK 0x07ff0000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ERXBUF_BYTECNT_SHIFT 16 +#define ERXBUF_V 0x80000000 +#define ERXBUF_CRCERR 0x00000001 +#define ERXBUF_FRAMERR 0x00000002 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ERXBUF_CODERR 0x00000004 +#define ERXBUF_INVPREAMB 0x00000008 +#define ERXBUF_LOLEN 0x00007000 +#define ERXBUF_HILEN 0x03ff0000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ERXBUF_MULTICAST 0x04000000 +#define ERXBUF_BROADCAST 0x08000000 +#define ERXBUF_LONGEVENT 0x10000000 +#define ERXBUF_BADPKT 0x20000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ERXBUF_GOODPKT 0x40000000 +#define ERXBUF_CARRIER 0x80000000 +#define ETXD_DATALEN 104 +struct ioc3_etxd { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u32 cmd; + u32 bufcnt; + u64 p1; + u64 p2; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u8 data[ETXD_DATALEN]; +}; +#define ETXD_BYTECNT_MASK 0x000007ff +#define ETXD_INTWHENDONE 0x00001000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ETXD_D0V 0x00010000 +#define ETXD_B1V 0x00020000 +#define ETXD_B2V 0x00040000 +#define ETXD_DOCHECKSUM 0x00080000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ETXD_CHKOFF_MASK 0x07f00000 +#define ETXD_CHKOFF_SHIFT 20 +#define ETXD_D0CNT_MASK 0x0000007f +#define ETXD_B1CNT_MASK 0x0007ff00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ETXD_B1CNT_SHIFT 8 +#define ETXD_B2CNT_MASK 0x7ff00000 +#define ETXD_B2CNT_SHIFT 20 +#define IOC3_BYTEBUS_DEV0 0x80000L +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOC3_BYTEBUS_DEV1 0xa0000L +#define IOC3_BYTEBUS_DEV2 0xc0000L +#define IOC3_BYTEBUS_DEV3 0xe0000L +#define IOC3_SIO_BASE 0x20000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOC3_SIO_UARTC (IOC3_SIO_BASE+0x141) +#define IOC3_SIO_KBDCG (IOC3_SIO_BASE+0x142) +#define IOC3_SIO_PP_BASE (IOC3_SIO_BASE+PP_BASE) +#define IOC3_SIO_RTC_BASE (IOC3_SIO_BASE+0x168) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOC3_SIO_UB_BASE (IOC3_SIO_BASE+UARTB_BASE) +#define IOC3_SIO_UA_BASE (IOC3_SIO_BASE+UARTA_BASE) +#define IOC3_SSRAM IOC3_RAM_OFF +#define IOC3_SSRAM_LEN 0x40000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOC3_SSRAM_DM 0x0000ffff +#define IOC3_SSRAM_PM 0x00010000 +#define PCI_SCR_PAR_RESP_EN 0x00000040 +#define PCI_SCR_SERR_EN 0x00000100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PCI_SCR_DROP_MODE_EN 0x00008000 +#define PCI_SCR_RX_SERR (0x1 << 16) +#define PCI_SCR_DROP_MODE (0x1 << 17) +#define PCI_SCR_SIG_PAR_ERR (0x1 << 24) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PCI_SCR_SIG_TAR_ABRT (0x1 << 27) +#define PCI_SCR_RX_TAR_ABRT (0x1 << 28) +#define PCI_SCR_SIG_MST_ABRT (0x1 << 29) +#define PCI_SCR_SIG_SERR (0x1 << 30) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PCI_SCR_PAR_ERR (0x1 << 31) +#define KM_CSR_K_WRT_PEND 0x00000001 +#define KM_CSR_M_WRT_PEND 0x00000002 +#define KM_CSR_K_LCB 0x00000004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KM_CSR_M_LCB 0x00000008 +#define KM_CSR_K_DATA 0x00000010 +#define KM_CSR_K_CLK 0x00000020 +#define KM_CSR_K_PULL_DATA 0x00000040 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KM_CSR_K_PULL_CLK 0x00000080 +#define KM_CSR_M_DATA 0x00000100 +#define KM_CSR_M_CLK 0x00000200 +#define KM_CSR_M_PULL_DATA 0x00000400 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KM_CSR_M_PULL_CLK 0x00000800 +#define KM_CSR_EMM_MODE 0x00001000 +#define KM_CSR_SIM_MODE 0x00002000 +#define KM_CSR_K_SM_IDLE 0x00004000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KM_CSR_M_SM_IDLE 0x00008000 +#define KM_CSR_K_TO 0x00010000 +#define KM_CSR_M_TO 0x00020000 +#define KM_CSR_K_TO_EN 0x00040000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KM_CSR_M_TO_EN 0x00080000 +#define KM_CSR_K_CLAMP_ONE 0x00100000 +#define KM_CSR_M_CLAMP_ONE 0x00200000 +#define KM_CSR_K_CLAMP_THREE 0x00400000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KM_CSR_M_CLAMP_THREE 0x00800000 +#define KM_RD_DATA_2 0x000000ff +#define KM_RD_DATA_2_SHIFT 0 +#define KM_RD_DATA_1 0x0000ff00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KM_RD_DATA_1_SHIFT 8 +#define KM_RD_DATA_0 0x00ff0000 +#define KM_RD_DATA_0_SHIFT 16 +#define KM_RD_FRAME_ERR_2 0x01000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KM_RD_FRAME_ERR_1 0x02000000 +#define KM_RD_FRAME_ERR_0 0x04000000 +#define KM_RD_KBD_MSE 0x08000000 +#define KM_RD_OFLO 0x10000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KM_RD_VALID_2 0x20000000 +#define KM_RD_VALID_1 0x40000000 +#define KM_RD_VALID_0 0x80000000 +#define KM_RD_VALID_ALL (KM_RD_VALID_0|KM_RD_VALID_1|KM_RD_VALID_2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KM_WD_WRT_DATA 0x000000ff +#define KM_WD_WRT_DATA_SHIFT 0 +#define RXSB_OVERRUN 0x01 +#define RXSB_PAR_ERR 0x02 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define RXSB_FRAME_ERR 0x04 +#define RXSB_BREAK 0x08 +#define RXSB_CTS 0x10 +#define RXSB_DCD 0x20 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define RXSB_MODEM_VALID 0x40 +#define RXSB_DATA_VALID 0x80 +#define TXCB_INT_WHEN_DONE 0x20 +#define TXCB_INVALID 0x00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TXCB_VALID 0x40 +#define TXCB_MCR 0x80 +#define TXCB_DELAY 0xc0 +#define SBBR_L_SIZE 0x00000001 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SBBR_L_BASE 0xfffff000 +#define SSCR_RX_THRESHOLD 0x000001ff +#define SSCR_TX_TIMER_BUSY 0x00010000 +#define SSCR_HFC_EN 0x00020000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSCR_RX_RING_DCD 0x00040000 +#define SSCR_RX_RING_CTS 0x00080000 +#define SSCR_HIGH_SPD 0x00100000 +#define SSCR_DIAG 0x00200000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSCR_RX_DRAIN 0x08000000 +#define SSCR_DMA_EN 0x10000000 +#define SSCR_DMA_PAUSE 0x20000000 +#define SSCR_PAUSE_STATE 0x40000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SSCR_RESET 0x80000000 +#define PROD_CONS_PTR_4K 0x00000ff8 +#define PROD_CONS_PTR_1K 0x000003f8 +#define PROD_CONS_PTR_OFF 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SRCIR_ARM 0x80000000 +#define SRPIR_BYTE_CNT 0x07000000 +#define SRPIR_BYTE_CNT_SHIFT 24 +#define STCIR_BYTE_CNT 0x0f000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define STCIR_BYTE_CNT_SHIFT 24 +#define SHADOW_DR 0x00000001 +#define SHADOW_OE 0x00000002 +#define SHADOW_PE 0x00000004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHADOW_FE 0x00000008 +#define SHADOW_BI 0x00000010 +#define SHADOW_THRE 0x00000020 +#define SHADOW_TEMT 0x00000040 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHADOW_RFCE 0x00000080 +#define SHADOW_DCTS 0x00010000 +#define SHADOW_DDCD 0x00080000 +#define SHADOW_CTS 0x00100000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHADOW_DCD 0x00800000 +#define SHADOW_DTR 0x01000000 +#define SHADOW_RTS 0x02000000 +#define SHADOW_OUT1 0x04000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SHADOW_OUT2 0x08000000 +#define SHADOW_LOOP 0x10000000 +#define SRTR_CNT 0x00000fff +#define SRTR_CNT_VAL 0x0fff0000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SRTR_CNT_VAL_SHIFT 16 +#define SRTR_HZ 16000 +#define SIO_IR_SA_TX_MT 0x00000001 +#define SIO_IR_SA_RX_FULL 0x00000002 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIO_IR_SA_RX_HIGH 0x00000004 +#define SIO_IR_SA_RX_TIMER 0x00000008 +#define SIO_IR_SA_DELTA_DCD 0x00000010 +#define SIO_IR_SA_DELTA_CTS 0x00000020 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIO_IR_SA_INT 0x00000040 +#define SIO_IR_SA_TX_EXPLICIT 0x00000080 +#define SIO_IR_SA_MEMERR 0x00000100 +#define SIO_IR_SB_TX_MT 0x00000200 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIO_IR_SB_RX_FULL 0x00000400 +#define SIO_IR_SB_RX_HIGH 0x00000800 +#define SIO_IR_SB_RX_TIMER 0x00001000 +#define SIO_IR_SB_DELTA_DCD 0x00002000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIO_IR_SB_DELTA_CTS 0x00004000 +#define SIO_IR_SB_INT 0x00008000 +#define SIO_IR_SB_TX_EXPLICIT 0x00010000 +#define SIO_IR_SB_MEMERR 0x00020000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIO_IR_PP_INT 0x00040000 +#define SIO_IR_PP_INTA 0x00080000 +#define SIO_IR_PP_INTB 0x00100000 +#define SIO_IR_PP_MEMERR 0x00200000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIO_IR_KBD_INT 0x00400000 +#define SIO_IR_RT_INT 0x08000000 +#define SIO_IR_GEN_INT1 0x10000000 +#define SIO_IR_GEN_INT_SHIFT 28 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIO_IR_SA (SIO_IR_SA_TX_MT | SIO_IR_SA_RX_FULL | SIO_IR_SA_RX_HIGH | SIO_IR_SA_RX_TIMER | SIO_IR_SA_DELTA_DCD | SIO_IR_SA_DELTA_CTS | SIO_IR_SA_INT | SIO_IR_SA_TX_EXPLICIT | SIO_IR_SA_MEMERR) +#define SIO_IR_SB (SIO_IR_SB_TX_MT | SIO_IR_SB_RX_FULL | SIO_IR_SB_RX_HIGH | SIO_IR_SB_RX_TIMER | SIO_IR_SB_DELTA_DCD | SIO_IR_SB_DELTA_CTS | SIO_IR_SB_INT | SIO_IR_SB_TX_EXPLICIT | SIO_IR_SB_MEMERR) +#define SIO_IR_PP (SIO_IR_PP_INT | SIO_IR_PP_INTA | SIO_IR_PP_INTB | SIO_IR_PP_MEMERR) +#define SIO_IR_RT (SIO_IR_RT_INT | SIO_IR_GEN_INT1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOC3_PENDING_INTRS(mem) (PCI_INW(&((mem)->sio_ir)) & PCI_INW(&((mem)->sio_ies_ro))) +#define SIO_CR_SIO_RESET 0x00000001 +#define SIO_CR_SER_A_BASE 0x000000fe +#define SIO_CR_SER_A_BASE_SHIFT 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIO_CR_SER_B_BASE 0x00007f00 +#define SIO_CR_SER_B_BASE_SHIFT 8 +#define SIO_SR_CMD_PULSE 0x00078000 +#define SIO_CR_CMD_PULSE_SHIFT 15 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIO_CR_ARB_DIAG 0x00380000 +#define SIO_CR_ARB_DIAG_TXA 0x00000000 +#define SIO_CR_ARB_DIAG_RXA 0x00080000 +#define SIO_CR_ARB_DIAG_TXB 0x00100000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIO_CR_ARB_DIAG_RXB 0x00180000 +#define SIO_CR_ARB_DIAG_PP 0x00200000 +#define SIO_CR_ARB_DIAG_IDLE 0x00400000 +#define INT_OUT_COUNT 0x0000ffff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INT_OUT_MODE 0x00070000 +#define INT_OUT_MODE_0 0x00000000 +#define INT_OUT_MODE_1 0x00040000 +#define INT_OUT_MODE_1PULSE 0x00050000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INT_OUT_MODE_PULSES 0x00060000 +#define INT_OUT_MODE_SQW 0x00070000 +#define INT_OUT_DIAG 0x40000000 +#define INT_OUT_INT_OUT 0x80000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INT_OUT_NS_PER_TICK (30 * 260) +#define INT_OUT_TICKS_PER_PULSE 3 +#define INT_OUT_US_TO_COUNT(x) (((x) * 10 + INT_OUT_NS_PER_TICK / 200) * 100 / INT_OUT_NS_PER_TICK - 1) +#define INT_OUT_COUNT_TO_US(x) (((x) + 1) * INT_OUT_NS_PER_TICK / 1000) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INT_OUT_MIN_TICKS 3 +#define INT_OUT_MAX_TICKS INT_OUT_COUNT +#define GPCR_DIR 0x000000ff +#define GPCR_DIR_PIN(x) (1<<(x)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GPCR_EDGE 0x000f0000 +#define GPCR_EDGE_PIN(x) (1<<((x)+15)) +#define GPCR_INT_OUT_EN 0x00100000 +#define GPCR_MLAN_EN 0x00200000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GPCR_DIR_SERA_XCVR 0x00000080 +#define GPCR_DIR_SERB_XCVR 0x00000040 +#define GPCR_DIR_PHY_RST 0x00000020 +#define GPCR_PHY_RESET 0x20 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GPCR_UARTB_MODESEL 0x40 +#define GPCR_UARTA_MODESEL 0x80 +#define GPPR_PHY_RESET_PIN 5 +#define GPPR_UARTB_MODESEL_PIN 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GPPR_UARTA_MODESEL_PIN 7 +#define EMCR_DUPLEX 0x00000001 +#define EMCR_PROMISC 0x00000002 +#define EMCR_PADEN 0x00000004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EMCR_RXOFF_MASK 0x000001f8 +#define EMCR_RXOFF_SHIFT 3 +#define EMCR_RAMPAR 0x00000200 +#define EMCR_BADPAR 0x00000800 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EMCR_BUFSIZ 0x00001000 +#define EMCR_TXDMAEN 0x00002000 +#define EMCR_TXEN 0x00004000 +#define EMCR_RXDMAEN 0x00008000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EMCR_RXEN 0x00010000 +#define EMCR_LOOPBACK 0x00020000 +#define EMCR_ARB_DIAG 0x001c0000 +#define EMCR_ARB_DIAG_IDLE 0x00200000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EMCR_RST 0x80000000 +#define EISR_RXTIMERINT 0x00000001 +#define EISR_RXTHRESHINT 0x00000002 +#define EISR_RXOFLO 0x00000004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EISR_RXBUFOFLO 0x00000008 +#define EISR_RXMEMERR 0x00000010 +#define EISR_RXPARERR 0x00000020 +#define EISR_TXEMPTY 0x00010000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EISR_TXRTRY 0x00020000 +#define EISR_TXEXDEF 0x00040000 +#define EISR_TXLCOL 0x00080000 +#define EISR_TXGIANT 0x00100000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EISR_TXBUFUFLO 0x00200000 +#define EISR_TXEXPLICIT 0x00400000 +#define EISR_TXCOLLWRAP 0x00800000 +#define EISR_TXDEFERWRAP 0x01000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EISR_TXMEMERR 0x02000000 +#define EISR_TXPARERR 0x04000000 +#define ERCSR_THRESH_MASK 0x000001ff +#define ERCSR_RX_TMR 0x40000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ERCSR_DIAG_OFLO 0x80000000 +#define ERBR_ALIGNMENT 4096 +#define ERBR_L_RXRINGBASE_MASK 0xfffff000 +#define ERBAR_BARRIER_BIT 0x0100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ERBAR_RXBARR_MASK 0xffff0000 +#define ERBAR_RXBARR_SHIFT 16 +#define ERCIR_RXCONSUME_MASK 0x00000fff +#define ERPIR_RXPRODUCE_MASK 0x00000fff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ERPIR_ARM 0x80000000 +#define ERTR_CNT_MASK 0x000007ff +#define ETCSR_IPGT_MASK 0x0000007f +#define ETCSR_IPGR1_MASK 0x00007f00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ETCSR_IPGR1_SHIFT 8 +#define ETCSR_IPGR2_MASK 0x007f0000 +#define ETCSR_IPGR2_SHIFT 16 +#define ETCSR_NOTXCLK 0x80000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ETCDC_COLLCNT_MASK 0x0000ffff +#define ETCDC_DEFERCNT_MASK 0xffff0000 +#define ETCDC_DEFERCNT_SHIFT 16 +#define ETBR_ALIGNMENT (64*1024) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ETBR_L_RINGSZ_MASK 0x00000001 +#define ETBR_L_RINGSZ128 0 +#define ETBR_L_RINGSZ512 1 +#define ETBR_L_TXRINGBASE_MASK 0xffffc000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ETCIR_TXCONSUME_MASK 0x0000ffff +#define ETCIR_IDLE 0x80000000 +#define ETPIR_TXPRODUCE_MASK 0x0000ffff +#define EBIR_TXBUFPROD_MASK 0x0000001f +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EBIR_TXBUFCONS_MASK 0x00001f00 +#define EBIR_TXBUFCONS_SHIFT 8 +#define EBIR_RXBUFPROD_MASK 0x007fc000 +#define EBIR_RXBUFPROD_SHIFT 14 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EBIR_RXBUFCONS_MASK 0xff800000 +#define EBIR_RXBUFCONS_SHIFT 23 +#define MICR_REGADDR_MASK 0x0000001f +#define MICR_PHYADDR_MASK 0x000003e0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MICR_PHYADDR_SHIFT 5 +#define MICR_READTRIG 0x00000400 +#define MICR_BUSY 0x00000800 +#define MIDR_DATA_MASK 0x0000ffff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ERXBUF_IPCKSUM_MASK 0x0000ffff +#define ERXBUF_BYTECNT_MASK 0x07ff0000 +#define ERXBUF_BYTECNT_SHIFT 16 +#define ERXBUF_V 0x80000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ERXBUF_CRCERR 0x00000001 +#define ERXBUF_FRAMERR 0x00000002 +#define ERXBUF_CODERR 0x00000004 +#define ERXBUF_INVPREAMB 0x00000008 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ERXBUF_LOLEN 0x00007000 +#define ERXBUF_HILEN 0x03ff0000 +#define ERXBUF_MULTICAST 0x04000000 +#define ERXBUF_BROADCAST 0x08000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ERXBUF_LONGEVENT 0x10000000 +#define ERXBUF_BADPKT 0x20000000 +#define ERXBUF_GOODPKT 0x40000000 +#define ERXBUF_CARRIER 0x80000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ETXD_BYTECNT_MASK 0x000007ff +#define ETXD_INTWHENDONE 0x00001000 +#define ETXD_D0V 0x00010000 +#define ETXD_B1V 0x00020000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ETXD_B2V 0x00040000 +#define ETXD_DOCHECKSUM 0x00080000 +#define ETXD_CHKOFF_MASK 0x07f00000 +#define ETXD_CHKOFF_SHIFT 20 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ETXD_D0CNT_MASK 0x0000007f +#define ETXD_B1CNT_MASK 0x0007ff00 +#define ETXD_B1CNT_SHIFT 8 +#define ETXD_B2CNT_MASK 0x7ff00000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ETXD_B2CNT_SHIFT 20 +typedef enum ioc3_subdevs_e { + ioc3_subdev_ether, + ioc3_subdev_generic, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ioc3_subdev_nic, + ioc3_subdev_kbms, + ioc3_subdev_ttya, + ioc3_subdev_ttyb, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ioc3_subdev_ecpp, + ioc3_subdev_rt, + ioc3_nsubdevs +} ioc3_subdev_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOC3_SDB_ETHER (1<<ioc3_subdev_ether) +#define IOC3_SDB_GENERIC (1<<ioc3_subdev_generic) +#define IOC3_SDB_NIC (1<<ioc3_subdev_nic) +#define IOC3_SDB_KBMS (1<<ioc3_subdev_kbms) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOC3_SDB_TTYA (1<<ioc3_subdev_ttya) +#define IOC3_SDB_TTYB (1<<ioc3_subdev_ttyb) +#define IOC3_SDB_ECPP (1<<ioc3_subdev_ecpp) +#define IOC3_SDB_RT (1<<ioc3_subdev_rt) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOC3_ALL_SUBDEVS ((1<<ioc3_nsubdevs)-1) +#define IOC3_SDB_SERIAL (IOC3_SDB_TTYA|IOC3_SDB_TTYB) +#define IOC3_STD_SUBDEVS IOC3_ALL_SUBDEVS +#define IOC3_INTA_SUBDEVS IOC3_SDB_ETHER +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IOC3_INTB_SUBDEVS (IOC3_SDB_GENERIC|IOC3_SDB_KBMS|IOC3_SDB_SERIAL|IOC3_SDB_ECPP|IOC3_SDB_RT) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sn/kldir.h b/9/platforms/android-16/arch-mips/usr/include/asm/sn/kldir.h new file mode 100644 index 0000000..6c663ca --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sn/kldir.h @@ -0,0 +1,93 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SN_KLDIR_H +#define _ASM_SN_KLDIR_H +#define KLDIR_MAGIC 0x434d5f53505f5357 +#ifdef __ASSEMBLY__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KLDIR_OFF_MAGIC 0x00 +#define KLDIR_OFF_OFFSET 0x08 +#define KLDIR_OFF_POINTER 0x10 +#define KLDIR_OFF_SIZE 0x18 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KLDIR_OFF_COUNT 0x20 +#define KLDIR_OFF_STRIDE 0x28 +#endif +#define SYMMON_STACK_SIZE 0x8000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifdef PROM +#define IP27_LAUNCH_OFFSET 0x2400 +#define IP27_LAUNCH_SIZE 0x400 +#define IP27_LAUNCH_COUNT 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27_LAUNCH_STRIDE 0x200 +#define IP27_KLCONFIG_OFFSET 0x4000 +#define IP27_KLCONFIG_SIZE 0xc000 +#define IP27_KLCONFIG_COUNT 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27_KLCONFIG_STRIDE 0 +#define IP27_NMI_OFFSET 0x3000 +#define IP27_NMI_SIZE 0x40 +#define IP27_NMI_COUNT 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27_NMI_STRIDE 0x40 +#define IP27_PI_ERROR_OFFSET 0x12000 +#define IP27_PI_ERROR_SIZE 0x4000 +#define IP27_PI_ERROR_COUNT 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27_PI_ERROR_STRIDE 0 +#define IP27_SYMMON_STK_OFFSET 0x25000 +#define IP27_SYMMON_STK_SIZE 0xe000 +#define IP27_SYMMON_STK_COUNT 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27_SYMMON_STK_STRIDE 0x7000 +#define IP27_FREEMEM_OFFSET 0x19000 +#define IP27_FREEMEM_SIZE -1 +#define IP27_FREEMEM_COUNT 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27_FREEMEM_STRIDE 0 +#endif +#define IO6_GDA_OFFSET 0x11000 +#define IO6_GDA_SIZE 0x400 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO6_GDA_COUNT 1 +#define IO6_GDA_STRIDE 0 +#define IP27_NMI_KREGS_OFFSET 0x11400 +#define IP27_NMI_KREGS_CPU_SIZE 0x200 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27_NMI_EFRAME_OFFSET 0x11800 +#define IP27_NMI_EFRAME_SIZE 0x200 +#define KLDIR_ENT_SIZE 0x40 +#define KLDIR_MAX_ENTRIES (0x400 / 0x40) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef __ASSEMBLY__ +typedef struct kldir_ent_s { + u64 magic; + off_t offset; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long pointer; + size_t size; + u64 count; + size_t stride; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + char rsvd[16]; +} kldir_ent_t; +#endif +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sn/klkernvars.h b/9/platforms/android-16/arch-mips/usr/include/asm/sn/klkernvars.h new file mode 100644 index 0000000..a0c7512 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sn/klkernvars.h @@ -0,0 +1,39 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_SN_KLKERNVARS_H +#define __ASM_SN_KLKERNVARS_H +#define KV_MAGIC_OFFSET 0x0 +#define KV_RO_NASID_OFFSET 0x4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KV_RW_NASID_OFFSET 0x6 +#define KV_MAGIC 0x5f4b565f +#ifndef __ASSEMBLY__ +#include <asm/sn/types.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef struct kern_vars_s { + int kv_magic; + nasid_t kv_ro_nasid; + nasid_t kv_rw_nasid; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long kv_ro_baseaddr; + unsigned long kv_rw_baseaddr; +} kern_vars_t; +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/addrs.h b/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/addrs.h new file mode 100644 index 0000000..5c056ed --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/addrs.h @@ -0,0 +1,174 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SN_SN0_ADDRS_H +#define _ASM_SN_SN0_ADDRS_H +#define NODE_SIZE_BITS 32 +#define BWIN_SIZE_BITS 29 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NASID_BITMASK (0xffLL) +#define NASID_BITS 8 +#define NASID_SHFT 32 +#define NASID_META_BITS 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NASID_LOCAL_BITS 4 +#define BDDIR_UPPER_MASK (UINT64_CAST 0xfffff << 10) +#define BDECC_UPPER_MASK (UINT64_CAST 0x7ffffff << 3) +#define NODE_ADDRSPACE_SIZE (UINT64_CAST 1 << NODE_SIZE_BITS) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NASID_MASK (UINT64_CAST NASID_BITMASK << NASID_SHFT) +#define NASID_GET(_pa) (int) ((UINT64_CAST (_pa) >> NASID_SHFT) & NASID_BITMASK) +#ifndef __ASSEMBLY__ +#define NODE_SWIN_BASE(nasid, widget) ((widget == 0) ? NODE_BWIN_BASE((nasid), SWIN0_BIGWIN) : RAW_NODE_SWIN_BASE(nasid, widget)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#else +#define NODE_SWIN_BASE(nasid, widget) (NODE_IO_BASE(nasid) + (UINT64_CAST(widget) << SWIN_SIZE_BITS)) +#endif +#define BWIN_INDEX_BITS 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BWIN_SIZE (UINT64_CAST 1 << BWIN_SIZE_BITS) +#define BWIN_SIZEMASK (BWIN_SIZE - 1) +#define BWIN_WIDGET_MASK 0x7 +#define NODE_BWIN_BASE0(nasid) (NODE_IO_BASE(nasid) + BWIN_SIZE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NODE_BWIN_BASE(nasid, bigwin) (NODE_BWIN_BASE0(nasid) + (UINT64_CAST(bigwin) << BWIN_SIZE_BITS)) +#define BWIN_WIDGETADDR(addr) ((addr) & BWIN_SIZEMASK) +#define BWIN_WINDOWNUM(addr) (((addr) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK) +#define NODE_BWIN_ADDR(nasid, addr) (((addr) >= NODE_BWIN_BASE0(nasid)) && ((addr) < (NODE_BWIN_BASE(nasid, HUB_NUM_BIG_WINDOW) + BWIN_SIZE))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CALIAS_BASE CAC_BASE +#define BRIDGE_REG_PTR(_base, _off) ((volatile bridgereg_t *) ((__psunsigned_t)(_base) + (__psunsigned_t)(_off))) +#define SN0_WIDGET_BASE(_nasid, _wid) (NODE_SWIN_BASE((_nasid), (_wid))) +#define SABLE_LOG_TRIGGER(_map) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef __ASSEMBLY__ +#define KERN_NMI_ADDR(nasid, slice) TO_NODE_UNCAC((nasid), IP27_NMI_KREGS_OFFSET + (IP27_NMI_KREGS_CPU_SIZE * (slice))) +#endif +#ifdef PROM +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MISC_PROM_BASE PHYS_TO_K0(0x01300000) +#define MISC_PROM_SIZE 0x200000 +#define DIAG_BASE PHYS_TO_K0(0x01500000) +#define DIAG_SIZE 0x300000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ROUTE_BASE PHYS_TO_K0(0x01800000) +#define ROUTE_SIZE 0x200000 +#define IP27PROM_FLASH_HDR PHYS_TO_K0(0x01300000) +#define IP27PROM_FLASH_DATA PHYS_TO_K0(0x01301000) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27PROM_CORP_MAX 32 +#define IP27PROM_CORP PHYS_TO_K0(0x01800000) +#define IP27PROM_CORP_SIZE 0x10000 +#define IP27PROM_CORP_STK PHYS_TO_K0(0x01810000) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27PROM_CORP_STKSIZE 0x2000 +#define IP27PROM_DECOMP_BUF PHYS_TO_K0(0x01900000) +#define IP27PROM_DECOMP_SIZE 0xfff00 +#define IP27PROM_BASE PHYS_TO_K0(0x01a00000) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27PROM_BASE_MAPPED (UNCAC_BASE | 0x1fc00000) +#define IP27PROM_SIZE_MAX 0x100000 +#define IP27PROM_PCFG PHYS_TO_K0(0x01b00000) +#define IP27PROM_PCFG_SIZE 0xd0000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27PROM_ERRDMP PHYS_TO_K1(0x01bd0000) +#define IP27PROM_ERRDMP_SIZE 0xf000 +#define IP27PROM_INIT_START PHYS_TO_K1(0x01bd0000) +#define IP27PROM_CONSOLE PHYS_TO_K1(0x01bdf000) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27PROM_CONSOLE_SIZE 0x200 +#define IP27PROM_NETUART PHYS_TO_K1(0x01bdf200) +#define IP27PROM_NETUART_SIZE 0x100 +#define IP27PROM_UNUSED1 PHYS_TO_K1(0x01bdf300) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27PROM_UNUSED1_SIZE 0x500 +#define IP27PROM_ELSC_BASE_A PHYS_TO_K0(0x01bdf800) +#define IP27PROM_ELSC_BASE_B PHYS_TO_K0(0x01bdfc00) +#define IP27PROM_STACK_A PHYS_TO_K0(0x01be0000) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27PROM_STACK_B PHYS_TO_K0(0x01bf0000) +#define IP27PROM_STACK_SHFT 16 +#define IP27PROM_STACK_SIZE (1 << IP27PROM_STACK_SHFT) +#define IP27PROM_INIT_END PHYS_TO_K0(0x01c00000) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SLAVESTACK_BASE PHYS_TO_K0(0x01580000) +#define SLAVESTACK_SIZE 0x40000 +#define ENETBUFS_BASE PHYS_TO_K0(0x01f80000) +#define ENETBUFS_SIZE 0x20000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO6PROM_BASE PHYS_TO_K0(0x01c00000) +#define IO6PROM_SIZE 0x400000 +#define IO6PROM_BASE_MAPPED (UNCAC_BASE | 0x11c00000) +#define IO6DPROM_BASE PHYS_TO_K0(0x01c00000) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IO6DPROM_SIZE 0x200000 +#define NODEBUGUNIX_ADDR PHYS_TO_K0(0x00019000) +#define DEBUGUNIX_ADDR PHYS_TO_K0(0x00100000) +#define IP27PROM_INT_LAUNCH 10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27PROM_INT_NETUART 12 +#endif +#define IP27PROM_ELSC_SHFT 10 +#define IP27PROM_ELSC_SIZE (1 << IP27PROM_ELSC_SHFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FREEMEM_BASE PHYS_TO_K0(0x2000000) +#define IO6PROM_STACK_SHFT 14 +#define IO6PROM_STACK_SIZE (1 << IO6PROM_STACK_SHFT) +#define IP27PROM_ENTRY PHYS_TO_COMPATK1(0x1fc00000) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27PROM_RESTART PHYS_TO_COMPATK1(0x1fc00008) +#define IP27PROM_SLAVELOOP PHYS_TO_COMPATK1(0x1fc00010) +#define IP27PROM_PODMODE PHYS_TO_COMPATK1(0x1fc00018) +#define IP27PROM_IOC3UARTPOD PHYS_TO_COMPATK1(0x1fc00020) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27PROM_FLASHLEDS PHYS_TO_COMPATK1(0x1fc00028) +#define IP27PROM_REPOD PHYS_TO_COMPATK1(0x1fc00030) +#define IP27PROM_LAUNCHSLAVE PHYS_TO_COMPATK1(0x1fc00038) +#define IP27PROM_WAITSLAVE PHYS_TO_COMPATK1(0x1fc00040) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IP27PROM_POLLSLAVE PHYS_TO_COMPATK1(0x1fc00048) +#define KL_UART_BASE LOCAL_HUB_ADDR(MD_UREG0_0) +#define KL_UART_CMD LOCAL_HUB_ADDR(MD_UREG0_0) +#define KL_UART_DATA LOCAL_HUB_ADDR(MD_UREG0_1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KL_I2C_REG MD_UREG0_0 +#ifndef __ASSEMBLY__ +#ifdef HUB_ERR_STS_WAR +#define CACHE_ERR_EFRAME 0x480 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#else +#define CACHE_ERR_EFRAME 0x400 +#endif +#define CACHE_ERR_ECCFRAME (CACHE_ERR_EFRAME + EF_SIZE) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CACHE_ERR_SP_PTR (0x1000 - 32) +#define CACHE_ERR_IBASE_PTR (0x1000 - 40) +#define CACHE_ERR_SP (CACHE_ERR_SP_PTR - 16) +#define CACHE_ERR_AREA_SIZE (ARCS_SPB_OFFSET - CACHE_ERR_EFRAME) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define _ARCSPROM +#ifdef HUB_ERR_STS_WAR +#define ERR_STS_WAR_REGISTER IIO_IIBUSERR +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ERR_STS_WAR_ADDR LOCAL_HUB_ADDR(IIO_IIBUSERR) +#define ERR_STS_WAR_PHYSADDR TO_PHYS((__psunsigned_t)ERR_STS_WAR_ADDR) +#define OLD_ERR_STS_WAR_OFFSET ((MD_MEM_BANKS * MD_BANK_SIZE) - 0x100) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/hubio.h b/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/hubio.h new file mode 100644 index 0000000..f593233 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/hubio.h @@ -0,0 +1,788 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SGI_SN_SN0_HUBIO_H +#define _ASM_SGI_SN_SN0_HUBIO_H +#define IIO_WIDGET IIO_WID +#define IIO_WIDGET_STAT IIO_WSTAT +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_WIDGET_CTRL IIO_WCR +#define IIO_WIDGET_TOUT IIO_WRTO +#define IIO_WIDGET_FLUSH IIO_WTFR +#define IIO_PROTECT IIO_ILAPR +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_PROTECT_OVRRD IIO_ILAPO +#define IIO_OUTWIDGET_ACCESS IIO_IOWA +#define IIO_INWIDGET_ACCESS IIO_IIWA +#define IIO_INDEV_ERR_MASK IIO_IIDEM +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_LLP_CSR IIO_ILCSR +#define IIO_LLP_LOG IIO_ILLR +#define IIO_XTALKCC_TOUT IIO_IXCC +#define IIO_XTALKTT_TOUT IIO_IXTT +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IO_ERR_CLR IIO_IECLR +#define IIO_BTE_CRB_CNT IIO_IBCN +#define IIO_LLP_CSR_IS_UP 0x00002000 +#define IIO_LLP_CSR_LLP_STAT_MASK 0x00003000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_LLP_CSR_LLP_STAT_SHFT 12 +#define IIO_PROTECT_OVRRD_KEY 0x53474972756c6573ull +#define IIO_BTE_STAT_0 IIO_IBLS_0 +#define IIO_BTE_SRC_0 IIO_IBSA_0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_BTE_DEST_0 IIO_IBDA_0 +#define IIO_BTE_CTRL_0 IIO_IBCT_0 +#define IIO_BTE_NOTIFY_0 IIO_IBNA_0 +#define IIO_BTE_INT_0 IIO_IBIA_0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_BTE_OFF_0 0 +#define IIO_BTE_OFF_1 IIO_IBLS_1 - IIO_IBLS_0 +#define BTEOFF_STAT 0 +#define BTEOFF_SRC (IIO_BTE_SRC_0 - IIO_BTE_STAT_0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BTEOFF_DEST (IIO_BTE_DEST_0 - IIO_BTE_STAT_0) +#define BTEOFF_CTRL (IIO_BTE_CTRL_0 - IIO_BTE_STAT_0) +#define BTEOFF_NOTIFY (IIO_BTE_NOTIFY_0 - IIO_BTE_STAT_0) +#define BTEOFF_INT (IIO_BTE_INT_0 - IIO_BTE_STAT_0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_BASE 0x400000 +#define IIO_BASE_BTE0 0x410000 +#define IIO_BASE_BTE1 0x420000 +#define IIO_BASE_PERF 0x430000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_PERF_CNT 0x430008 +#define IO_PERF_SETS 32 +#define IIO_WID 0x400000 +#define IIO_WSTAT 0x400008 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_WCR 0x400020 +#define IIO_WSTAT_ECRAZY (1ULL << 32) +#define IIO_WSTAT_TXRETRY (1ULL << 9) +#define IIO_WSTAT_TXRETRY_MASK (0x7F) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_WSTAT_TXRETRY_SHFT (16) +#define IIO_WSTAT_TXRETRY_CNT(w) (((w) >> IIO_WSTAT_TXRETRY_SHFT) & IIO_WSTAT_TXRETRY_MASK) +#define IIO_ILAPR 0x400100 +#define IIO_ILAPO 0x400108 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IOWA 0x400110 +#define IIO_IIWA 0x400118 +#define IIO_IIDEM 0x400120 +#define IIO_ILCSR 0x400128 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ILLR 0x400130 +#define IIO_IIDSR 0x400138 +#define IIO_IIBUSERR 0x1400208 +#define IIO_IIDSR_SENT_SHIFT 28 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IIDSR_SENT_MASK 0x10000000 +#define IIO_IIDSR_ENB_SHIFT 24 +#define IIO_IIDSR_ENB_MASK 0x01000000 +#define IIO_IIDSR_NODE_SHIFT 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IIDSR_NODE_MASK 0x0000ff00 +#define IIO_IIDSR_LVL_SHIFT 0 +#define IIO_IIDSR_LVL_MASK 0x0000003f +#define IIO_IGFX_0 0x400140 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IGFX_1 0x400148 +#define IIO_IGFX_W_NUM_BITS 4 +#define IIO_IGFX_W_NUM_MASK ((1<<IIO_IGFX_W_NUM_BITS)-1) +#define IIO_IGFX_W_NUM_SHIFT 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IGFX_N_NUM_BITS 9 +#define IIO_IGFX_N_NUM_MASK ((1<<IIO_IGFX_N_NUM_BITS)-1) +#define IIO_IGFX_N_NUM_SHIFT 4 +#define IIO_IGFX_P_NUM_BITS 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IGFX_P_NUM_MASK ((1<<IIO_IGFX_P_NUM_BITS)-1) +#define IIO_IGFX_P_NUM_SHIFT 16 +#define IIO_IGFX_VLD_BITS 1 +#define IIO_IGFX_VLD_MASK ((1<<IIO_IGFX_VLD_BITS)-1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IGFX_VLD_SHIFT 20 +#define IIO_IGFX_INIT(widget, node, cpu, valid) ( (((widget) & IIO_IGFX_W_NUM_MASK) << IIO_IGFX_W_NUM_SHIFT) | (((node) & IIO_IGFX_N_NUM_MASK) << IIO_IGFX_N_NUM_SHIFT) | (((cpu) & IIO_IGFX_P_NUM_MASK) << IIO_IGFX_P_NUM_SHIFT) | (((valid) & IIO_IGFX_VLD_MASK) << IIO_IGFX_VLD_SHIFT) ) +#define IIO_SCRATCH_REG0 0x400150 +#define IIO_SCRATCH_REG1 0x400158 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_SCRATCH_MASK 0x0000000f00f11fff +#define IIO_SCRATCH_BIT0_0 0x0000000800000000 +#define IIO_SCRATCH_BIT0_1 0x0000000400000000 +#define IIO_SCRATCH_BIT0_2 0x0000000200000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_SCRATCH_BIT0_3 0x0000000100000000 +#define IIO_SCRATCH_BIT0_4 0x0000000000800000 +#define IIO_SCRATCH_BIT0_5 0x0000000000400000 +#define IIO_SCRATCH_BIT0_6 0x0000000000200000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_SCRATCH_BIT0_7 0x0000000000100000 +#define IIO_SCRATCH_BIT0_8 0x0000000000010000 +#define IIO_SCRATCH_BIT0_9 0x0000000000001000 +#define IIO_SCRATCH_BIT0_R 0x0000000000000fff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_NUM_ITTES 7 +#define HUB_NUM_BIG_WINDOW IIO_NUM_ITTES - 1 +#define SWIN0_BIGWIN HUB_NUM_BIG_WINDOW +#define ILCSR_WARM_RESET 0x100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef __ASSEMBLY__ +typedef union hubii_wid_u { + u64 wid_reg_value; + struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 wid_rsvd: 32, + wid_rev_num: 4, + wid_part_num: 16, + wid_mfg_num: 11, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + wid_rsvd1: 1; + } wid_fields_s; +} hubii_wid_t; +typedef union hubii_wcr_u { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 wcr_reg_value; + struct { + u64 wcr_rsvd: 41, + wcr_e_thresh: 5, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + wcr_dir_con: 1, + wcr_f_bad_pkt: 1, + wcr_xbar_crd: 3, + wcr_rsvd1: 8, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + wcr_tag_mode: 1, + wcr_widget_id: 4; + } wcr_fields_s; +} hubii_wcr_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define iwcr_dir_con wcr_fields_s.wcr_dir_con +typedef union hubii_wstat_u { + u64 reg_value; + struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 rsvd1: 31, + crazy: 1, + rsvd2: 8, + llp_tx_cnt: 8, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + rsvd3: 6, + tx_max_rtry: 1, + rsvd4: 2, + xt_tail_to: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + xt_crd_to: 1, + pending: 4; + } wstat_fields_s; +} hubii_wstat_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef union hubii_ilcsr_u { + u64 icsr_reg_value; + struct { + u64 icsr_rsvd: 22, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + icsr_max_burst: 10, + icsr_rsvd4: 6, + icsr_max_retry: 10, + icsr_rsvd3: 2, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + icsr_lnk_stat: 2, + icsr_bm8: 1, + icsr_llp_en: 1, + icsr_rsvd2: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + icsr_wrm_reset: 1, + icsr_rsvd1: 2, + icsr_null_to: 6; + } icsr_fields_s; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +} hubii_ilcsr_t; +typedef union hubii_iowa_u { + u64 iowa_reg_value; + struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 iowa_rsvd: 48, + iowa_wxoac: 8, + iowa_rsvd1: 7, + iowa_w0oac: 1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } iowa_fields_s; +} hubii_iowa_t; +typedef union hubii_iiwa_u { + u64 iiwa_reg_value; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct { + u64 iiwa_rsvd: 48, + iiwa_wxiac: 8, + iiwa_rsvd1: 7, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + iiwa_w0iac: 1; + } iiwa_fields_s; +} hubii_iiwa_t; +typedef union hubii_illr_u { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 illr_reg_value; + struct { + u64 illr_rsvd: 32, + illr_cb_cnt: 16, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + illr_sn_cnt: 16; + } illr_fields_s; +} hubii_illr_t; +typedef union io_perf_sel { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 perf_sel_reg; + struct { + u64 perf_rsvd : 48, + perf_icct : 8, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + perf_ippr1 : 4, + perf_ippr0 : 4; + } perf_sel_bits; +} io_perf_sel_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef union io_perf_cnt { + u64 perf_cnt; + struct { + u64 perf_rsvd1 : 32, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + perf_rsvd2 : 12, + perf_cnt : 20; + } perf_cnt_bits; +} io_perf_cnt_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define LNK_STAT_WORKING 0x2 +#define IIO_LLP_CB_MAX 0xffff +#define IIO_LLP_SN_MAX 0xffff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_NUM_IPRBS (9) +#define IIO_IOPRB_0 0x400198 +#define IIO_IOPRB_8 0x4001a0 +#define IIO_IOPRB_9 0x4001a8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IOPRB_A 0x4001b0 +#define IIO_IOPRB_B 0x4001b8 +#define IIO_IOPRB_C 0x4001c0 +#define IIO_IOPRB_D 0x4001c8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IOPRB_E 0x4001d0 +#define IIO_IOPRB_F 0x4001d8 +#define IIO_IXCC 0x4001e0 +#define IIO_IXTCC IIO_IXCC +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IMEM 0x4001e8 +#define IIO_IXTT 0x4001f0 +#define IIO_IECLR 0x4001f8 +#define IIO_IBCN 0x400200 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IMEM_W0ESD 0x1 +#define IIO_IMEM_B0ESD (1 << 4) +#define IIO_IMEM_B1ESD (1 << 8) +#define IIO_IPCA 0x400300 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_NUM_PRTES 8 +#define IIO_PRTE_0 0x400308 +#define IIO_PRTE(_x) (IIO_PRTE_0 + (8 * (_x))) +#define IIO_WIDPRTE(x) IIO_PRTE(((x) - 8)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IPDR 0x400388 +#define IIO_ICDR 0x400390 +#define IIO_IFDR 0x400398 +#define IIO_IIAP 0x4003a0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IMMR IIO_IIAP +#define IIO_ICMR 0x4003a8 +#define IIO_ICCR 0x4003b0 +#define IIO_ICTO 0x4003b8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICTP 0x4003c0 +#define IIO_ICMR_PC_VLD_SHFT 36 +#define IIO_ICMR_PC_VLD_MASK (0x7fffUL << IIO_ICMR_PC_VLD_SHFT) +#define IIO_ICMR_CRB_VLD_SHFT 20 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICMR_CRB_VLD_MASK (0x7fffUL << IIO_ICMR_CRB_VLD_SHFT) +#define IIO_ICMR_FC_CNT_SHFT 16 +#define IIO_ICMR_FC_CNT_MASK (0xf << IIO_ICMR_FC_CNT_SHFT) +#define IIO_ICMR_C_CNT_SHFT 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICMR_C_CNT_MASK (0xf << IIO_ICMR_C_CNT_SHFT) +#define IIO_ICMR_P_CNT_SHFT 0 +#define IIO_ICMR_P_CNT_MASK (0xf << IIO_ICMR_P_CNT_SHFT) +#define IIO_ICMR_PRECISE (1UL << 52) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICMR_CLR_RPPD (1UL << 13) +#define IIO_ICMR_CLR_RQPD (1UL << 12) +#define IIO_IPDR_PND (1 << 4) +#define IIO_ICDR_PND (1 << 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICCR_PENDING (0x10000) +#define IIO_ICCR_CMD_MASK (0xFF) +#define IIO_ICCR_CMD_SHFT (7) +#define IIO_ICCR_CMD_NOP (0x0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICCR_CMD_WAKE (0x100) +#define IIO_ICCR_CMD_TIMEOUT (0x200) +#define IIO_ICCR_CMD_EJECT (0x400) +#define IIO_ICCR_CMD_FLUSH (0x800) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_NUM_CRBS 15 +#define IIO_NUM_NORMAL_CRBS 12 +#define IIO_NUM_PC_CRBS 4 +#define IIO_ICRB_OFFSET 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICRB_0 0x400400 +#define IIO_ICRB_A(_x) (IIO_ICRB_0 + (4 * IIO_ICRB_OFFSET * (_x))) +#define IIO_ICRB_B(_x) (IIO_ICRB_A(_x) + 1*IIO_ICRB_OFFSET) +#define IIO_ICRB_C(_x) (IIO_ICRB_A(_x) + 2*IIO_ICRB_OFFSET) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICRB_D(_x) (IIO_ICRB_A(_x) + 3*IIO_ICRB_OFFSET) +#ifndef __ASSEMBLY__ +typedef union icrba_u { + u64 reg_value; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct { + u64 resvd: 6, + stall_bte0: 1, + stall_bte1: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + error: 1, + ecode: 3, + lnetuce: 1, + mark: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + xerr: 1, + sidn: 4, + tnum: 5, + addr: 38, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + valid: 1, + iow: 1; + } icrba_fields_s; +} icrba_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef union h1_icrba_u { + u64 reg_value; + struct { + u64 resvd: 6, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unused: 1, + error: 1, + ecode: 4, + lnetuce: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + mark: 1, + xerr: 1, + sidn: 4, + tnum: 5, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + addr: 38, + valid: 1, + iow: 1; + } h1_icrba_fields_s; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +} h1_icrba_t; +#define ICRBN_A_CERR_SHFT 54 +#define ICRBN_A_ERR_MASK 0x3ff +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICRB_ADDR_SHFT 2 +#define IIO_ICRB_ECODE_DERR 0 +#define IIO_ICRB_ECODE_PERR 1 +#define IIO_ICRB_ECODE_WERR 2 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICRB_ECODE_AERR 3 +#define IIO_ICRB_ECODE_PWERR 4 +#define IIO_ICRB_ECODE_PRERR 5 +#define IIO_ICRB_ECODE_TOUT 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICRB_ECODE_XTERR 7 +#ifndef __ASSEMBLY__ +typedef union icrbb_u { + u64 reg_value; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct { + u64 rsvd1: 5, + btenum: 1, + cohtrans: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + xtsize: 2, + srcnode: 9, + srcinit: 2, + useold: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + imsgtype: 2, + imsg: 8, + initator: 3, + reqtype: 5, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + rsvd2: 7, + ackcnt: 11, + resp: 1, + ack: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + hold: 1, + wb_pend:1, + intvn: 1, + stall_ib: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + stall_intr: 1; + } icrbb_field_s; +} icrbb_t; +typedef union h1_icrbb_u { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 reg_value; + struct { + u64 rsvd1: 5, + btenum: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + cohtrans: 1, + xtsize: 2, + srcnode: 9, + srcinit: 2, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + useold: 1, + imsgtype: 2, + imsg: 8, + initator: 3, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + rsvd2: 1, + pcache: 1, + reqtype: 5, + stl_ib: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + stl_intr: 1, + stl_bte0: 1, + stl_bte1: 1, + intrvn: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ackcnt: 11, + resp: 1, + ack: 1, + hold: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + wb_pend:1, + sleep: 1, + pnd_reply: 1, + pnd_req: 1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } h1_icrbb_field_s; +} h1_icrbb_t; +#define b_imsgtype icrbb_field_s.imsgtype +#define b_btenum icrbb_field_s.btenum +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define b_cohtrans icrbb_field_s.cohtrans +#define b_xtsize icrbb_field_s.xtsize +#define b_srcnode icrbb_field_s.srcnode +#define b_srcinit icrbb_field_s.srcinit +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define b_imsgtype icrbb_field_s.imsgtype +#define b_imsg icrbb_field_s.imsg +#define b_initiator icrbb_field_s.initiator +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICRB_XTSIZE_DW 0 +#define IIO_ICRB_XTSIZE_32 1 +#define IIO_ICRB_XTSIZE_128 2 +#define IIO_ICRB_PROC0 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICRB_PROC1 1 +#define IIO_ICRB_GB_REQ 2 +#define IIO_ICRB_IO_REQ 3 +#define IIO_ICRB_IMSGT_XTALK 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICRB_IMSGT_BTE 1 +#define IIO_ICRB_IMSGT_SN0NET 2 +#define IIO_ICRB_IMSGT_CRB 3 +#define IIO_ICRB_INIT_XTALK 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICRB_INIT_BTE0 0x1 +#define IIO_ICRB_INIT_SN0NET 0x2 +#define IIO_ICRB_INIT_CRB 0x3 +#define IIO_ICRB_INIT_BTE1 0x5 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICRB_REQ_DWRD 0 +#define IIO_ICRB_REQ_QCLRD 1 +#define IIO_ICRB_REQ_BLKRD 2 +#define IIO_ICRB_REQ_RSHU 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICRB_REQ_REXU 7 +#define IIO_ICRB_REQ_RDEX 8 +#define IIO_ICRB_REQ_WINC 9 +#define IIO_ICRB_REQ_BWINV 10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICRB_REQ_PIORD 11 +#define IIO_ICRB_REQ_PIOWR 12 +#define IIO_ICRB_REQ_PRDM 13 +#define IIO_ICRB_REQ_PWRM 14 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_ICRB_REQ_PTPWR 15 +#define IIO_ICRB_REQ_WB 16 +#define IIO_ICRB_REQ_DEX 17 +#ifndef __ASSEMBLY__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef union icrbc_s { + u64 reg_value; + struct { + u64 rsvd: 6, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + sleep: 1, + pricnt: 4, + pripsc: 4, + bteop: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + push_be: 34, + suppl: 11, + barrop: 1, + doresp: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + gbr: 1; + } icrbc_field_s; +} icrbc_t; +#define c_pricnt icrbc_field_s.pricnt +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define c_pripsc icrbc_field_s.pripsc +#define c_bteop icrbc_field_s.bteop +#define c_bteaddr icrbc_field_s.push_be +#define c_benable icrbc_field_s.push_be +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define c_suppl icrbc_field_s.suppl +#define c_barrop icrbc_field_s.barrop +#define c_doresp icrbc_field_s.doresp +#define c_gbr icrbc_field_s.gbr +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef __ASSEMBLY__ +typedef union icrbd_s { + u64 reg_value; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct { + u64 rsvd: 38, + toutvld: 1, + ctxtvld: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + rsvd2: 1, + context: 15, + timeout: 8; + } icrbd_field_s; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +} icrbd_t; +#define icrbd_toutvld icrbd_field_s.toutvld +#define icrbd_ctxtvld icrbd_field_s.ctxtvld +#define icrbd_context icrbd_field_s.context +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef union hubii_ifdr_u { + u64 hi_ifdr_value; + struct { + u64 ifdr_rsvd: 49, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ifdr_maxrp: 7, + ifdr_rsvd1: 1, + ifdr_maxrq: 7; + } hi_ifdr_fields; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +} hubii_ifdr_t; +#endif +#define IIO_IBLS_0 0x410000 +#define IIO_IBSA_0 0x410008 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IBDA_0 0x410010 +#define IIO_IBCT_0 0x410018 +#define IIO_IBNA_0 0x410020 +#define IIO_IBNR_0 IIO_IBNA_0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IBIA_0 0x410028 +#define IIO_IBLS_1 0x420000 +#define IIO_IBSA_1 0x420008 +#define IIO_IBDA_1 0x420010 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IBCT_1 0x420018 +#define IIO_IBNA_1 0x420020 +#define IIO_IBNR_1 IIO_IBNA_1 +#define IIO_IBIA_1 0x420028 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_IPCR 0x430000 +#define IIO_IPPR 0x430008 +#define IECLR_BTE1 (1 << 18) +#define IECLR_BTE0 (1 << 17) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IECLR_CRAZY (1 << 16) +#define IECLR_PRB_F (1 << 15) +#define IECLR_PRB_E (1 << 14) +#define IECLR_PRB_D (1 << 13) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IECLR_PRB_C (1 << 12) +#define IECLR_PRB_B (1 << 11) +#define IECLR_PRB_A (1 << 10) +#define IECLR_PRB_9 (1 << 9) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IECLR_PRB_8 (1 << 8) +#define IECLR_PRB_0 (1 << 0) +#ifndef __ASSEMBLY__ +typedef union iprte_a { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 entry; + struct { + u64 rsvd1 : 7, + valid : 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + rsvd2 : 1, + srcnode : 9, + initiator : 2, + rsvd3 : 3, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + addr : 38, + rsvd4 : 3; + } iprte_fields; +} iprte_a_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define iprte_valid iprte_fields.valid +#define iprte_timeout iprte_fields.timeout +#define iprte_srcnode iprte_fields.srcnode +#define iprte_init iprte_fields.initiator +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define iprte_addr iprte_fields.addr +#endif +#define IPRTE_ADDRSHFT 3 +#ifndef __ASSEMBLY__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef union iprb_u { + u64 reg_value; + struct { + u64 rsvd1: 15, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + error: 1, + ovflow: 5, + fire_and_forget: 1, + mode: 2, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + rsvd2: 2, + bnakctr: 14, + rsvd3: 2, + anakctr: 14, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + xtalkctr: 8; + } iprb_fields_s; +} iprb_t; +#define iprb_regval reg_value +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define iprb_error iprb_fields_s.error +#define iprb_ovflow iprb_fields_s.ovflow +#define iprb_ff iprb_fields_s.fire_and_forget +#define iprb_mode iprb_fields_s.mode +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define iprb_bnakctr iprb_fields_s.bnakctr +#define iprb_anakctr iprb_fields_s.anakctr +#define iprb_xtalkctr iprb_fields_s.xtalkctr +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IPRB_MODE_NORMAL (0) +#define IPRB_MODE_COLLECT_A (1) +#define IPRB_MODE_SERVICE_A (2) +#define IPRB_MODE_SERVICE_B (3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef __ASSEMBLY__ +typedef union icrbp_a { + u64 ip_reg; + struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 error: 1, + ln_uce: 1, + ln_ae: 1, + ln_werr:1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ln_aerr:1, + ln_perr:1, + timeout:1, + l_bdpkt:1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + c_bdpkt:1, + c_err: 1, + rsvd1: 12, + valid: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + sidn: 4, + tnum: 5, + bo: 1, + resprqd:1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + gbr: 1, + size: 2, + excl: 4, + stall: 3, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + intvn: 1, + resp: 1, + ack: 1, + hold: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + wb: 1, + ack_cnt:11, + tscaler:4; + } ip_fmt; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +} icrbp_a_t; +#endif +#define ICRBP_A_CERR_SHFT 54 +#define ICRBP_A_ERR_MASK 0x3ff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef __ASSEMBLY__ +typedef union hubii_idsr { + u64 iin_reg; + struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 rsvd1 : 35, + isent : 1, + rsvd2 : 3, + ienable: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + rsvd : 7, + node : 9, + rsvd4 : 1, + level : 7; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } iin_fmt; +} hubii_idsr_t; +#endif +#define IBLS_BUSY (0x1 << 20) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IBLS_ERROR_SHFT 16 +#define IBLS_ERROR (0x1 << IBLS_ERROR_SHFT) +#define IBLS_LENGTH_MASK 0xffff +#define IBCT_POISON (0x1 << 8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IBCT_NOTIFY (0x1 << 4) +#define IBCT_ZFIL_MODE (0x1 << 0) +#define IBIA_LEVEL_SHFT 16 +#define IBIA_LEVEL_MASK (0x7f << IBIA_LEVEL_SHFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IBIA_NODE_ID_SHFT 0 +#define IBIA_NODE_ID_MASK (0x1ff) +#define HUB_NUM_WIDGET 9 +#define HUB_WIDGET_ID_MIN 0x8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HUB_WIDGET_ID_MAX 0xf +#define HUB_WIDGET_PART_NUM 0xc101 +#define MAX_HUBS_PER_XBOW 2 +#define IIO_WCR_WID_GET(nasid) (REMOTE_HUB_L(nasid, III_WCR) & 0xf) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IIO_WST_ERROR_MASK (UINT64_CAST 1 << 32) +#define HUBII_XBOW_CREDIT 3 +#define HUBII_XBOW_REV2_CREDIT 4 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/hubmd.h b/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/hubmd.h new file mode 100644 index 0000000..9f0893f --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/hubmd.h @@ -0,0 +1,611 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SN_SN0_HUBMD_H +#define _ASM_SN_SN0_HUBMD_H +#define CACHE_SLINE_SIZE 128 +#define MAX_REGIONS 64 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PAGE_SIZE 4096 +#define MD_PAGE_NUM_SHFT 12 +#define MD_BASE 0x200000 +#define MD_BASE_PERF 0x210000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_BASE_JUNK 0x220000 +#define MD_IO_PROTECT 0x200000 +#define MD_IO_PROT_OVRRD 0x200008 +#define MD_HSPEC_PROTECT 0x200010 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_MEMORY_CONFIG 0x200018 +#define MD_REFRESH_CONTROL 0x200020 +#define MD_FANDOP_CAC_STAT 0x200028 +#define MD_MIG_DIFF_THRESH 0x200030 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_MIG_VALUE_THRESH 0x200038 +#define MD_MIG_CANDIDATE 0x200040 +#define MD_MIG_CANDIDATE_CLR 0x200048 +#define MD_DIR_ERROR 0x200050 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_DIR_ERROR_CLR 0x200058 +#define MD_PROTOCOL_ERROR 0x200060 +#define MD_PROTOCOL_ERROR_CLR 0x200068 +#define MD_MEM_ERROR 0x200070 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_MEM_ERROR_CLR 0x200078 +#define MD_MISC_ERROR 0x200080 +#define MD_MISC_ERROR_CLR 0x200088 +#define MD_MEM_DIMM_INIT 0x200090 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_DIR_DIMM_INIT 0x200098 +#define MD_MOQ_SIZE 0x2000a0 +#define MD_MLAN_CTL 0x2000a8 +#define MD_PERF_SEL 0x210000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PERF_CNT0 0x210010 +#define MD_PERF_CNT1 0x210018 +#define MD_PERF_CNT2 0x210020 +#define MD_PERF_CNT3 0x210028 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PERF_CNT4 0x210030 +#define MD_PERF_CNT5 0x210038 +#define MD_UREG0_0 0x220000 +#define MD_UREG0_1 0x220008 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_UREG0_2 0x220010 +#define MD_UREG0_3 0x220018 +#define MD_UREG0_4 0x220020 +#define MD_UREG0_5 0x220028 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_UREG0_6 0x220030 +#define MD_UREG0_7 0x220038 +#define MD_SLOTID_USTAT 0x220048 +#define MD_LED0 0x220050 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_LED1 0x220058 +#define MD_UREG1_0 0x220080 +#define MD_UREG1_1 0x220088 +#define MD_UREG1_2 0x220090 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_UREG1_3 0x220098 +#define MD_UREG1_4 0x2200a0 +#define MD_UREG1_5 0x2200a8 +#define MD_UREG1_6 0x2200b0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_UREG1_7 0x2200b8 +#define MD_UREG1_8 0x2200c0 +#define MD_UREG1_9 0x2200c8 +#define MD_UREG1_10 0x2200d0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_UREG1_11 0x2200d8 +#define MD_UREG1_12 0x2200e0 +#define MD_UREG1_13 0x2200e8 +#define MD_UREG1_14 0x2200f0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_UREG1_15 0x2200f8 +#define MD_MEM_BANKS 8 +#define MD_SIZE_EMPTY 0 +#define MD_SIZE_8MB 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_SIZE_16MB 2 +#define MD_SIZE_32MB 3 +#define MD_SIZE_64MB 4 +#define MD_SIZE_128MB 5 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_SIZE_256MB 6 +#define MD_SIZE_512MB 7 +#define MD_SIZE_1GB 8 +#define MD_SIZE_2GB 9 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_SIZE_4GB 10 +#define MD_SIZE_BYTES(size) ((size) == 0 ? 0 : 0x400000L << (size)) +#define MD_SIZE_MBYTES(size) ((size) == 0 ? 0 : 4 << (size)) +#define MMC_FPROM_CYC_SHFT 49 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MMC_FPROM_CYC_MASK (UINT64_CAST 31 << 49) +#define MMC_FPROM_WR_SHFT 44 +#define MMC_FPROM_WR_MASK (UINT64_CAST 31 << 44) +#define MMC_UCTLR_CYC_SHFT 39 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MMC_UCTLR_CYC_MASK (UINT64_CAST 31 << 39) +#define MMC_UCTLR_WR_SHFT 34 +#define MMC_UCTLR_WR_MASK (UINT64_CAST 31 << 34) +#define MMC_DIMM0_SEL_SHFT 32 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MMC_DIMM0_SEL_MASK (UINT64_CAST 3 << 32) +#define MMC_IO_PROT_EN_SHFT 31 +#define MMC_IO_PROT_EN_MASK (UINT64_CAST 1 << 31) +#define MMC_IO_PROT (UINT64_CAST 1 << 31) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MMC_ARB_MLSS_SHFT 30 +#define MMC_ARB_MLSS_MASK (UINT64_CAST 1 << 30) +#define MMC_ARB_MLSS (UINT64_CAST 1 << 30) +#define MMC_IGNORE_ECC_SHFT 29 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MMC_IGNORE_ECC_MASK (UINT64_CAST 1 << 29) +#define MMC_IGNORE_ECC (UINT64_CAST 1 << 29) +#define MMC_DIR_PREMIUM_SHFT 28 +#define MMC_DIR_PREMIUM_MASK (UINT64_CAST 1 << 28) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MMC_DIR_PREMIUM (UINT64_CAST 1 << 28) +#define MMC_REPLY_GUAR_SHFT 24 +#define MMC_REPLY_GUAR_MASK (UINT64_CAST 15 << 24) +#define MMC_BANK_SHFT(_b) ((_b) * 3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MMC_BANK_MASK(_b) (UINT64_CAST 7 << MMC_BANK_SHFT(_b)) +#define MMC_BANK_ALL_MASK 0xffffff +#define MMC_RESET_DEFAULTS (UINT64_CAST 0x0f << MMC_FPROM_CYC_SHFT | UINT64_CAST 0x07 << MMC_FPROM_WR_SHFT | UINT64_CAST 0x1f << MMC_UCTLR_CYC_SHFT | UINT64_CAST 0x0f << MMC_UCTLR_WR_SHFT | MMC_IGNORE_ECC | MMC_DIR_PREMIUM | UINT64_CAST 0x0f << MMC_REPLY_GUAR_SHFT | MMC_BANK_ALL_MASK) +#define MRC_ENABLE_SHFT 63 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MRC_ENABLE_MASK (UINT64_CAST 1 << 63) +#define MRC_ENABLE (UINT64_CAST 1 << 63) +#define MRC_COUNTER_SHFT 12 +#define MRC_COUNTER_MASK (UINT64_CAST 0xfff << 12) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MRC_CNT_THRESH_MASK 0xfff +#define MRC_RESET_DEFAULTS (UINT64_CAST 0x400) +#define MDI_SELECT_SHFT 32 +#define MDI_SELECT_MASK (UINT64_CAST 0x0f << 32) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MDI_DIMM_MODE_MASK (UINT64_CAST 0xfff) +#define MMS_RP_SIZE_SHFT 8 +#define MMS_RP_SIZE_MASK (UINT64_CAST 0x3f << 8) +#define MMS_RQ_SIZE_SHFT 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MMS_RQ_SIZE_MASK (UINT64_CAST 0x1f) +#define MMS_RESET_DEFAULTS (0x32 << 8 | 0x12) +#define MFC_VALID_SHFT 63 +#define MFC_VALID_MASK (UINT64_CAST 1 << 63) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MFC_VALID (UINT64_CAST 1 << 63) +#define MFC_ADDR_SHFT 6 +#define MFC_ADDR_MASK (UINT64_CAST 0x3ffffff) +#define MLAN_PHI1_SHFT 27 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MLAN_PHI1_MASK (UINT64_CAST 0x7f << 27) +#define MLAN_PHI0_SHFT 20 +#define MLAN_PHI0_MASK (UINT64_CAST 0x7f << 27) +#define MLAN_PULSE_SHFT 10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MLAN_PULSE_MASK (UINT64_CAST 0x3ff << 10) +#define MLAN_SAMPLE_SHFT 2 +#define MLAN_SAMPLE_MASK (UINT64_CAST 0xff << 2) +#define MLAN_DONE_SHFT 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MLAN_DONE_MASK 2 +#define MLAN_DONE (UINT64_CAST 0x02) +#define MLAN_RD_DATA (UINT64_CAST 0x01) +#define MLAN_RESET_DEFAULTS (UINT64_CAST 0x31 << MLAN_PHI1_SHFT | UINT64_CAST 0x31 << MLAN_PHI0_SHFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSU_CORECLK_TST_SHFT 7 +#define MSU_CORECLK_TST_MASK (UINT64_CAST 1 << 7) +#define MSU_CORECLK_TST (UINT64_CAST 1 << 7) +#define MSU_CORECLK_SHFT 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSU_CORECLK_MASK (UINT64_CAST 1 << 6) +#define MSU_CORECLK (UINT64_CAST 1 << 6) +#define MSU_NETSYNC_SHFT 5 +#define MSU_NETSYNC_MASK (UINT64_CAST 1 << 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSU_NETSYNC (UINT64_CAST 1 << 5) +#define MSU_FPROMRDY_SHFT 4 +#define MSU_FPROMRDY_MASK (UINT64_CAST 1 << 4) +#define MSU_FPROMRDY (UINT64_CAST 1 << 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSU_I2CINTR_SHFT 3 +#define MSU_I2CINTR_MASK (UINT64_CAST 1 << 3) +#define MSU_I2CINTR (UINT64_CAST 1 << 3) +#define MSU_SLOTID_MASK 0xff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSU_SN0_SLOTID_SHFT 0 +#define MSU_SN0_SLOTID_MASK (UINT64_CAST 7) +#define MSU_SN00_SLOTID_SHFT 7 +#define MSU_SN00_SLOTID_MASK (UINT64_CAST 0x80) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MSU_PIMM_PSC_SHFT 4 +#define MSU_PIMM_PSC_MASK (0xf << MSU_PIMM_PSC_SHFT) +#define MD_MIG_DIFF_THRES_VALID_MASK (UINT64_CAST 0x1 << 63) +#define MD_MIG_DIFF_THRES_VALID_SHFT 63 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_MIG_DIFF_THRES_VALUE_MASK (UINT64_CAST 0xfffff) +#define MD_MIG_VALUE_THRES_VALID_MASK (UINT64_CAST 0x1 << 63) +#define MD_MIG_VALUE_THRES_VALID_SHFT 63 +#define MD_MIG_VALUE_THRES_VALUE_MASK (UINT64_CAST 0xfffff) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_MIG_CANDIDATE_VALID_MASK (UINT64_CAST 0x1 << 63) +#define MD_MIG_CANDIDATE_VALID_SHFT 63 +#define MD_MIG_CANDIDATE_TYPE_MASK (UINT64_CAST 0x1 << 30) +#define MD_MIG_CANDIDATE_TYPE_SHFT 30 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_MIG_CANDIDATE_OVERRUN_MASK (UINT64_CAST 0x1 << 29) +#define MD_MIG_CANDIDATE_OVERRUN_SHFT 29 +#define MD_MIG_CANDIDATE_INITIATOR_MASK (UINT64_CAST 0x7ff << 18) +#define MD_MIG_CANDIDATE_INITIATOR_SHFT 18 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_MIG_CANDIDATE_NODEID_MASK (UINT64_CAST 0x1ff << 20) +#define MD_MIG_CANDIDATE_NODEID_SHFT 20 +#define MD_MIG_CANDIDATE_ADDR_MASK (UINT64_CAST 0x3ffff) +#define MD_MIG_CANDIDATE_ADDR_SHFT 14 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_BANK_SHFT 29 +#define MD_BANK_MASK (UINT64_CAST 7 << 29) +#define MD_BANK_SIZE (UINT64_CAST 1 << MD_BANK_SHFT) +#define MD_BANK_OFFSET(_b) (UINT64_CAST (_b) << MD_BANK_SHFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_DIR_SHARED (UINT64_CAST 0x0) +#define MD_DIR_POISONED (UINT64_CAST 0x1) +#define MD_DIR_EXCLUSIVE (UINT64_CAST 0x2) +#define MD_DIR_BUSY_SHARED (UINT64_CAST 0x3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_DIR_BUSY_EXCL (UINT64_CAST 0x4) +#define MD_DIR_WAIT (UINT64_CAST 0x5) +#define MD_DIR_UNOWNED (UINT64_CAST 0x7) +#define MD_DIR_FORCE_ECC (UINT64_CAST 1 << 63) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PDIR_MASK 0xffffffffffff +#define MD_PDIR_ECC_SHFT 0 +#define MD_PDIR_ECC_MASK 0x7f +#define MD_PDIR_PRIO_SHFT 8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PDIR_PRIO_MASK (0xf << 8) +#define MD_PDIR_AX_SHFT 7 +#define MD_PDIR_AX_MASK (1 << 7) +#define MD_PDIR_AX (1 << 7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PDIR_FINE_SHFT 12 +#define MD_PDIR_FINE_MASK (1 << 12) +#define MD_PDIR_FINE (1 << 12) +#define MD_PDIR_OCT_SHFT 13 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PDIR_OCT_MASK (7 << 13) +#define MD_PDIR_STATE_SHFT 13 +#define MD_PDIR_STATE_MASK (7 << 13) +#define MD_PDIR_ONECNT_SHFT 16 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PDIR_ONECNT_MASK (0x3f << 16) +#define MD_PDIR_PTR_SHFT 22 +#define MD_PDIR_PTR_MASK (UINT64_CAST 0x7ff << 22) +#define MD_PDIR_VECMSB_SHFT 22 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PDIR_VECMSB_BITMASK 0x3ffffff +#define MD_PDIR_VECMSB_BITSHFT 27 +#define MD_PDIR_VECMSB_MASK (UINT64_CAST MD_PDIR_VECMSB_BITMASK << 22) +#define MD_PDIR_CWOFF_SHFT 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PDIR_CWOFF_MASK (7 << 7) +#define MD_PDIR_VECLSB_SHFT 10 +#define MD_PDIR_VECLSB_BITMASK (UINT64_CAST 0x3fffffffff) +#define MD_PDIR_VECLSB_BITSHFT 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PDIR_VECLSB_MASK (MD_PDIR_VECLSB_BITMASK << 10) +#define MD_PDIR_INIT_LO (MD_DIR_UNOWNED << MD_PDIR_STATE_SHFT | MD_PDIR_AX) +#define MD_PDIR_INIT_HI 0 +#define MD_PDIR_INIT_PROT (MD_PROT_RW << MD_PPROT_IO_SHFT | MD_PROT_RW << MD_PPROT_SHFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_SDIR_MASK 0xffff +#define MD_SDIR_ECC_SHFT 0 +#define MD_SDIR_ECC_MASK 0x1f +#define MD_SDIR_PRIO_SHFT 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_SDIR_PRIO_MASK (1 << 6) +#define MD_SDIR_AX_SHFT 5 +#define MD_SDIR_AX_MASK (1 << 5) +#define MD_SDIR_AX (1 << 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_SDIR_STATE_SHFT 7 +#define MD_SDIR_STATE_MASK (7 << 7) +#define MD_SDIR_PTR_SHFT 10 +#define MD_SDIR_PTR_MASK (0x3f << 10) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_SDIR_CWOFF_SHFT 5 +#define MD_SDIR_CWOFF_MASK (7 << 5) +#define MD_SDIR_VECMSB_SHFT 11 +#define MD_SDIR_VECMSB_BITMASK 0x1f +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_SDIR_VECMSB_BITSHFT 7 +#define MD_SDIR_VECMSB_MASK (MD_SDIR_VECMSB_BITMASK << 11) +#define MD_SDIR_VECLSB_SHFT 5 +#define MD_SDIR_VECLSB_BITMASK 0x7ff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_SDIR_VECLSB_BITSHFT 0 +#define MD_SDIR_VECLSB_MASK (MD_SDIR_VECLSB_BITMASK << 5) +#define MD_SDIR_INIT_LO (MD_DIR_UNOWNED << MD_SDIR_STATE_SHFT | MD_SDIR_AX) +#define MD_SDIR_INIT_HI 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_SDIR_INIT_PROT (MD_PROT_RW << MD_SPROT_SHFT) +#define MD_PROT_RW (UINT64_CAST 0x6) +#define MD_PROT_RO (UINT64_CAST 0x3) +#define MD_PROT_NO (UINT64_CAST 0x0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PROT_BAD (UINT64_CAST 0x5) +#define MD_PPROT_SHFT 0 +#define MD_PPROT_MASK 7 +#define MD_PPROT_MIGMD_SHFT 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PPROT_MIGMD_MASK (3 << 3) +#define MD_PPROT_REFCNT_SHFT 5 +#define MD_PPROT_REFCNT_WIDTH 0x7ffff +#define MD_PPROT_REFCNT_MASK (MD_PPROT_REFCNT_WIDTH << 5) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PPROT_IO_SHFT 45 +#define MD_PPROT_IO_MASK (UINT64_CAST 7 << 45) +#define MD_SPROT_SHFT 0 +#define MD_SPROT_MASK 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_SPROT_MIGMD_SHFT 3 +#define MD_SPROT_MIGMD_MASK (3 << 3) +#define MD_SPROT_REFCNT_SHFT 5 +#define MD_SPROT_REFCNT_WIDTH 0x7ff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_SPROT_REFCNT_MASK (MD_SPROT_REFCNT_WIDTH << 5) +#define MD_PROT_MIGMD_IREL (UINT64_CAST 0x3 << 3) +#define MD_PROT_MIGMD_IABS (UINT64_CAST 0x2 << 3) +#define MD_PROT_MIGMD_PREL (UINT64_CAST 0x1 << 3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PROT_MIGMD_OFF (UINT64_CAST 0x0 << 3) +#ifndef __ASSEMBLY__ +#define CPU_LED_ADDR(_nasid, _slice) (private.p_sn00 ? REMOTE_HUB_ADDR((_nasid), MD_UREG1_0 + ((_slice) << 5)) : REMOTE_HUB_ADDR((_nasid), MD_LED0 + ((_slice) << 3))) +#define SET_CPU_LEDS(_nasid, _slice, _val) (HUB_S(CPU_LED_ADDR(_nasid, _slice), (_val))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SET_MY_LEDS(_v) SET_CPU_LEDS(get_nasid(), get_slice(), (_v)) +#define DIRTYPE_PREMIUM 1 +#define DIRTYPE_STANDARD 0 +#define MD_MEMORY_CONFIG_DIR_TYPE_GET(region) ( (REMOTE_HUB_L(region, MD_MEMORY_CONFIG) & MMC_DIR_PREMIUM_MASK) >> MMC_DIR_PREMIUM_SHFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_MIG_DIFF_THRESH_GET(region) ( REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) & MD_MIG_DIFF_THRES_VALUE_MASK) +#define MD_MIG_DIFF_THRESH_SET(region, value) ( REMOTE_HUB_S((region), MD_MIG_DIFF_THRESH, MD_MIG_DIFF_THRES_VALID_MASK | (value))) +#define MD_MIG_DIFF_THRESH_DISABLE(region) ( REMOTE_HUB_S((region), MD_MIG_DIFF_THRESH, REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) & ~MD_MIG_DIFF_THRES_VALID_MASK)) +#define MD_MIG_DIFF_THRESH_ENABLE(region) ( REMOTE_HUB_S((region), MD_MIG_DIFF_THRESH, REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) | MD_MIG_DIFF_THRES_VALID_MASK)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_MIG_DIFF_THRESH_IS_ENABLED(region) ( REMOTE_HUB_L((region), MD_MIG_DIFF_THRESH) & MD_MIG_DIFF_THRES_VALID_MASK) +#define MD_MIG_VALUE_THRESH_GET(region) ( REMOTE_HUB_L((region), MD_MIG_VALUE_THRESH) & MD_MIG_VALUE_THRES_VALUE_MASK) +#define MD_MIG_VALUE_THRESH_SET(region, value) ( REMOTE_HUB_S((region), MD_MIG_VALUE_THRESH, MD_MIG_VALUE_THRES_VALID_MASK | (value))) +#define MD_MIG_VALUE_THRESH_DISABLE(region) ( REMOTE_HUB_S((region), MD_MIG_VALUE_THRESH, REMOTE_HUB_L(region, MD_MIG_VALUE_THRESH) & ~MD_MIG_VALUE_THRES_VALID_MASK)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_MIG_VALUE_THRESH_ENABLE(region) ( REMOTE_HUB_S((region), MD_MIG_VALUE_THRESH, REMOTE_HUB_L((region), MD_MIG_VALUE_THRESH) | MD_MIG_VALUE_THRES_VALID_MASK)) +#define MD_MIG_VALUE_THRESH_IS_ENABLED(region) ( REMOTE_HUB_L((region), MD_MIG_VALUE_THRESH) & MD_MIG_VALUE_THRES_VALID_MASK) +#define MD_MIG_CANDIDATE_GET(my_region_id) ( REMOTE_HUB_L((my_region_id), MD_MIG_CANDIDATE_CLR)) +#define MD_MIG_CANDIDATE_HWPFN(value) ((value) & MD_MIG_CANDIDATE_ADDR_MASK) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_MIG_CANDIDATE_NODEID(value) ( ((value) & MD_MIG_CANDIDATE_NODEID_MASK) >> MD_MIG_CANDIDATE_NODEID_SHFT) +#define MD_MIG_CANDIDATE_TYPE(value) ( ((value) & MD_MIG_CANDIDATE_TYPE_MASK) >> MD_MIG_CANDIDATE_TYPE_SHFT) +#define MD_MIG_CANDIDATE_VALID(value) ( ((value) & MD_MIG_CANDIDATE_VALID_MASK) >> MD_MIG_CANDIDATE_VALID_SHFT) +#define MD_PPROT_REFCNT_GET(value) ( ((value) & MD_PPROT_REFCNT_MASK) >> MD_PPROT_REFCNT_SHFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MD_PPROT_MIGMD_GET(value) ( ((value) & MD_PPROT_MIGMD_MASK) >> MD_PPROT_MIGMD_SHFT) +#define MD_SPROT_REFCNT_GET(value) ( ((value) & MD_SPROT_REFCNT_MASK) >> MD_SPROT_REFCNT_SHFT) +#define MD_SPROT_MIGMD_GET(value) ( ((value) & MD_SPROT_MIGMD_MASK) >> MD_SPROT_MIGMD_SHFT) +struct dir_error_reg { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 uce_vld: 1, + ae_vld: 1, + ce_vld: 1, + rsvd1: 19, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bad_prot: 3, + bad_syn: 7, + rsvd2: 2, + hspec_addr:27, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uce_ovr: 1, + ae_ovr: 1, + ce_ovr: 1; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef union md_dir_error { + u64 derr_reg; + struct dir_error_reg derr_fmt; +} md_dir_error_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct mem_error_reg { + u64 uce_vld: 1, + ce_vld: 1, + rsvd1: 22, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + bad_syn: 8, + address: 29, + rsvd2: 1, + uce_ovr: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ce_ovr: 1; +}; +typedef union md_mem_error { + u64 merr_reg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct mem_error_reg merr_fmt; +} md_mem_error_t; +struct proto_error_reg { + u64 valid: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + rsvd1: 2, + initiator:11, + backoff: 2, + msg_type: 8, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + access: 2, + priority: 1, + dir_state: 4, + pointer_me:1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + address: 29, + rsvd2: 2, + overrun: 1; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef union md_proto_error { + u64 perr_reg; + struct proto_error_reg perr_fmt; +} md_proto_error_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct md_sdir_high_fmt { + unsigned short sd_hi_bvec : 11, + sd_hi_ecc : 5; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef union md_sdir_high { + unsigned short sd_hi_val; + struct md_sdir_high_fmt sd_hi_fmt; +}md_sdir_high_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct md_sdir_low_shared_fmt { + unsigned short sds_lo_bvec : 5, + sds_lo_unused: 1, + sds_lo_state : 3, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + sds_lo_prio : 1, + sds_lo_ax : 1, + sds_lo_ecc : 5; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct md_sdir_low_exclusive_fmt { + unsigned short sde_lo_ptr : 6, + sde_lo_state : 3, + sde_lo_prio : 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + sde_lo_ax : 1, + sde_lo_ecc : 5; +}; +typedef union md_sdir_low { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned short sd_lo_val; + struct md_sdir_low_exclusive_fmt sde_lo_fmt; + struct md_sdir_low_shared_fmt sds_lo_fmt; +}md_sdir_low_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct md_pdir_high_fmt { + u64 pd_hi_unused : 16, + pd_hi_bvec : 38, + pd_hi_unused1 : 3, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + pd_hi_ecc : 7; +}; +typedef union md_pdir_high { + u64 pd_hi_val; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct md_pdir_high_fmt pd_hi_fmt; +}md_pdir_high_t; +struct md_pdir_low_shared_fmt { + u64 pds_lo_unused : 16, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + pds_lo_bvec : 26, + pds_lo_cnt : 6, + pds_lo_state : 3, + pds_lo_ste : 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + pds_lo_prio : 4, + pds_lo_ax : 1, + pds_lo_ecc : 7; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct md_pdir_low_exclusive_fmt { + u64 pde_lo_unused : 31, + pde_lo_ptr : 11, + pde_lo_unused1 : 6, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + pde_lo_state : 3, + pde_lo_ste : 1, + pde_lo_prio : 4, + pde_lo_ax : 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + pde_lo_ecc : 7; +}; +typedef union md_pdir_loent { + u64 pd_lo_val; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct md_pdir_low_exclusive_fmt pde_lo_fmt; + struct md_pdir_low_shared_fmt pds_lo_fmt; +}md_pdir_low_t; +typedef union md_dir_high { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + md_sdir_high_t md_sdir_high; + md_pdir_high_t md_pdir_high; +} md_dir_high_t; +typedef union md_dir_low { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + md_sdir_low_t md_sdir_low; + md_pdir_low_t md_pdir_low; +} md_dir_low_t; +typedef struct bddir_entry { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + md_dir_low_t md_dir_low; + md_dir_high_t md_dir_high; +} bddir_entry_t; +typedef struct dir_mem_entry { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 prcpf[MAX_REGIONS]; + bddir_entry_t directory_words[MD_PAGE_SIZE/CACHE_SLINE_SIZE]; +} dir_mem_entry_t; +typedef union md_perf_sel { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 perf_sel_reg; + struct { + u64 perf_rsvd : 60, + perf_en : 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + perf_sel : 3; + } perf_sel_bits; +} md_perf_sel_t; +typedef union md_perf_cnt { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 perf_cnt; + struct { + u64 perf_rsvd : 44, + perf_cnt : 20; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + } perf_cnt_bits; +} md_perf_cnt_t; +#endif +#define DIR_ERROR_VALID_MASK 0xe000000000000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DIR_ERROR_VALID_SHFT 61 +#define DIR_ERROR_VALID_UCE 0x8000000000000000 +#define DIR_ERROR_VALID_AE 0x4000000000000000 +#define DIR_ERROR_VALID_CE 0x2000000000000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MEM_ERROR_VALID_MASK 0xc000000000000000 +#define MEM_ERROR_VALID_SHFT 62 +#define MEM_ERROR_VALID_UCE 0x8000000000000000 +#define MEM_ERROR_VALID_CE 0x4000000000000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PROTO_ERROR_VALID_MASK 0x8000000000000000 +#define MISC_ERROR_VALID_MASK 0x3ff +#define DIR_ERR_HSPEC_MASK 0x3ffffff8 +#define ERROR_HSPEC_MASK 0x3ffffff8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ERROR_HSPEC_SHFT 3 +#define ERROR_ADDR_MASK 0xfffffff8 +#define ERROR_ADDR_SHFT 3 +#define MMCE_VALID_MASK 0x3ff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MMCE_ILL_MSG_SHFT 8 +#define MMCE_ILL_MSG_MASK (UINT64_CAST 0x03 << MMCE_ILL_MSG_SHFT) +#define MMCE_ILL_REV_SHFT 6 +#define MMCE_ILL_REV_MASK (UINT64_CAST 0x03 << MMCE_ILL_REV_SHFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MMCE_LONG_PACK_SHFT 4 +#define MMCE_LONG_PACK_MASK (UINT64_CAST 0x03 << MMCE_lONG_PACK_SHFT) +#define MMCE_SHORT_PACK_SHFT 2 +#define MMCE_SHORT_PACK_MASK (UINT64_CAST 0x03 << MMCE_SHORT_PACK_SHFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MMCE_BAD_DATA_SHFT 0 +#define MMCE_BAD_DATA_MASK (UINT64_CAST 0x03 << MMCE_BAD_DATA_SHFT) +#define MD_PERF_COUNTERS 6 +#define MD_PERF_SETS 6 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MEM_DIMM_MASK 0xe0000000 +#define MEM_DIMM_SHFT 29 +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/hubni.h b/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/hubni.h new file mode 100644 index 0000000..cb3658d --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/hubni.h @@ -0,0 +1,225 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SGI_SN0_HUBNI_H +#define _ASM_SGI_SN0_HUBNI_H +#ifndef __ASSEMBLY__ +#include <linux/types.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define NI_BASE 0x600000 +#define NI_BASE_TABLES 0x630000 +#define NI_STATUS_REV_ID 0x600000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NI_PORT_RESET 0x600008 +#define NI_PROTECTION 0x600010 +#define NI_GLOBAL_PARMS 0x600018 +#define NI_SCRATCH_REG0 0x600100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NI_SCRATCH_REG1 0x600108 +#define NI_DIAG_PARMS 0x600110 +#define NI_VECTOR_PARMS 0x600200 +#define NI_VECTOR 0x600208 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NI_VECTOR_DATA 0x600210 +#define NI_VECTOR_STATUS 0x600300 +#define NI_RETURN_VECTOR 0x600308 +#define NI_VECTOR_READ_DATA 0x600310 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NI_VECTOR_CLEAR 0x600380 +#define NI_IO_PROTECT 0x600400 +#define NI_IO_PROT_OVRRD 0x600408 +#define NI_AGE_CPU0_MEMORY 0x600500 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NI_AGE_CPU0_PIO 0x600508 +#define NI_AGE_CPU1_MEMORY 0x600510 +#define NI_AGE_CPU1_PIO 0x600518 +#define NI_AGE_GBR_MEMORY 0x600520 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NI_AGE_GBR_PIO 0x600528 +#define NI_AGE_IO_MEMORY 0x600530 +#define NI_AGE_IO_PIO 0x600538 +#define NI_AGE_REG_MIN NI_AGE_CPU0_MEMORY +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NI_AGE_REG_MAX NI_AGE_IO_PIO +#define NI_PORT_PARMS 0x608000 +#define NI_PORT_ERROR 0x608008 +#define NI_PORT_ERROR_CLEAR 0x608088 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NI_META_TABLE0 0x638000 +#define NI_META_TABLE(_x) (NI_META_TABLE0 + (8 * (_x))) +#define NI_META_ENTRIES 32 +#define NI_LOCAL_TABLE0 0x638100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NI_LOCAL_TABLE(_x) (NI_LOCAL_TABLE0 + (8 * (_x))) +#define NI_LOCAL_ENTRIES 16 +#define NSRI_8BITMODE_SHFT 30 +#define NSRI_8BITMODE_MASK (UINT64_CAST 0x1 << 30) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NSRI_LINKUP_SHFT 29 +#define NSRI_LINKUP_MASK (UINT64_CAST 0x1 << 29) +#define NSRI_DOWNREASON_SHFT 28 +#define NSRI_DOWNREASON_MASK (UINT64_CAST 0x1 << 28) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NSRI_MORENODES_SHFT 18 +#define NSRI_MORENODES_MASK (UINT64_CAST 1 << 18) +#define MORE_MEMORY 0 +#define MORE_NODES 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NSRI_REGIONSIZE_SHFT 17 +#define NSRI_REGIONSIZE_MASK (UINT64_CAST 1 << 17) +#define REGIONSIZE_FINE 1 +#define REGIONSIZE_COARSE 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NSRI_NODEID_SHFT 8 +#define NSRI_NODEID_MASK (UINT64_CAST 0x1ff << 8) +#define NSRI_REV_SHFT 4 +#define NSRI_REV_MASK (UINT64_CAST 0xf << 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NSRI_CHIPID_SHFT 0 +#define NSRI_CHIPID_MASK (UINT64_CAST 0xf) +#define NASID_TO_FINEREG_SHFT 0 +#define NASID_TO_COARSEREG_SHFT 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NPR_PORTRESET (UINT64_CAST 1 << 7) +#define NPR_LINKRESET (UINT64_CAST 1 << 1) +#define NPR_LOCALRESET (UINT64_CAST 1) +#define NPROT_RESETOK (UINT64_CAST 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NGP_MAXRETRY_SHFT 48 +#define NGP_MAXRETRY_MASK (UINT64_CAST 0x3ff << 48) +#define NGP_TAILTOWRAP_SHFT 32 +#define NGP_TAILTOWRAP_MASK (UINT64_CAST 0xffff << 32) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NGP_CREDITTOVAL_SHFT 16 +#define NGP_CREDITTOVAL_MASK (UINT64_CAST 0xf << 16) +#define NGP_TAILTOVAL_SHFT 4 +#define NGP_TAILTOVAL_MASK (UINT64_CAST 0xf << 4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NDP_PORTTORESET (UINT64_CAST 1 << 18) +#define NDP_LLP8BITMODE (UINT64_CAST 1 << 12) +#define NDP_PORTDISABLE (UINT64_CAST 1 << 6) +#define NDP_SENDERROR (UINT64_CAST 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NVP_PIOID_SHFT 40 +#define NVP_PIOID_MASK (UINT64_CAST 0x3ff << 40) +#define NVP_WRITEID_SHFT 32 +#define NVP_WRITEID_MASK (UINT64_CAST 0xff << 32) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NVP_ADDRESS_MASK (UINT64_CAST 0xffff8) +#define NVP_TYPE_SHFT 0 +#define NVP_TYPE_MASK (UINT64_CAST 0x3) +#define NVS_VALID (UINT64_CAST 1 << 63) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NVS_OVERRUN (UINT64_CAST 1 << 62) +#define NVS_TARGET_SHFT 51 +#define NVS_TARGET_MASK (UINT64_CAST 0x3ff << 51) +#define NVS_PIOID_SHFT 40 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NVS_PIOID_MASK (UINT64_CAST 0x3ff << 40) +#define NVS_WRITEID_SHFT 32 +#define NVS_WRITEID_MASK (UINT64_CAST 0xff << 32) +#define NVS_ADDRESS_MASK (UINT64_CAST 0xfffffff8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NVS_TYPE_SHFT 0 +#define NVS_TYPE_MASK (UINT64_CAST 0x7) +#define NVS_ERROR_MASK (UINT64_CAST 0x4) +#define PIOTYPE_READ 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PIOTYPE_WRITE 1 +#define PIOTYPE_UNDEFINED 2 +#define PIOTYPE_EXCHANGE 3 +#define PIOTYPE_ADDR_ERR 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PIOTYPE_CMD_ERR 5 +#define PIOTYPE_PROT_ERR 6 +#define PIOTYPE_UNKNOWN 7 +#define NAGE_VCH_SHFT 10 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NAGE_VCH_MASK (UINT64_CAST 3 << 10) +#define NAGE_CC_SHFT 8 +#define NAGE_CC_MASK (UINT64_CAST 3 << 8) +#define NAGE_AGE_SHFT 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NAGE_AGE_MASK (UINT64_CAST 0xff) +#define NAGE_MASK (NAGE_VCH_MASK | NAGE_CC_MASK | NAGE_AGE_MASK) +#define VCHANNEL_A 0 +#define VCHANNEL_B 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VCHANNEL_ANY 2 +#define NPP_NULLTO_SHFT 10 +#define NPP_NULLTO_MASK (UINT64_CAST 0x3f << 16) +#define NPP_MAXBURST_SHFT 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NPP_MAXBURST_MASK (UINT64_CAST 0x3ff) +#define NPP_RESET_DFLT_HUB20 ((UINT64_CAST 1 << NPP_NULLTO_SHFT) | (UINT64_CAST 0x3f0 << NPP_MAXBURST_SHFT)) +#define NPP_RESET_DEFAULTS ((UINT64_CAST 6 << NPP_NULLTO_SHFT) | (UINT64_CAST 0x3f0 << NPP_MAXBURST_SHFT)) +#define NPE_LINKRESET (UINT64_CAST 1 << 37) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NPE_INTERNALERROR (UINT64_CAST 1 << 36) +#define NPE_BADMESSAGE (UINT64_CAST 1 << 35) +#define NPE_BADDEST (UINT64_CAST 1 << 34) +#define NPE_FIFOOVERFLOW (UINT64_CAST 1 << 33) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NPE_CREDITTO_SHFT 28 +#define NPE_CREDITTO_MASK (UINT64_CAST 0xf << 28) +#define NPE_TAILTO_SHFT 24 +#define NPE_TAILTO_MASK (UINT64_CAST 0xf << 24) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NPE_RETRYCOUNT_SHFT 16 +#define NPE_RETRYCOUNT_MASK (UINT64_CAST 0xff << 16) +#define NPE_CBERRCOUNT_SHFT 8 +#define NPE_CBERRCOUNT_MASK (UINT64_CAST 0xff << 8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NPE_SNERRCOUNT_SHFT 0 +#define NPE_SNERRCOUNT_MASK (UINT64_CAST 0xff << 0) +#define NPE_MASK 0x3effffffff +#define NPE_COUNT_MAX 0xff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NPE_FATAL_ERRORS (NPE_LINKRESET | NPE_INTERNALERROR | NPE_BADMESSAGE | NPE_BADDEST | NPE_FIFOOVERFLOW | NPE_CREDITTO_MASK | NPE_TAILTO_MASK) +#define NMT_EXIT_PORT_MASK (UINT64_CAST 0xf) +#define NLT_EXIT_PORT_MASK (UINT64_CAST 0xf) +#ifndef __ASSEMBLY__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef union hubni_port_error_u { + u64 nipe_reg_value; + struct { + u64 nipe_rsvd: 26, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + nipe_lnk_reset: 1, + nipe_intl_err: 1, + nipe_bad_msg: 1, + nipe_bad_dest: 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + nipe_fifo_ovfl: 1, + nipe_rsvd1: 1, + nipe_credit_to: 4, + nipe_tail_to: 4, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + nipe_retry_cnt: 8, + nipe_cb_cnt: 8, + nipe_sn_cnt: 8; + } nipe_fields_s; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +} hubni_port_error_t; +#define NI_LLP_RETRY_MAX 0xff +#define NI_LLP_CB_MAX 0xff +#define NI_LLP_SN_MAX 0xff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/hubpi.h b/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/hubpi.h new file mode 100644 index 0000000..922c480 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sn/sn0/hubpi.h @@ -0,0 +1,364 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SN_SN0_HUBPI_H +#define _ASM_SN_SN0_HUBPI_H +#include <linux/types.h> +#define PI_BASE 0x000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_CPU_PROTECT 0x000000 +#define PI_PROT_OVERRD 0x000008 +#define PI_IO_PROTECT 0x000010 +#define PI_REGION_PRESENT 0x000018 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_CPU_NUM 0x000020 +#define PI_CALIAS_SIZE 0x000028 +#define PI_MAX_CRB_TIMEOUT 0x000030 +#define PI_CRB_SFACTOR 0x000038 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_CALIAS_SIZE_0 0 +#define PI_CALIAS_SIZE_4K 1 +#define PI_CALIAS_SIZE_8K 2 +#define PI_CALIAS_SIZE_16K 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_CALIAS_SIZE_32K 4 +#define PI_CALIAS_SIZE_64K 5 +#define PI_CALIAS_SIZE_128K 6 +#define PI_CALIAS_SIZE_256K 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_CALIAS_SIZE_512K 8 +#define PI_CALIAS_SIZE_1M 9 +#define PI_CALIAS_SIZE_2M 10 +#define PI_CALIAS_SIZE_4M 11 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_CALIAS_SIZE_8M 12 +#define PI_CALIAS_SIZE_16M 13 +#define PI_CALIAS_SIZE_32M 14 +#define PI_CALIAS_SIZE_64M 15 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_CPU_PRESENT_A 0x000040 +#define PI_CPU_PRESENT_B 0x000048 +#define PI_CPU_ENABLE_A 0x000050 +#define PI_CPU_ENABLE_B 0x000058 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_REPLY_LEVEL 0x000060 +#define PI_HARDRESET_BIT 0x020068 +#define PI_NMI_A 0x000070 +#define PI_NMI_B 0x000078 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_NMI_OFFSET (PI_NMI_B - PI_NMI_A) +#define PI_SOFTRESET 0x000080 +#define PI_INT_PEND_MOD 0x000090 +#define PI_INT_PEND0 0x000098 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_INT_PEND1 0x0000a0 +#define PI_INT_MASK0_A 0x0000a8 +#define PI_INT_MASK1_A 0x0000b0 +#define PI_INT_MASK0_B 0x0000b8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_INT_MASK1_B 0x0000c0 +#define PI_INT_MASK_OFFSET 0x10 +#define PI_CC_PEND_SET_A 0x0000c8 +#define PI_CC_PEND_SET_B 0x0000d0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_CC_PEND_CLR_A 0x0000d8 +#define PI_CC_PEND_CLR_B 0x0000e0 +#define PI_CC_MASK 0x0000e8 +#define PI_INT_SET_OFFSET 0x08 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_RT_COUNT 0x030100 +#define PI_RT_COMPARE_A 0x000108 +#define PI_RT_COMPARE_B 0x000110 +#define PI_PROFILE_COMPARE 0x000118 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_RT_PEND_A 0x000120 +#define PI_RT_PEND_B 0x000128 +#define PI_PROF_PEND_A 0x000130 +#define PI_PROF_PEND_B 0x000138 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_RT_EN_A 0x000140 +#define PI_RT_EN_B 0x000148 +#define PI_PROF_EN_A 0x000150 +#define PI_PROF_EN_B 0x000158 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_RT_LOCAL_CTRL 0x000160 +#define PI_RT_FILTER_CTRL 0x000168 +#define PI_COUNT_OFFSET 0x08 +#define PI_BIST_WRITE_DATA 0x000200 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_BIST_READ_DATA 0x000208 +#define PI_BIST_COUNT_TARG 0x000210 +#define PI_BIST_READY 0x000218 +#define PI_BIST_SHIFT_LOAD 0x000220 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_BIST_SHIFT_UNLOAD 0x000228 +#define PI_BIST_ENTER_RUN 0x000230 +#define PI_GFX_PAGE_A 0x000300 +#define PI_GFX_CREDIT_CNTR_A 0x000308 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_GFX_BIAS_A 0x000310 +#define PI_GFX_INT_CNTR_A 0x000318 +#define PI_GFX_INT_CMP_A 0x000320 +#define PI_GFX_PAGE_B 0x000328 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_GFX_CREDIT_CNTR_B 0x000330 +#define PI_GFX_BIAS_B 0x000338 +#define PI_GFX_INT_CNTR_B 0x000340 +#define PI_GFX_INT_CMP_B 0x000348 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_GFX_OFFSET (PI_GFX_PAGE_B - PI_GFX_PAGE_A) +#define PI_GFX_PAGE_ENABLE 0x0000010000000000LL +#define PI_ERR_INT_PEND 0x000400 +#define PI_ERR_INT_MASK_A 0x000408 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_INT_MASK_B 0x000410 +#define PI_ERR_STACK_ADDR_A 0x000418 +#define PI_ERR_STACK_ADDR_B 0x000420 +#define PI_ERR_STACK_SIZE 0x000428 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_STATUS0_A 0x000430 +#define PI_ERR_STATUS0_A_RCLR 0x000438 +#define PI_ERR_STATUS1_A 0x000440 +#define PI_ERR_STATUS1_A_RCLR 0x000448 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_STATUS0_B 0x000450 +#define PI_ERR_STATUS0_B_RCLR 0x000458 +#define PI_ERR_STATUS1_B 0x000460 +#define PI_ERR_STATUS1_B_RCLR 0x000468 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_SPOOL_CMP_A 0x000470 +#define PI_SPOOL_CMP_B 0x000478 +#define PI_CRB_TIMEOUT_A 0x000480 +#define PI_CRB_TIMEOUT_B 0x000488 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_SYSAD_ERRCHK_EN 0x000490 +#define PI_BAD_CHECK_BIT_A 0x000498 +#define PI_BAD_CHECK_BIT_B 0x0004a0 +#define PI_NACK_CNT_A 0x0004a8 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_NACK_CNT_B 0x0004b0 +#define PI_NACK_CMP 0x0004b8 +#define PI_STACKADDR_OFFSET (PI_ERR_STACK_ADDR_B - PI_ERR_STACK_ADDR_A) +#define PI_ERRSTAT_OFFSET (PI_ERR_STATUS0_B - PI_ERR_STATUS0_A) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_RDCLR_OFFSET (PI_ERR_STATUS0_A_RCLR - PI_ERR_STATUS0_A) +#define PI_ERR_SPOOL_CMP_B 0x00000001 +#define PI_ERR_SPOOL_CMP_A 0x00000002 +#define PI_ERR_SPUR_MSG_B 0x00000004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_SPUR_MSG_A 0x00000008 +#define PI_ERR_WRB_TERR_B 0x00000010 +#define PI_ERR_WRB_TERR_A 0x00000020 +#define PI_ERR_WRB_WERR_B 0x00000040 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_WRB_WERR_A 0x00000080 +#define PI_ERR_SYSSTATE_B 0x00000100 +#define PI_ERR_SYSSTATE_A 0x00000200 +#define PI_ERR_SYSAD_DATA_B 0x00000400 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_SYSAD_DATA_A 0x00000800 +#define PI_ERR_SYSAD_ADDR_B 0x00001000 +#define PI_ERR_SYSAD_ADDR_A 0x00002000 +#define PI_ERR_SYSCMD_DATA_B 0x00004000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_SYSCMD_DATA_A 0x00008000 +#define PI_ERR_SYSCMD_ADDR_B 0x00010000 +#define PI_ERR_SYSCMD_ADDR_A 0x00020000 +#define PI_ERR_BAD_SPOOL_B 0x00040000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_BAD_SPOOL_A 0x00080000 +#define PI_ERR_UNCAC_UNCORR_B 0x00100000 +#define PI_ERR_UNCAC_UNCORR_A 0x00200000 +#define PI_ERR_SYSSTATE_TAG_B 0x00400000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_SYSSTATE_TAG_A 0x00800000 +#define PI_ERR_MD_UNCORR 0x01000000 +#define PI_ERR_CLEAR_ALL_A 0x00aaaaaa +#define PI_ERR_CLEAR_ALL_B 0x00555555 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_FATAL_ERR_CPU_A (PI_ERR_SYSSTATE_TAG_A | PI_ERR_BAD_SPOOL_A | PI_ERR_SYSCMD_ADDR_A | PI_ERR_SYSCMD_DATA_A | PI_ERR_SYSAD_ADDR_A | PI_ERR_SYSAD_DATA_A | PI_ERR_SYSSTATE_A) +#define PI_MISC_ERR_CPU_A (PI_ERR_UNCAC_UNCORR_A | PI_ERR_WRB_WERR_A | PI_ERR_WRB_TERR_A | PI_ERR_SPUR_MSG_A | PI_ERR_SPOOL_CMP_A) +#define PI_FATAL_ERR_CPU_B (PI_ERR_SYSSTATE_TAG_B | PI_ERR_BAD_SPOOL_B | PI_ERR_SYSCMD_ADDR_B | PI_ERR_SYSCMD_DATA_B | PI_ERR_SYSAD_ADDR_B | PI_ERR_SYSAD_DATA_B | PI_ERR_SYSSTATE_B) +#define PI_MISC_ERR_CPU_B (PI_ERR_UNCAC_UNCORR_B | PI_ERR_WRB_WERR_B | PI_ERR_WRB_TERR_B | PI_ERR_SPUR_MSG_B | PI_ERR_SPOOL_CMP_B) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_GENERIC (PI_ERR_MD_UNCORR) +#define PI_ERR_ST0_TYPE_MASK 0x0000000000000007 +#define PI_ERR_ST0_TYPE_SHFT 0 +#define PI_ERR_ST0_REQNUM_MASK 0x0000000000000038 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_ST0_REQNUM_SHFT 3 +#define PI_ERR_ST0_SUPPL_MASK 0x000000000001ffc0 +#define PI_ERR_ST0_SUPPL_SHFT 6 +#define PI_ERR_ST0_CMD_MASK 0x0000000001fe0000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_ST0_CMD_SHFT 17 +#define PI_ERR_ST0_ADDR_MASK 0x3ffffffffe000000 +#define PI_ERR_ST0_ADDR_SHFT 25 +#define PI_ERR_ST0_OVERRUN_MASK 0x4000000000000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_ST0_OVERRUN_SHFT 62 +#define PI_ERR_ST0_VALID_MASK 0x8000000000000000 +#define PI_ERR_ST0_VALID_SHFT 63 +#define PI_ERR_ST1_SPOOL_MASK 0x00000000001fffff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_ST1_SPOOL_SHFT 0 +#define PI_ERR_ST1_TOUTCNT_MASK 0x000000001fe00000 +#define PI_ERR_ST1_TOUTCNT_SHFT 21 +#define PI_ERR_ST1_INVCNT_MASK 0x0000007fe0000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_ST1_INVCNT_SHFT 29 +#define PI_ERR_ST1_CRBNUM_MASK 0x0000038000000000 +#define PI_ERR_ST1_CRBNUM_SHFT 39 +#define PI_ERR_ST1_WRBRRB_MASK 0x0000040000000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_ST1_WRBRRB_SHFT 42 +#define PI_ERR_ST1_CRBSTAT_MASK 0x001ff80000000000 +#define PI_ERR_ST1_CRBSTAT_SHFT 43 +#define PI_ERR_ST1_MSGSRC_MASK 0xffe0000000000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_ST1_MSGSRC_SHFT 53 +#define PI_ERR_STK_TYPE_MASK 0x0000000000000003 +#define PI_ERR_STK_TYPE_SHFT 0 +#define PI_ERR_STK_SUPPL_MASK 0x0000000000000038 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_STK_SUPPL_SHFT 3 +#define PI_ERR_STK_REQNUM_MASK 0x00000000000001c0 +#define PI_ERR_STK_REQNUM_SHFT 6 +#define PI_ERR_STK_CRBNUM_MASK 0x0000000000000e00 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_STK_CRBNUM_SHFT 9 +#define PI_ERR_STK_WRBRRB_MASK 0x0000000000001000 +#define PI_ERR_STK_WRBRRB_SHFT 12 +#define PI_ERR_STK_CRBSTAT_MASK 0x00000000007fe000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_STK_CRBSTAT_SHFT 13 +#define PI_ERR_STK_CMD_MASK 0x000000007f800000 +#define PI_ERR_STK_CMD_SHFT 23 +#define PI_ERR_STK_ADDR_MASK 0xffffffff80000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_STK_ADDR_SHFT 31 +#define PI_ERR_RD_PRERR 1 +#define PI_ERR_RD_DERR 2 +#define PI_ERR_RD_TERR 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_WR_WERR 0 +#define PI_ERR_WR_PWERR 1 +#define PI_ERR_WR_TERR 3 +#define PI_ERR_RRB 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_ERR_WRB 1 +#define PI_ERR_ANY_CRB 2 +#define ERR_STK_ADDR_SHFT 7 +#define ERR_STAT0_ADDR_SHFT 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_MIN_STACK_SIZE 4096 +#define PI_STACK_SIZE_SHFT 12 +#define ERR_STACK_SIZE_BYTES(_sz) ((_sz) ? (PI_MIN_STACK_SIZE << ((_sz) - 1)) : 0) +#ifndef __ASSEMBLY__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct err_stack_format { + u64 sk_addr : 33, + sk_cmd : 8, + sk_crb_sts : 10, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + sk_rw_rb : 1, + sk_crb_num : 3, + sk_t5_req : 3, + sk_suppl : 3, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + sk_err_type: 3; +}; +typedef union pi_err_stack { + u64 pi_stk_word; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + struct err_stack_format pi_stk_fmt; +} pi_err_stack_t; +struct err_status0_format { + u64 s0_valid : 1, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + s0_ovr_run : 1, + s0_addr : 37, + s0_cmd : 8, + s0_supl : 11, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + s0_t5_req : 3, + s0_err_type: 3; +}; +typedef union pi_err_stat0 { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 pi_stat0_word; + struct err_status0_format pi_stat0_fmt; +} pi_err_stat0_t; +struct err_status1_format { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + u64 s1_src : 11, + s1_crb_sts : 10, + s1_rw_rb : 1, + s1_crb_num : 3, +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + s1_inval_cnt:10, + s1_to_cnt : 8, + s1_spl_cnt : 21; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef union pi_err_stat1 { + u64 pi_stat1_word; + struct err_status1_format pi_stat1_fmt; +} pi_err_stat1_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef u64 rtc_time_t; +#endif +#define PI_SYSAD_ERRCHK_ECCGEN 0x01 +#define PI_SYSAD_ERRCHK_QUALGEN 0x02 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_SYSAD_ERRCHK_SADP 0x04 +#define PI_SYSAD_ERRCHK_CMDP 0x08 +#define PI_SYSAD_ERRCHK_STATE 0x10 +#define PI_SYSAD_ERRCHK_QUAL 0x20 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_SYSAD_CHECK_ALL 0x3f +#define HUB_IP_PEND0 0x0400 +#define HUB_IP_PEND1_CC 0x0800 +#define HUB_IP_RT 0x1000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HUB_IP_PROF 0x2000 +#define HUB_IP_ERROR 0x4000 +#define HUB_IP_MASK 0x7c00 +#define PRLC_USE_INT_SHFT 16 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRLC_USE_INT_MASK (UINT64_CAST 1 << 16) +#define PRLC_USE_INT (UINT64_CAST 1 << 16) +#define PRLC_GCLK_SHFT 15 +#define PRLC_GCLK_MASK (UINT64_CAST 1 << 15) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRLC_GCLK (UINT64_CAST 1 << 15) +#define PRLC_GCLK_COUNT_SHFT 8 +#define PRLC_GCLK_COUNT_MASK (UINT64_CAST 0x7f << 8) +#define PRLC_MAX_COUNT_SHFT 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PRLC_MAX_COUNT_MASK (UINT64_CAST 0x7f << 1) +#define PRLC_GCLK_EN_SHFT 0 +#define PRLC_GCLK_EN_MASK (UINT64_CAST 1) +#define PRLC_GCLK_EN (UINT64_CAST 1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PI_NACK_CNT_EN_SHFT 20 +#define PI_NACK_CNT_EN_MASK 0x100000 +#define PI_NACK_CNT_MASK 0x0fffff +#define PI_NACK_CNT_MAX 0x0fffff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sn/types.h b/9/platforms/android-16/arch-mips/usr/include/asm/sn/types.h new file mode 100644 index 0000000..4079458 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sn/types.h @@ -0,0 +1,35 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SN_TYPES_H +#define _ASM_SN_TYPES_H +#include <linux/types.h> +typedef unsigned long cpuid_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef unsigned long cnodemask_t; +typedef signed short nasid_t; +typedef signed short cnodeid_t; +typedef signed char partid_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef signed short moduleid_t; +typedef signed short cmoduleid_t; +typedef unsigned char clusterid_t; +typedef unsigned long pfn_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef dev_t vertex_hdl_t; +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/socket.h b/9/platforms/android-16/arch-mips/usr/include/asm/socket.h new file mode 100644 index 0000000..4dbbe85 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/socket.h @@ -0,0 +1,80 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SOCKET_H +#define _ASM_SOCKET_H +#include <asm/sockios.h> +#define SOL_SOCKET 0xffff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SO_DEBUG 0x0001 +#define SO_REUSEADDR 0x0004 +#define SO_KEEPALIVE 0x0008 +#define SO_DONTROUTE 0x0010 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SO_BROADCAST 0x0020 +#define SO_LINGER 0x0080 +#define SO_OOBINLINE 0x0100 +#define SO_TYPE 0x1008 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SO_STYLE SO_TYPE +#define SO_ERROR 0x1007 +#define SO_SNDBUF 0x1001 +#define SO_RCVBUF 0x1002 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SO_SNDLOWAT 0x1003 +#define SO_RCVLOWAT 0x1004 +#define SO_SNDTIMEO 0x1005 +#define SO_RCVTIMEO 0x1006 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SO_ACCEPTCONN 0x1009 +#define SO_PROTOCOL 0x1028 +#define SO_DOMAIN 0x1029 +#define SO_NO_CHECK 11 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SO_PRIORITY 12 +#define SO_BSDCOMPAT 14 +#define SO_PASSCRED 17 +#define SO_PEERCRED 18 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SO_SECURITY_AUTHENTICATION 22 +#define SO_SECURITY_ENCRYPTION_TRANSPORT 23 +#define SO_SECURITY_ENCRYPTION_NETWORK 24 +#define SO_BINDTODEVICE 25 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SO_ATTACH_FILTER 26 +#define SO_DETACH_FILTER 27 +#define SO_PEERNAME 28 +#define SO_TIMESTAMP 29 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SCM_TIMESTAMP SO_TIMESTAMP +#define SO_PEERSEC 30 +#define SO_SNDBUFFORCE 31 +#define SO_RCVBUFFORCE 33 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SO_PASSSEC 34 +#define SO_TIMESTAMPNS 35 +#define SCM_TIMESTAMPNS SO_TIMESTAMPNS +#define SO_MARK 36 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SO_TIMESTAMPING 37 +#define SCM_TIMESTAMPING SO_TIMESTAMPING +#define SO_RXQ_OVFL 40 +#define SO_WIFI_STATUS 41 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SCM_WIFI_STATUS SO_WIFI_STATUS +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sockios.h b/9/platforms/android-16/arch-mips/usr/include/asm/sockios.h new file mode 100644 index 0000000..0e5a4ac --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sockios.h @@ -0,0 +1,31 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SOCKIOS_H +#define _ASM_SOCKIOS_H +#include <asm/ioctl.h> +#define FIOGETOWN _IOR('f', 123, int) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FIOSETOWN _IOW('f', 124, int) +#define SIOCATMARK _IOR('s', 7, int) +#define SIOCSPGRP _IOW('s', 8, pid_t) +#define SIOCGPGRP _IOR('s', 9, pid_t) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SIOCGSTAMP 0x8906 +#define SIOCGSTAMPNS 0x8907 +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/stat.h b/9/platforms/android-16/arch-mips/usr/include/asm/stat.h new file mode 100644 index 0000000..a8fee78 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/stat.h @@ -0,0 +1,110 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_STAT_H +#define _ASM_STAT_H +#include <linux/types.h> +#include <asm/sgidefs.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#if _MIPS_SIM == _MIPS_SIM_ABI32 || _MIPS_SIM == _MIPS_SIM_NABI32 +struct stat { + unsigned st_dev; + long st_pad1[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + ino_t st_ino; + mode_t st_mode; + nlink_t st_nlink; + uid_t st_uid; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + gid_t st_gid; + unsigned st_rdev; + long st_pad2[2]; + off_t st_size; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + long st_pad3; + time_t st_atime; + long st_atime_nsec; + time_t st_mtime; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + long st_mtime_nsec; + time_t st_ctime; + long st_ctime_nsec; + long st_blksize; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + long st_blocks; + long st_pad4[14]; +}; +struct stat64 { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long st_dev; + unsigned long st_pad0[3]; + unsigned long long st_ino; + mode_t st_mode; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + nlink_t st_nlink; + uid_t st_uid; + gid_t st_gid; + unsigned long st_rdev; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long st_pad1[3]; + long long st_size; + time_t st_atime; + unsigned long st_atime_nsec; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + time_t st_mtime; + unsigned long st_mtime_nsec; + time_t st_ctime; + unsigned long st_ctime_nsec; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long st_blksize; + unsigned long st_pad2; + long long st_blocks; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#if _MIPS_SIM == _MIPS_SIM_ABI64 +struct stat { + unsigned int st_dev; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int st_pad0[3]; + unsigned long st_ino; + mode_t st_mode; + nlink_t st_nlink; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + uid_t st_uid; + gid_t st_gid; + unsigned int st_rdev; + unsigned int st_pad1[3]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + off_t st_size; + unsigned int st_atime; + unsigned int st_atime_nsec; + unsigned int st_mtime; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int st_mtime_nsec; + unsigned int st_ctime; + unsigned int st_ctime_nsec; + unsigned int st_blksize; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned int st_pad2; + unsigned long st_blocks; +}; +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define STAT_HAVE_NSEC 1 +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/statfs.h b/9/platforms/android-16/arch-mips/usr/include/asm/statfs.h new file mode 100644 index 0000000..a6e5c6a --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/statfs.h @@ -0,0 +1,98 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_STATFS_H +#define _ASM_STATFS_H +#include <linux/posix_types.h> +#include <asm/sgidefs.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct statfs { + long f_type; +#define f_fstyp f_type + long f_bsize; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + long f_frsize; + long f_blocks; + long f_bfree; + long f_files; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + long f_ffree; + long f_bavail; + __kernel_fsid_t f_fsid; + long f_namelen; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + long f_spare[6]; +}; +#if _MIPS_SIM == _MIPS_SIM_ABI32 || _MIPS_SIM == _MIPS_SIM_NABI32 +struct statfs64 { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __u32 f_type; + __u32 f_bsize; + __u32 f_frsize; + __u32 __pad; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __u64 f_blocks; + __u64 f_bfree; + __u64 f_files; + __u64 f_ffree; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __u64 f_bavail; + __kernel_fsid_t f_fsid; + __u32 f_namelen; + __u32 f_spare[6]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#endif +#if _MIPS_SIM == _MIPS_SIM_ABI64 +struct statfs64 { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + long f_type; + long f_bsize; + long f_frsize; + long f_blocks; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + long f_bfree; + long f_files; + long f_ffree; + long f_bavail; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __kernel_fsid_t f_fsid; + long f_namelen; + long f_spare[6]; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct compat_statfs64 { + __u32 f_type; + __u32 f_bsize; + __u32 f_frsize; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __u32 __pad; + __u64 f_blocks; + __u64 f_bfree; + __u64 f_files; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __u64 f_ffree; + __u64 f_bavail; + __kernel_fsid_t f_fsid; + __u32 f_namelen; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + __u32 f_spare[6]; +}; +#endif +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/string.h b/9/platforms/android-16/arch-mips/usr/include/asm/string.h new file mode 100644 index 0000000..6f375a3 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/string.h @@ -0,0 +1,33 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_STRING_H +#define _ASM_STRING_H +#ifndef IN_STRING_C +#define __HAVE_ARCH_STRCPY +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __HAVE_ARCH_STRNCPY +#define __HAVE_ARCH_STRCMP +#endif +#define __HAVE_ARCH_STRNCMP +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __HAVE_ARCH_MEMSET +#define __HAVE_ARCH_MEMCPY +#define __HAVE_ARCH_MEMMOVE +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/sysmips.h b/9/platforms/android-16/arch-mips/usr/include/asm/sysmips.h new file mode 100644 index 0000000..665f67f --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/sysmips.h @@ -0,0 +1,28 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SYSMIPS_H +#define _ASM_SYSMIPS_H +#define SETNAME 1 +#define FLUSH_CACHE 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_FIXADE 7 +#define MIPS_RDNVRAM 10 +#define MIPS_ATOMIC_SET 2001 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/system.h b/9/platforms/android-16/arch-mips/usr/include/asm/system.h new file mode 100644 index 0000000..b2b2760 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/system.h @@ -0,0 +1,41 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_SYSTEM_H +#define _ASM_SYSTEM_H +#include <linux/types.h> +#include <linux/irqflags.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/addrspace.h> +#include <asm/barrier.h> +#include <asm/cmpxchg.h> +#include <asm/cpu-features.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <asm/dsp.h> +#include <asm/war.h> +struct task_struct; +#define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define switch_to(prev, next, last) do { __mips_mt_fpaff_switch_to(prev); if (cpu_has_dsp) __save_dsp(prev); (last) = resume(prev, next, task_thread_info(next)); } while (0) +#define finish_arch_switch(prev) do { if (cpu_has_dsp) __restore_dsp(current); if (cpu_has_userlocal) write_c0_userlocal(current_thread_info()->tp_value); } while (0) +#define __xchg_u64 __xchg_u64_unsupported_on_32bit_kernels +#define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr)))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef void (*vi_handler_t)(void); +#define __ARCH_WANT_UNLOCKED_CTXSW +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/termbits.h b/9/platforms/android-16/arch-mips/usr/include/asm/termbits.h new file mode 100644 index 0000000..6a0add7 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/termbits.h @@ -0,0 +1,240 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_TERMBITS_H +#define _ASM_TERMBITS_H +#include <linux/posix_types.h> +typedef unsigned char cc_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef unsigned int speed_t; +typedef unsigned int tcflag_t; +#define NCCS 23 +struct termios { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + tcflag_t c_iflag; + tcflag_t c_oflag; + tcflag_t c_cflag; + tcflag_t c_lflag; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + cc_t c_line; + cc_t c_cc[NCCS]; +}; +struct termios2 { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + tcflag_t c_iflag; + tcflag_t c_oflag; + tcflag_t c_cflag; + tcflag_t c_lflag; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + cc_t c_line; + cc_t c_cc[NCCS]; + speed_t c_ispeed; + speed_t c_ospeed; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +struct ktermios { + tcflag_t c_iflag; + tcflag_t c_oflag; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + tcflag_t c_cflag; + tcflag_t c_lflag; + cc_t c_line; + cc_t c_cc[NCCS]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + speed_t c_ispeed; + speed_t c_ospeed; +}; +#define VINTR 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VQUIT 1 +#define VERASE 2 +#define VKILL 3 +#define VMIN 4 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VTIME 5 +#define VEOL2 6 +#define VSWTC 7 +#define VSWTCH VSWTC +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VSTART 8 +#define VSTOP 9 +#define VSUSP 10 +#define VREPRINT 12 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VDISCARD 13 +#define VWERASE 14 +#define VLNEXT 15 +#define VEOF 16 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VEOL 17 +#define IGNBRK 0000001 +#define BRKINT 0000002 +#define IGNPAR 0000004 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define PARMRK 0000010 +#define INPCK 0000020 +#define ISTRIP 0000040 +#define INLCR 0000100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IGNCR 0000200 +#define ICRNL 0000400 +#define IUCLC 0001000 +#define IXON 0002000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define IXANY 0004000 +#define IXOFF 0010000 +#define IMAXBEL 0020000 +#define IUTF8 0040000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define OPOST 0000001 +#define OLCUC 0000002 +#define ONLCR 0000004 +#define OCRNL 0000010 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ONOCR 0000020 +#define ONLRET 0000040 +#define OFILL 0000100 +#define OFDEL 0000200 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define NLDLY 0000400 +#define NL0 0000000 +#define NL1 0000400 +#define CRDLY 0003000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CR0 0000000 +#define CR1 0001000 +#define CR2 0002000 +#define CR3 0003000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TABDLY 0014000 +#define TAB0 0000000 +#define TAB1 0004000 +#define TAB2 0010000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TAB3 0014000 +#define XTABS 0014000 +#define BSDLY 0020000 +#define BS0 0000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BS1 0020000 +#define VTDLY 0040000 +#define VT0 0000000 +#define VT1 0040000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define FFDLY 0100000 +#define FF0 0000000 +#define FF1 0100000 +#define CBAUD 0010017 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define B0 0000000 +#define B50 0000001 +#define B75 0000002 +#define B110 0000003 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define B134 0000004 +#define B150 0000005 +#define B200 0000006 +#define B300 0000007 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define B600 0000010 +#define B1200 0000011 +#define B1800 0000012 +#define B2400 0000013 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define B4800 0000014 +#define B9600 0000015 +#define B19200 0000016 +#define B38400 0000017 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EXTA B19200 +#define EXTB B38400 +#define CSIZE 0000060 +#define CS5 0000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CS6 0000020 +#define CS7 0000040 +#define CS8 0000060 +#define CSTOPB 0000100 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CREAD 0000200 +#define PARENB 0000400 +#define PARODD 0001000 +#define HUPCL 0002000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CLOCAL 0004000 +#define CBAUDEX 0010000 +#define BOTHER 0010000 +#define B57600 0010001 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define B115200 0010002 +#define B230400 0010003 +#define B460800 0010004 +#define B500000 0010005 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define B576000 0010006 +#define B921600 0010007 +#define B1000000 0010010 +#define B1152000 0010011 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define B1500000 0010012 +#define B2000000 0010013 +#define B2500000 0010014 +#define B3000000 0010015 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define B3500000 0010016 +#define B4000000 0010017 +#define CIBAUD 002003600000 +#define CMSPAR 010000000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define CRTSCTS 020000000000 +#define IBSHIFT 16 +#define ISIG 0000001 +#define ICANON 0000002 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define XCASE 0000004 +#define ECHO 0000010 +#define ECHOE 0000020 +#define ECHOK 0000040 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ECHONL 0000100 +#define NOFLSH 0000200 +#define IEXTEN 0000400 +#define ECHOCTL 0001000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define ECHOPRT 0002000 +#define ECHOKE 0004000 +#define FLUSHO 0020000 +#define PENDIN 0040000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TOSTOP 0100000 +#define ITOSTOP TOSTOP +#define TIOCSER_TEMT 0x01 +#define TCOOFF 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TCOON 1 +#define TCIOFF 2 +#define TCION 3 +#define TCIFLUSH 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TCOFLUSH 1 +#define TCIOFLUSH 2 +#define TCSANOW TCSETS +#define TCSADRAIN TCSETSW +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TCSAFLUSH TCSETSF +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/termios.h b/9/platforms/android-16/arch-mips/usr/include/asm/termios.h new file mode 100644 index 0000000..d6f230e --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/termios.h @@ -0,0 +1,109 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_TERMIOS_H +#define _ASM_TERMIOS_H +#include <asm/termbits.h> +#include <asm/ioctls.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct sgttyb { + char sg_ispeed; + char sg_ospeed; + char sg_erase; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + char sg_kill; + int sg_flags; +}; +struct tchars { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + char t_intrc; + char t_quitc; + char t_startc; + char t_stopc; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + char t_eofc; + char t_brkc; +}; +struct ltchars { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + char t_suspc; + char t_dsuspc; + char t_rprntc; + char t_flushc; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + char t_werasc; + char t_lnextc; +}; +struct winsize { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned short ws_row; + unsigned short ws_col; + unsigned short ws_xpixel; + unsigned short ws_ypixel; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +}; +#define NCC 8 +struct termio { + unsigned short c_iflag; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned short c_oflag; + unsigned short c_cflag; + unsigned short c_lflag; + char c_line; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned char c_cc[NCCS]; +}; +#define TIOCM_LE 0x001 +#define TIOCM_DTR 0x002 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCM_RTS 0x004 +#define TIOCM_ST 0x010 +#define TIOCM_SR 0x020 +#define TIOCM_CTS 0x040 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCM_CAR 0x100 +#define TIOCM_CD TIOCM_CAR +#define TIOCM_RNG 0x200 +#define TIOCM_RI TIOCM_RNG +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TIOCM_DSR 0x400 +#define TIOCM_OUT1 0x2000 +#define TIOCM_OUT2 0x4000 +#define TIOCM_LOOP 0x8000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define N_TTY 0 +#define N_SLIP 1 +#define N_MOUSE 2 +#define N_PPP 3 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define N_STRIP 4 +#define N_AX25 5 +#define N_X25 6 +#define N_6PACK 7 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define N_MASC 8 +#define N_R3964 9 +#define N_PROFIBUS_FDL 10 +#define N_IRDA 11 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define N_SMSBLOCK 12 +#define N_HDLC 13 +#define N_SYNC_PPP 14 +#define N_HCI 15 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/thread_info.h b/9/platforms/android-16/arch-mips/usr/include/asm/thread_info.h new file mode 100644 index 0000000..07fc66b --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/thread_info.h @@ -0,0 +1,21 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_THREAD_INFO_H +#define _ASM_THREAD_INFO_H +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/timex.h b/9/platforms/android-16/arch-mips/usr/include/asm/timex.h new file mode 100644 index 0000000..99baac6 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/timex.h @@ -0,0 +1,21 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_TIMEX_H +#define _ASM_TIMEX_H +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/tlb.h b/9/platforms/android-16/arch-mips/usr/include/asm/tlb.h new file mode 100644 index 0000000..6f65f1d --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/tlb.h @@ -0,0 +1,28 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_TLB_H +#define __ASM_TLB_H +#define tlb_start_vma(tlb, vma) do { if (!tlb->fullmm) flush_cache_range(vma, vma->vm_start, vma->vm_end); } while (0) +#define tlb_end_vma(tlb, vma) do { } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) +#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) +#include <asm-generic/tlb.h> +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/tlbflush.h b/9/platforms/android-16/arch-mips/usr/include/asm/tlbflush.h new file mode 100644 index 0000000..dab8e17 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/tlbflush.h @@ -0,0 +1,30 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_TLBFLUSH_H +#define __ASM_TLBFLUSH_H +#include <linux/mm.h> +#define flush_tlb_all() local_flush_tlb_all() +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define flush_tlb_mm(mm) local_flush_tlb_mm(mm) +#define flush_tlb_range(vma, vmaddr, end) local_flush_tlb_range(vma, vmaddr, end) +#define flush_tlb_kernel_range(vmaddr,end) local_flush_tlb_kernel_range(vmaddr, end) +#define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define flush_tlb_one(vaddr) local_flush_tlb_one(vaddr) +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/topology.h b/9/platforms/android-16/arch-mips/usr/include/asm/topology.h new file mode 100644 index 0000000..550e423 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/topology.h @@ -0,0 +1,23 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_TOPOLOGY_H +#define __ASM_TOPOLOGY_H +#include <topology.h> +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/txx9irq.h b/9/platforms/android-16/arch-mips/usr/include/asm/txx9irq.h new file mode 100644 index 0000000..3272abe --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/txx9irq.h @@ -0,0 +1,25 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_TXX9IRQ_H +#define __ASM_TXX9IRQ_H +#include <irq.h> +#define TXX9_IRQ_BASE 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define TXx9_MAX_IR 32 +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/types.h b/9/platforms/android-16/arch-mips/usr/include/asm/types.h new file mode 100644 index 0000000..f67dd88 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/types.h @@ -0,0 +1,44 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_TYPES_H +#define _ASM_TYPES_H +#ifndef __ASSEMBLY__ +typedef unsigned short umode_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef __signed__ char __s8; +typedef unsigned char __u8; +typedef __signed__ short __s16; +typedef unsigned short __u16; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef __signed__ int __s32; +typedef unsigned int __u32; +#if _MIPS_SZLONG == 64 +typedef __signed__ long __s64; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef unsigned long __u64; +#else +#ifdef __GNUC__ +typedef __signed__ long long __s64; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef unsigned long long __u64; +#endif +#endif +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/uaccess.h b/9/platforms/android-16/arch-mips/usr/include/asm/uaccess.h new file mode 100644 index 0000000..96025d3 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/uaccess.h @@ -0,0 +1,99 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_UACCESS_H +#define _ASM_UACCESS_H +#include <linux/kernel.h> +#include <linux/errno.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <linux/thread_info.h> +#include <asm-generic/uaccess.h> +#define __UA_LIMIT 0x80000000UL +#define __UA_ADDR ".word" +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __UA_LA "la" +#define __UA_ADDU "addu" +#define __UA_t0 "$8" +#define __UA_t1 "$9" +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KERNEL_DS ((mm_segment_t) { 0UL }) +#define USER_DS ((mm_segment_t) { __UA_LIMIT }) +#define VERIFY_READ 0 +#define VERIFY_WRITE 1 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define get_ds() (KERNEL_DS) +#define get_fs() (current_thread_info()->addr_limit) +#define set_fs(x) (current_thread_info()->addr_limit = (x)) +#define segment_eq(a, b) ((a).seg == (b).seg) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __ua_size(size) ((__builtin_constant_p(size) && (signed long) (size) > 0) ? 0 : (size)) +#define __access_mask get_fs().seg +#define __access_ok(addr, size, mask) (((signed long)((mask) & ((addr) | ((addr) + (size)) | __ua_size(size)))) == 0) +#define access_ok(type, addr, size) likely(__access_ok((unsigned long)(addr), (size), __access_mask)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define put_user(x,ptr) __put_user_check((x), (ptr), sizeof(*(ptr))) +#define get_user(x,ptr) __get_user_check((x), (ptr), sizeof(*(ptr))) +#define __put_user(x,ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr))) +#define __get_user(x,ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr))) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +struct __large_struct { unsigned long buf[100]; }; +#define __m(x) (*(struct __large_struct __user *)(x)) +#define __GET_USER_DW(val, ptr) __get_user_asm_ll32(val, ptr) +#define __get_user_common(val, size, ptr) do { switch (size) { case 1: __get_user_asm(val, "lb", ptr); break; case 2: __get_user_asm(val, "lh", ptr); break; case 4: __get_user_asm(val, "lw", ptr); break; case 8: __GET_USER_DW(val, ptr); break; default: __get_user_unknown(); break; } } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __get_user_nocheck(x, ptr, size) ({ long __gu_err; __get_user_common((x), size, ptr); __gu_err; }) +#define __get_user_check(x, ptr, size) ({ long __gu_err = -EFAULT; const __typeof__(*(ptr)) __user * __gu_ptr = (ptr); if (likely(access_ok(VERIFY_READ, __gu_ptr, size))) __get_user_common((x), size, __gu_ptr); __gu_err; }) +#define __get_user_asm(val, insn, addr) { long __gu_tmp; __asm__ __volatile__( "1: " insn " %1, %3 \n" "2: \n" " .section .fixup,\"ax\" \n" "3: li %0, %4 \n" " j 2b \n" " .previous \n" " .section __ex_table,\"a\" \n" " "__UA_ADDR "\t1b, 3b \n" " .previous \n" : "=r" (__gu_err), "=r" (__gu_tmp) : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); (val) = (__typeof__(*(addr))) __gu_tmp; } +#define __get_user_asm_ll32(val, addr) { union { unsigned long long l; __typeof__(*(addr)) t; } __gu_tmp; __asm__ __volatile__( "1: lw %1, (%3) \n" "2: lw %D1, 4(%3) \n" "3: .section .fixup,\"ax\" \n" "4: li %0, %4 \n" " move %1, $0 \n" " move %D1, $0 \n" " j 3b \n" " .previous \n" " .section __ex_table,\"a\" \n" " " __UA_ADDR " 1b, 4b \n" " " __UA_ADDR " 2b, 4b \n" " .previous \n" : "=r" (__gu_err), "=&r" (__gu_tmp.l) : "0" (0), "r" (addr), "i" (-EFAULT)); (val) = __gu_tmp.t; } +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __PUT_USER_DW(ptr) __put_user_asm_ll32(ptr) +#define __put_user_nocheck(x, ptr, size) ({ __typeof__(*(ptr)) __pu_val; long __pu_err = 0; __pu_val = (x); switch (size) { case 1: __put_user_asm("sb", ptr); break; case 2: __put_user_asm("sh", ptr); break; case 4: __put_user_asm("sw", ptr); break; case 8: __PUT_USER_DW(ptr); break; default: __put_user_unknown(); break; } __pu_err; }) +#define __put_user_check(x, ptr, size) ({ __typeof__(*(ptr)) __user *__pu_addr = (ptr); __typeof__(*(ptr)) __pu_val = (x); long __pu_err = -EFAULT; if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) { switch (size) { case 1: __put_user_asm("sb", __pu_addr); break; case 2: __put_user_asm("sh", __pu_addr); break; case 4: __put_user_asm("sw", __pu_addr); break; case 8: __PUT_USER_DW(__pu_addr); break; default: __put_user_unknown(); break; } } __pu_err; }) +#define __put_user_asm(insn, ptr) { __asm__ __volatile__( "1: " insn " %z2, %3 # __put_user_asm\n" "2: \n" " .section .fixup,\"ax\" \n" "3: li %0, %4 \n" " j 2b \n" " .previous \n" " .section __ex_table,\"a\" \n" " " __UA_ADDR " 1b, 3b \n" " .previous \n" : "=r" (__pu_err) : "0" (0), "Jr" (__pu_val), "o" (__m(ptr)), "i" (-EFAULT)); } +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __put_user_asm_ll32(ptr) { __asm__ __volatile__( "1: sw %2, (%3) # __put_user_asm_ll32 \n" "2: sw %D2, 4(%3) \n" "3: \n" " .section .fixup,\"ax\" \n" "4: li %0, %4 \n" " j 3b \n" " .previous \n" " .section __ex_table,\"a\" \n" " " __UA_ADDR " 1b, 4b \n" " " __UA_ADDR " 2b, 4b \n" " .previous" : "=r" (__pu_err) : "0" (0), "r" (__pu_val), "r" (ptr), "i" (-EFAULT)); } +#ifdef MODULE +#define __MODULE_JAL(destination) ".set\tnoat\n\t" __UA_LA "\t$1, " #destination "\n\t" "jalr\t$1\n\t" ".set\tat\n\t" +#else +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __MODULE_JAL(destination) "jal\t" #destination "\n\t" +#endif +#define DADDI_SCRATCH "$0" +#define __invoke_copy_to_user(to, from, n) ({ register void __user *__cu_to_r __asm__("$4"); register const void *__cu_from_r __asm__("$5"); register long __cu_len_r __asm__("$6"); __cu_to_r = (to); __cu_from_r = (from); __cu_len_r = (n); __asm__ __volatile__( __MODULE_JAL(__copy_user) : "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r) : : "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", DADDI_SCRATCH, "memory"); __cu_len_r; }) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __copy_to_user(to, from, n) ({ void __user *__cu_to; const void *__cu_from; long __cu_len; might_sleep(); __cu_to = (to); __cu_from = (from); __cu_len = (n); __cu_len = __invoke_copy_to_user(__cu_to, __cu_from, __cu_len); __cu_len; }) +#define __copy_to_user_inatomic(to, from, n) ({ void __user *__cu_to; const void *__cu_from; long __cu_len; __cu_to = (to); __cu_from = (from); __cu_len = (n); __cu_len = __invoke_copy_to_user(__cu_to, __cu_from, __cu_len); __cu_len; }) +#define __copy_from_user_inatomic(to, from, n) ({ void *__cu_to; const void __user *__cu_from; long __cu_len; __cu_to = (to); __cu_from = (from); __cu_len = (n); __cu_len = __invoke_copy_from_user_inatomic(__cu_to, __cu_from, __cu_len); __cu_len; }) +#define copy_to_user(to, from, n) ({ void __user *__cu_to; const void *__cu_from; long __cu_len; might_sleep(); __cu_to = (to); __cu_from = (from); __cu_len = (n); if (access_ok(VERIFY_WRITE, __cu_to, __cu_len)) __cu_len = __invoke_copy_to_user(__cu_to, __cu_from, __cu_len); __cu_len; }) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __invoke_copy_from_user(to, from, n) ({ register void *__cu_to_r __asm__("$4"); register const void __user *__cu_from_r __asm__("$5"); register long __cu_len_r __asm__("$6"); __cu_to_r = (to); __cu_from_r = (from); __cu_len_r = (n); __asm__ __volatile__( ".set\tnoreorder\n\t" __MODULE_JAL(__copy_user) ".set\tnoat\n\t" __UA_ADDU "\t$1, %1, %2\n\t" ".set\tat\n\t" ".set\treorder" : "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r) : : "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", DADDI_SCRATCH, "memory"); __cu_len_r; }) +#define __invoke_copy_from_user_inatomic(to, from, n) ({ register void *__cu_to_r __asm__("$4"); register const void __user *__cu_from_r __asm__("$5"); register long __cu_len_r __asm__("$6"); __cu_to_r = (to); __cu_from_r = (from); __cu_len_r = (n); __asm__ __volatile__( ".set\tnoreorder\n\t" __MODULE_JAL(__copy_user_inatomic) ".set\tnoat\n\t" __UA_ADDU "\t$1, %1, %2\n\t" ".set\tat\n\t" ".set\treorder" : "+r" (__cu_to_r), "+r" (__cu_from_r), "+r" (__cu_len_r) : : "$8", "$9", "$10", "$11", "$12", "$15", "$24", "$31", DADDI_SCRATCH, "memory"); __cu_len_r; }) +#define __copy_from_user(to, from, n) ({ void *__cu_to; const void __user *__cu_from; long __cu_len; might_sleep(); __cu_to = (to); __cu_from = (from); __cu_len = (n); __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, __cu_len); __cu_len; }) +#define copy_from_user(to, from, n) ({ void *__cu_to; const void __user *__cu_from; long __cu_len; might_sleep(); __cu_to = (to); __cu_from = (from); __cu_len = (n); if (access_ok(VERIFY_READ, __cu_from, __cu_len)) __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, __cu_len); __cu_len; }) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __copy_in_user(to, from, n) __copy_from_user(to, from, n) +#define copy_in_user(to, from, n) ({ void __user *__cu_to; const void __user *__cu_from; long __cu_len; might_sleep(); __cu_to = (to); __cu_from = (from); __cu_len = (n); if (likely(access_ok(VERIFY_READ, __cu_from, __cu_len) && access_ok(VERIFY_WRITE, __cu_to, __cu_len))) __cu_len = __invoke_copy_from_user(__cu_to, __cu_from, __cu_len); __cu_len; }) +#define clear_user(addr,n) ({ void __user * __cl_addr = (addr); unsigned long __cl_size = (n); if (__cl_size && access_ok(VERIFY_WRITE, ((unsigned long)(__cl_addr)), __cl_size)) __cl_size = __clear_user(__cl_addr, __cl_size); __cl_size; }) +struct exception_table_entry +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +{ + unsigned long insn; + unsigned long nextinsn; +}; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/unaligned.h b/9/platforms/android-16/arch-mips/usr/include/asm/unaligned.h new file mode 100644 index 0000000..3024aeb --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/unaligned.h @@ -0,0 +1,41 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_MIPS_UNALIGNED_H +#define _ASM_MIPS_UNALIGNED_H +#include <linux/compiler.h> +#ifdef __MIPSEB__ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <linux/unaligned/be_struct.h> +#include <linux/unaligned/le_byteshift.h> +#include <linux/unaligned/generic.h> +#define get_unaligned __get_unaligned_be +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define put_unaligned __put_unaligned_be +#elif defined(__MIPSEL__) +#include <linux/unaligned/le_struct.h> +#include <linux/unaligned/be_byteshift.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#include <linux/unaligned/generic.h> +#define get_unaligned __get_unaligned_le +#define put_unaligned __put_unaligned_le +#else +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#error "MIPS, but neither __MIPSEB__, nor __MIPSEL__???" +#endif +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/unistd.h b/9/platforms/android-16/arch-mips/usr/include/asm/unistd.h new file mode 100644 index 0000000..4a8744f --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/unistd.h @@ -0,0 +1,1246 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_UNISTD_H +#define _ASM_UNISTD_H +#include <asm/sgidefs.h> +#if _MIPS_SIM == _MIPS_SIM_ABI32 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_Linux 4000 +#define __NR_syscall (__NR_Linux + 0) +#define __NR_exit (__NR_Linux + 1) +#define __NR_fork (__NR_Linux + 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_read (__NR_Linux + 3) +#define __NR_write (__NR_Linux + 4) +#define __NR_open (__NR_Linux + 5) +#define __NR_close (__NR_Linux + 6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_waitpid (__NR_Linux + 7) +#define __NR_creat (__NR_Linux + 8) +#define __NR_link (__NR_Linux + 9) +#define __NR_unlink (__NR_Linux + 10) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_execve (__NR_Linux + 11) +#define __NR_chdir (__NR_Linux + 12) +#define __NR_time (__NR_Linux + 13) +#define __NR_mknod (__NR_Linux + 14) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_chmod (__NR_Linux + 15) +#define __NR_lchown (__NR_Linux + 16) +#define __NR_break (__NR_Linux + 17) +#define __NR_unused18 (__NR_Linux + 18) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_lseek (__NR_Linux + 19) +#define __NR_getpid (__NR_Linux + 20) +#define __NR_mount (__NR_Linux + 21) +#define __NR_umount (__NR_Linux + 22) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setuid (__NR_Linux + 23) +#define __NR_getuid (__NR_Linux + 24) +#define __NR_stime (__NR_Linux + 25) +#define __NR_ptrace (__NR_Linux + 26) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_alarm (__NR_Linux + 27) +#define __NR_unused28 (__NR_Linux + 28) +#define __NR_pause (__NR_Linux + 29) +#define __NR_utime (__NR_Linux + 30) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_stty (__NR_Linux + 31) +#define __NR_gtty (__NR_Linux + 32) +#define __NR_access (__NR_Linux + 33) +#define __NR_nice (__NR_Linux + 34) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_ftime (__NR_Linux + 35) +#define __NR_sync (__NR_Linux + 36) +#define __NR_kill (__NR_Linux + 37) +#define __NR_rename (__NR_Linux + 38) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_mkdir (__NR_Linux + 39) +#define __NR_rmdir (__NR_Linux + 40) +#define __NR_dup (__NR_Linux + 41) +#define __NR_pipe (__NR_Linux + 42) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_times (__NR_Linux + 43) +#define __NR_prof (__NR_Linux + 44) +#define __NR_brk (__NR_Linux + 45) +#define __NR_setgid (__NR_Linux + 46) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getgid (__NR_Linux + 47) +#define __NR_signal (__NR_Linux + 48) +#define __NR_geteuid (__NR_Linux + 49) +#define __NR_getegid (__NR_Linux + 50) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_acct (__NR_Linux + 51) +#define __NR_umount2 (__NR_Linux + 52) +#define __NR_lock (__NR_Linux + 53) +#define __NR_ioctl (__NR_Linux + 54) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fcntl (__NR_Linux + 55) +#define __NR_mpx (__NR_Linux + 56) +#define __NR_setpgid (__NR_Linux + 57) +#define __NR_ulimit (__NR_Linux + 58) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_unused59 (__NR_Linux + 59) +#define __NR_umask (__NR_Linux + 60) +#define __NR_chroot (__NR_Linux + 61) +#define __NR_ustat (__NR_Linux + 62) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_dup2 (__NR_Linux + 63) +#define __NR_getppid (__NR_Linux + 64) +#define __NR_getpgrp (__NR_Linux + 65) +#define __NR_setsid (__NR_Linux + 66) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sigaction (__NR_Linux + 67) +#define __NR_sgetmask (__NR_Linux + 68) +#define __NR_ssetmask (__NR_Linux + 69) +#define __NR_setreuid (__NR_Linux + 70) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setregid (__NR_Linux + 71) +#define __NR_sigsuspend (__NR_Linux + 72) +#define __NR_sigpending (__NR_Linux + 73) +#define __NR_sethostname (__NR_Linux + 74) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setrlimit (__NR_Linux + 75) +#define __NR_getrlimit (__NR_Linux + 76) +#define __NR_getrusage (__NR_Linux + 77) +#define __NR_gettimeofday (__NR_Linux + 78) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_settimeofday (__NR_Linux + 79) +#define __NR_getgroups (__NR_Linux + 80) +#define __NR_setgroups (__NR_Linux + 81) +#define __NR_reserved82 (__NR_Linux + 82) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_symlink (__NR_Linux + 83) +#define __NR_unused84 (__NR_Linux + 84) +#define __NR_readlink (__NR_Linux + 85) +#define __NR_uselib (__NR_Linux + 86) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_swapon (__NR_Linux + 87) +#define __NR_reboot (__NR_Linux + 88) +#define __NR_readdir (__NR_Linux + 89) +#define __NR_mmap (__NR_Linux + 90) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_munmap (__NR_Linux + 91) +#define __NR_truncate (__NR_Linux + 92) +#define __NR_ftruncate (__NR_Linux + 93) +#define __NR_fchmod (__NR_Linux + 94) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fchown (__NR_Linux + 95) +#define __NR_getpriority (__NR_Linux + 96) +#define __NR_setpriority (__NR_Linux + 97) +#define __NR_profil (__NR_Linux + 98) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_statfs (__NR_Linux + 99) +#define __NR_fstatfs (__NR_Linux + 100) +#define __NR_ioperm (__NR_Linux + 101) +#define __NR_socketcall (__NR_Linux + 102) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_syslog (__NR_Linux + 103) +#define __NR_setitimer (__NR_Linux + 104) +#define __NR_getitimer (__NR_Linux + 105) +#define __NR_stat (__NR_Linux + 106) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_lstat (__NR_Linux + 107) +#define __NR_fstat (__NR_Linux + 108) +#define __NR_unused109 (__NR_Linux + 109) +#define __NR_iopl (__NR_Linux + 110) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_vhangup (__NR_Linux + 111) +#define __NR_idle (__NR_Linux + 112) +#define __NR_vm86 (__NR_Linux + 113) +#define __NR_wait4 (__NR_Linux + 114) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_swapoff (__NR_Linux + 115) +#define __NR_sysinfo (__NR_Linux + 116) +#define __NR_ipc (__NR_Linux + 117) +#define __NR_fsync (__NR_Linux + 118) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sigreturn (__NR_Linux + 119) +#define __NR_clone (__NR_Linux + 120) +#define __NR_setdomainname (__NR_Linux + 121) +#define __NR_uname (__NR_Linux + 122) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_modify_ldt (__NR_Linux + 123) +#define __NR_adjtimex (__NR_Linux + 124) +#define __NR_mprotect (__NR_Linux + 125) +#define __NR_sigprocmask (__NR_Linux + 126) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_create_module (__NR_Linux + 127) +#define __NR_init_module (__NR_Linux + 128) +#define __NR_delete_module (__NR_Linux + 129) +#define __NR_get_kernel_syms (__NR_Linux + 130) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_quotactl (__NR_Linux + 131) +#define __NR_getpgid (__NR_Linux + 132) +#define __NR_fchdir (__NR_Linux + 133) +#define __NR_bdflush (__NR_Linux + 134) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sysfs (__NR_Linux + 135) +#define __NR_personality (__NR_Linux + 136) +#define __NR_afs_syscall (__NR_Linux + 137) +#define __NR_setfsuid (__NR_Linux + 138) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setfsgid (__NR_Linux + 139) +#define __NR__llseek (__NR_Linux + 140) +#define __NR_getdents (__NR_Linux + 141) +#define __NR__newselect (__NR_Linux + 142) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_flock (__NR_Linux + 143) +#define __NR_msync (__NR_Linux + 144) +#define __NR_readv (__NR_Linux + 145) +#define __NR_writev (__NR_Linux + 146) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_cacheflush (__NR_Linux + 147) +#define __NR_cachectl (__NR_Linux + 148) +#define __NR_sysmips (__NR_Linux + 149) +#define __NR_unused150 (__NR_Linux + 150) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getsid (__NR_Linux + 151) +#define __NR_fdatasync (__NR_Linux + 152) +#define __NR__sysctl (__NR_Linux + 153) +#define __NR_mlock (__NR_Linux + 154) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_munlock (__NR_Linux + 155) +#define __NR_mlockall (__NR_Linux + 156) +#define __NR_munlockall (__NR_Linux + 157) +#define __NR_sched_setparam (__NR_Linux + 158) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sched_getparam (__NR_Linux + 159) +#define __NR_sched_setscheduler (__NR_Linux + 160) +#define __NR_sched_getscheduler (__NR_Linux + 161) +#define __NR_sched_yield (__NR_Linux + 162) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sched_get_priority_max (__NR_Linux + 163) +#define __NR_sched_get_priority_min (__NR_Linux + 164) +#define __NR_sched_rr_get_interval (__NR_Linux + 165) +#define __NR_nanosleep (__NR_Linux + 166) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_mremap (__NR_Linux + 167) +#define __NR_accept (__NR_Linux + 168) +#define __NR_bind (__NR_Linux + 169) +#define __NR_connect (__NR_Linux + 170) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getpeername (__NR_Linux + 171) +#define __NR_getsockname (__NR_Linux + 172) +#define __NR_getsockopt (__NR_Linux + 173) +#define __NR_listen (__NR_Linux + 174) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_recv (__NR_Linux + 175) +#define __NR_recvfrom (__NR_Linux + 176) +#define __NR_recvmsg (__NR_Linux + 177) +#define __NR_send (__NR_Linux + 178) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sendmsg (__NR_Linux + 179) +#define __NR_sendto (__NR_Linux + 180) +#define __NR_setsockopt (__NR_Linux + 181) +#define __NR_shutdown (__NR_Linux + 182) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_socket (__NR_Linux + 183) +#define __NR_socketpair (__NR_Linux + 184) +#define __NR_setresuid (__NR_Linux + 185) +#define __NR_getresuid (__NR_Linux + 186) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_query_module (__NR_Linux + 187) +#define __NR_poll (__NR_Linux + 188) +#define __NR_nfsservctl (__NR_Linux + 189) +#define __NR_setresgid (__NR_Linux + 190) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getresgid (__NR_Linux + 191) +#define __NR_prctl (__NR_Linux + 192) +#define __NR_rt_sigreturn (__NR_Linux + 193) +#define __NR_rt_sigaction (__NR_Linux + 194) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_rt_sigprocmask (__NR_Linux + 195) +#define __NR_rt_sigpending (__NR_Linux + 196) +#define __NR_rt_sigtimedwait (__NR_Linux + 197) +#define __NR_rt_sigqueueinfo (__NR_Linux + 198) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_rt_sigsuspend (__NR_Linux + 199) +#define __NR_pread64 (__NR_Linux + 200) +#define __NR_pwrite64 (__NR_Linux + 201) +#define __NR_chown (__NR_Linux + 202) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getcwd (__NR_Linux + 203) +#define __NR_capget (__NR_Linux + 204) +#define __NR_capset (__NR_Linux + 205) +#define __NR_sigaltstack (__NR_Linux + 206) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sendfile (__NR_Linux + 207) +#define __NR_getpmsg (__NR_Linux + 208) +#define __NR_putpmsg (__NR_Linux + 209) +#define __NR_mmap2 (__NR_Linux + 210) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_truncate64 (__NR_Linux + 211) +#define __NR_ftruncate64 (__NR_Linux + 212) +#define __NR_stat64 (__NR_Linux + 213) +#define __NR_lstat64 (__NR_Linux + 214) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fstat64 (__NR_Linux + 215) +#define __NR_pivot_root (__NR_Linux + 216) +#define __NR_mincore (__NR_Linux + 217) +#define __NR_madvise (__NR_Linux + 218) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getdents64 (__NR_Linux + 219) +#define __NR_fcntl64 (__NR_Linux + 220) +#define __NR_reserved221 (__NR_Linux + 221) +#define __NR_gettid (__NR_Linux + 222) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_readahead (__NR_Linux + 223) +#define __NR_setxattr (__NR_Linux + 224) +#define __NR_lsetxattr (__NR_Linux + 225) +#define __NR_fsetxattr (__NR_Linux + 226) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getxattr (__NR_Linux + 227) +#define __NR_lgetxattr (__NR_Linux + 228) +#define __NR_fgetxattr (__NR_Linux + 229) +#define __NR_listxattr (__NR_Linux + 230) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_llistxattr (__NR_Linux + 231) +#define __NR_flistxattr (__NR_Linux + 232) +#define __NR_removexattr (__NR_Linux + 233) +#define __NR_lremovexattr (__NR_Linux + 234) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fremovexattr (__NR_Linux + 235) +#define __NR_tkill (__NR_Linux + 236) +#define __NR_sendfile64 (__NR_Linux + 237) +#define __NR_futex (__NR_Linux + 238) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sched_setaffinity (__NR_Linux + 239) +#define __NR_sched_getaffinity (__NR_Linux + 240) +#define __NR_io_setup (__NR_Linux + 241) +#define __NR_io_destroy (__NR_Linux + 242) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_io_getevents (__NR_Linux + 243) +#define __NR_io_submit (__NR_Linux + 244) +#define __NR_io_cancel (__NR_Linux + 245) +#define __NR_exit_group (__NR_Linux + 246) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_lookup_dcookie (__NR_Linux + 247) +#define __NR_epoll_create (__NR_Linux + 248) +#define __NR_epoll_ctl (__NR_Linux + 249) +#define __NR_epoll_wait (__NR_Linux + 250) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_remap_file_pages (__NR_Linux + 251) +#define __NR_set_tid_address (__NR_Linux + 252) +#define __NR_restart_syscall (__NR_Linux + 253) +#define __NR_fadvise64 (__NR_Linux + 254) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_statfs64 (__NR_Linux + 255) +#define __NR_fstatfs64 (__NR_Linux + 256) +#define __NR_timer_create (__NR_Linux + 257) +#define __NR_timer_settime (__NR_Linux + 258) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_timer_gettime (__NR_Linux + 259) +#define __NR_timer_getoverrun (__NR_Linux + 260) +#define __NR_timer_delete (__NR_Linux + 261) +#define __NR_clock_settime (__NR_Linux + 262) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_clock_gettime (__NR_Linux + 263) +#define __NR_clock_getres (__NR_Linux + 264) +#define __NR_clock_nanosleep (__NR_Linux + 265) +#define __NR_tgkill (__NR_Linux + 266) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_utimes (__NR_Linux + 267) +#define __NR_mbind (__NR_Linux + 268) +#define __NR_get_mempolicy (__NR_Linux + 269) +#define __NR_set_mempolicy (__NR_Linux + 270) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_mq_open (__NR_Linux + 271) +#define __NR_mq_unlink (__NR_Linux + 272) +#define __NR_mq_timedsend (__NR_Linux + 273) +#define __NR_mq_timedreceive (__NR_Linux + 274) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_mq_notify (__NR_Linux + 275) +#define __NR_mq_getsetattr (__NR_Linux + 276) +#define __NR_vserver (__NR_Linux + 277) +#define __NR_waitid (__NR_Linux + 278) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_add_key (__NR_Linux + 280) +#define __NR_request_key (__NR_Linux + 281) +#define __NR_keyctl (__NR_Linux + 282) +#define __NR_set_thread_area (__NR_Linux + 283) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_inotify_init (__NR_Linux + 284) +#define __NR_inotify_add_watch (__NR_Linux + 285) +#define __NR_inotify_rm_watch (__NR_Linux + 286) +#define __NR_migrate_pages (__NR_Linux + 287) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_openat (__NR_Linux + 288) +#define __NR_mkdirat (__NR_Linux + 289) +#define __NR_mknodat (__NR_Linux + 290) +#define __NR_fchownat (__NR_Linux + 291) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_futimesat (__NR_Linux + 292) +#define __NR_fstatat64 (__NR_Linux + 293) +#define __NR_unlinkat (__NR_Linux + 294) +#define __NR_renameat (__NR_Linux + 295) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_linkat (__NR_Linux + 296) +#define __NR_symlinkat (__NR_Linux + 297) +#define __NR_readlinkat (__NR_Linux + 298) +#define __NR_fchmodat (__NR_Linux + 299) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_faccessat (__NR_Linux + 300) +#define __NR_pselect6 (__NR_Linux + 301) +#define __NR_ppoll (__NR_Linux + 302) +#define __NR_unshare (__NR_Linux + 303) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_splice (__NR_Linux + 304) +#define __NR_sync_file_range (__NR_Linux + 305) +#define __NR_tee (__NR_Linux + 306) +#define __NR_vmsplice (__NR_Linux + 307) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_move_pages (__NR_Linux + 308) +#define __NR_set_robust_list (__NR_Linux + 309) +#define __NR_get_robust_list (__NR_Linux + 310) +#define __NR_kexec_load (__NR_Linux + 311) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getcpu (__NR_Linux + 312) +#define __NR_epoll_pwait (__NR_Linux + 313) +#define __NR_ioprio_set (__NR_Linux + 314) +#define __NR_ioprio_get (__NR_Linux + 315) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_utimensat (__NR_Linux + 316) +#define __NR_signalfd (__NR_Linux + 317) +#define __NR_timerfd (__NR_Linux + 318) +#define __NR_eventfd (__NR_Linux + 319) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fallocate (__NR_Linux + 320) +#define __NR_timerfd_create (__NR_Linux + 321) +#define __NR_timerfd_gettime (__NR_Linux + 322) +#define __NR_timerfd_settime (__NR_Linux + 323) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_signalfd4 (__NR_Linux + 324) +#define __NR_eventfd2 (__NR_Linux + 325) +#define __NR_epoll_create1 (__NR_Linux + 326) +#define __NR_dup3 (__NR_Linux + 327) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_pipe2 (__NR_Linux + 328) +#define __NR_inotify_init1 (__NR_Linux + 329) +#define __NR_preadv (__NR_Linux + 330) +#define __NR_pwritev (__NR_Linux + 331) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_rt_tgsigqueueinfo (__NR_Linux + 332) +#define __NR_perf_event_open (__NR_Linux + 333) +#define __NR_accept4 (__NR_Linux + 334) +#define __NR_recvmmsg (__NR_Linux + 335) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fanotify_init (__NR_Linux + 336) +#define __NR_fanotify_mark (__NR_Linux + 337) +#define __NR_prlimit64 (__NR_Linux + 338) +#define __NR_name_to_handle_at (__NR_Linux + 339) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_open_by_handle_at (__NR_Linux + 340) +#define __NR_clock_adjtime (__NR_Linux + 341) +#define __NR_syncfs (__NR_Linux + 342) +#define __NR_sendmmsg (__NR_Linux + 343) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setns (__NR_Linux + 344) +#define __NR_process_vm_readv (__NR_Linux + 345) +#define __NR_process_vm_writev (__NR_Linux + 346) +#define __NR_Linux_syscalls 346 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#define __NR_O32_Linux 4000 +#define __NR_O32_Linux_syscalls 346 +#if _MIPS_SIM == _MIPS_SIM_ABI64 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_Linux 5000 +#define __NR_read (__NR_Linux + 0) +#define __NR_write (__NR_Linux + 1) +#define __NR_open (__NR_Linux + 2) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_close (__NR_Linux + 3) +#define __NR_stat (__NR_Linux + 4) +#define __NR_fstat (__NR_Linux + 5) +#define __NR_lstat (__NR_Linux + 6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_poll (__NR_Linux + 7) +#define __NR_lseek (__NR_Linux + 8) +#define __NR_mmap (__NR_Linux + 9) +#define __NR_mprotect (__NR_Linux + 10) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_munmap (__NR_Linux + 11) +#define __NR_brk (__NR_Linux + 12) +#define __NR_rt_sigaction (__NR_Linux + 13) +#define __NR_rt_sigprocmask (__NR_Linux + 14) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_ioctl (__NR_Linux + 15) +#define __NR_pread64 (__NR_Linux + 16) +#define __NR_pwrite64 (__NR_Linux + 17) +#define __NR_readv (__NR_Linux + 18) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_writev (__NR_Linux + 19) +#define __NR_access (__NR_Linux + 20) +#define __NR_pipe (__NR_Linux + 21) +#define __NR__newselect (__NR_Linux + 22) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sched_yield (__NR_Linux + 23) +#define __NR_mremap (__NR_Linux + 24) +#define __NR_msync (__NR_Linux + 25) +#define __NR_mincore (__NR_Linux + 26) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_madvise (__NR_Linux + 27) +#define __NR_shmget (__NR_Linux + 28) +#define __NR_shmat (__NR_Linux + 29) +#define __NR_shmctl (__NR_Linux + 30) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_dup (__NR_Linux + 31) +#define __NR_dup2 (__NR_Linux + 32) +#define __NR_pause (__NR_Linux + 33) +#define __NR_nanosleep (__NR_Linux + 34) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getitimer (__NR_Linux + 35) +#define __NR_setitimer (__NR_Linux + 36) +#define __NR_alarm (__NR_Linux + 37) +#define __NR_getpid (__NR_Linux + 38) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sendfile (__NR_Linux + 39) +#define __NR_socket (__NR_Linux + 40) +#define __NR_connect (__NR_Linux + 41) +#define __NR_accept (__NR_Linux + 42) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sendto (__NR_Linux + 43) +#define __NR_recvfrom (__NR_Linux + 44) +#define __NR_sendmsg (__NR_Linux + 45) +#define __NR_recvmsg (__NR_Linux + 46) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_shutdown (__NR_Linux + 47) +#define __NR_bind (__NR_Linux + 48) +#define __NR_listen (__NR_Linux + 49) +#define __NR_getsockname (__NR_Linux + 50) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getpeername (__NR_Linux + 51) +#define __NR_socketpair (__NR_Linux + 52) +#define __NR_setsockopt (__NR_Linux + 53) +#define __NR_getsockopt (__NR_Linux + 54) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_clone (__NR_Linux + 55) +#define __NR_fork (__NR_Linux + 56) +#define __NR_execve (__NR_Linux + 57) +#define __NR_exit (__NR_Linux + 58) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_wait4 (__NR_Linux + 59) +#define __NR_kill (__NR_Linux + 60) +#define __NR_uname (__NR_Linux + 61) +#define __NR_semget (__NR_Linux + 62) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_semop (__NR_Linux + 63) +#define __NR_semctl (__NR_Linux + 64) +#define __NR_shmdt (__NR_Linux + 65) +#define __NR_msgget (__NR_Linux + 66) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_msgsnd (__NR_Linux + 67) +#define __NR_msgrcv (__NR_Linux + 68) +#define __NR_msgctl (__NR_Linux + 69) +#define __NR_fcntl (__NR_Linux + 70) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_flock (__NR_Linux + 71) +#define __NR_fsync (__NR_Linux + 72) +#define __NR_fdatasync (__NR_Linux + 73) +#define __NR_truncate (__NR_Linux + 74) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_ftruncate (__NR_Linux + 75) +#define __NR_getdents (__NR_Linux + 76) +#define __NR_getcwd (__NR_Linux + 77) +#define __NR_chdir (__NR_Linux + 78) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fchdir (__NR_Linux + 79) +#define __NR_rename (__NR_Linux + 80) +#define __NR_mkdir (__NR_Linux + 81) +#define __NR_rmdir (__NR_Linux + 82) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_creat (__NR_Linux + 83) +#define __NR_link (__NR_Linux + 84) +#define __NR_unlink (__NR_Linux + 85) +#define __NR_symlink (__NR_Linux + 86) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_readlink (__NR_Linux + 87) +#define __NR_chmod (__NR_Linux + 88) +#define __NR_fchmod (__NR_Linux + 89) +#define __NR_chown (__NR_Linux + 90) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fchown (__NR_Linux + 91) +#define __NR_lchown (__NR_Linux + 92) +#define __NR_umask (__NR_Linux + 93) +#define __NR_gettimeofday (__NR_Linux + 94) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getrlimit (__NR_Linux + 95) +#define __NR_getrusage (__NR_Linux + 96) +#define __NR_sysinfo (__NR_Linux + 97) +#define __NR_times (__NR_Linux + 98) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_ptrace (__NR_Linux + 99) +#define __NR_getuid (__NR_Linux + 100) +#define __NR_syslog (__NR_Linux + 101) +#define __NR_getgid (__NR_Linux + 102) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setuid (__NR_Linux + 103) +#define __NR_setgid (__NR_Linux + 104) +#define __NR_geteuid (__NR_Linux + 105) +#define __NR_getegid (__NR_Linux + 106) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setpgid (__NR_Linux + 107) +#define __NR_getppid (__NR_Linux + 108) +#define __NR_getpgrp (__NR_Linux + 109) +#define __NR_setsid (__NR_Linux + 110) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setreuid (__NR_Linux + 111) +#define __NR_setregid (__NR_Linux + 112) +#define __NR_getgroups (__NR_Linux + 113) +#define __NR_setgroups (__NR_Linux + 114) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setresuid (__NR_Linux + 115) +#define __NR_getresuid (__NR_Linux + 116) +#define __NR_setresgid (__NR_Linux + 117) +#define __NR_getresgid (__NR_Linux + 118) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getpgid (__NR_Linux + 119) +#define __NR_setfsuid (__NR_Linux + 120) +#define __NR_setfsgid (__NR_Linux + 121) +#define __NR_getsid (__NR_Linux + 122) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_capget (__NR_Linux + 123) +#define __NR_capset (__NR_Linux + 124) +#define __NR_rt_sigpending (__NR_Linux + 125) +#define __NR_rt_sigtimedwait (__NR_Linux + 126) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_rt_sigqueueinfo (__NR_Linux + 127) +#define __NR_rt_sigsuspend (__NR_Linux + 128) +#define __NR_sigaltstack (__NR_Linux + 129) +#define __NR_utime (__NR_Linux + 130) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_mknod (__NR_Linux + 131) +#define __NR_personality (__NR_Linux + 132) +#define __NR_ustat (__NR_Linux + 133) +#define __NR_statfs (__NR_Linux + 134) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fstatfs (__NR_Linux + 135) +#define __NR_sysfs (__NR_Linux + 136) +#define __NR_getpriority (__NR_Linux + 137) +#define __NR_setpriority (__NR_Linux + 138) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sched_setparam (__NR_Linux + 139) +#define __NR_sched_getparam (__NR_Linux + 140) +#define __NR_sched_setscheduler (__NR_Linux + 141) +#define __NR_sched_getscheduler (__NR_Linux + 142) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sched_get_priority_max (__NR_Linux + 143) +#define __NR_sched_get_priority_min (__NR_Linux + 144) +#define __NR_sched_rr_get_interval (__NR_Linux + 145) +#define __NR_mlock (__NR_Linux + 146) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_munlock (__NR_Linux + 147) +#define __NR_mlockall (__NR_Linux + 148) +#define __NR_munlockall (__NR_Linux + 149) +#define __NR_vhangup (__NR_Linux + 150) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_pivot_root (__NR_Linux + 151) +#define __NR__sysctl (__NR_Linux + 152) +#define __NR_prctl (__NR_Linux + 153) +#define __NR_adjtimex (__NR_Linux + 154) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setrlimit (__NR_Linux + 155) +#define __NR_chroot (__NR_Linux + 156) +#define __NR_sync (__NR_Linux + 157) +#define __NR_acct (__NR_Linux + 158) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_settimeofday (__NR_Linux + 159) +#define __NR_mount (__NR_Linux + 160) +#define __NR_umount2 (__NR_Linux + 161) +#define __NR_swapon (__NR_Linux + 162) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_swapoff (__NR_Linux + 163) +#define __NR_reboot (__NR_Linux + 164) +#define __NR_sethostname (__NR_Linux + 165) +#define __NR_setdomainname (__NR_Linux + 166) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_create_module (__NR_Linux + 167) +#define __NR_init_module (__NR_Linux + 168) +#define __NR_delete_module (__NR_Linux + 169) +#define __NR_get_kernel_syms (__NR_Linux + 170) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_query_module (__NR_Linux + 171) +#define __NR_quotactl (__NR_Linux + 172) +#define __NR_nfsservctl (__NR_Linux + 173) +#define __NR_getpmsg (__NR_Linux + 174) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_putpmsg (__NR_Linux + 175) +#define __NR_afs_syscall (__NR_Linux + 176) +#define __NR_reserved177 (__NR_Linux + 177) +#define __NR_gettid (__NR_Linux + 178) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_readahead (__NR_Linux + 179) +#define __NR_setxattr (__NR_Linux + 180) +#define __NR_lsetxattr (__NR_Linux + 181) +#define __NR_fsetxattr (__NR_Linux + 182) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getxattr (__NR_Linux + 183) +#define __NR_lgetxattr (__NR_Linux + 184) +#define __NR_fgetxattr (__NR_Linux + 185) +#define __NR_listxattr (__NR_Linux + 186) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_llistxattr (__NR_Linux + 187) +#define __NR_flistxattr (__NR_Linux + 188) +#define __NR_removexattr (__NR_Linux + 189) +#define __NR_lremovexattr (__NR_Linux + 190) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fremovexattr (__NR_Linux + 191) +#define __NR_tkill (__NR_Linux + 192) +#define __NR_reserved193 (__NR_Linux + 193) +#define __NR_futex (__NR_Linux + 194) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sched_setaffinity (__NR_Linux + 195) +#define __NR_sched_getaffinity (__NR_Linux + 196) +#define __NR_cacheflush (__NR_Linux + 197) +#define __NR_cachectl (__NR_Linux + 198) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sysmips (__NR_Linux + 199) +#define __NR_io_setup (__NR_Linux + 200) +#define __NR_io_destroy (__NR_Linux + 201) +#define __NR_io_getevents (__NR_Linux + 202) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_io_submit (__NR_Linux + 203) +#define __NR_io_cancel (__NR_Linux + 204) +#define __NR_exit_group (__NR_Linux + 205) +#define __NR_lookup_dcookie (__NR_Linux + 206) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_epoll_create (__NR_Linux + 207) +#define __NR_epoll_ctl (__NR_Linux + 208) +#define __NR_epoll_wait (__NR_Linux + 209) +#define __NR_remap_file_pages (__NR_Linux + 210) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_rt_sigreturn (__NR_Linux + 211) +#define __NR_set_tid_address (__NR_Linux + 212) +#define __NR_restart_syscall (__NR_Linux + 213) +#define __NR_semtimedop (__NR_Linux + 214) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fadvise64 (__NR_Linux + 215) +#define __NR_timer_create (__NR_Linux + 216) +#define __NR_timer_settime (__NR_Linux + 217) +#define __NR_timer_gettime (__NR_Linux + 218) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_timer_getoverrun (__NR_Linux + 219) +#define __NR_timer_delete (__NR_Linux + 220) +#define __NR_clock_settime (__NR_Linux + 221) +#define __NR_clock_gettime (__NR_Linux + 222) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_clock_getres (__NR_Linux + 223) +#define __NR_clock_nanosleep (__NR_Linux + 224) +#define __NR_tgkill (__NR_Linux + 225) +#define __NR_utimes (__NR_Linux + 226) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_mbind (__NR_Linux + 227) +#define __NR_get_mempolicy (__NR_Linux + 228) +#define __NR_set_mempolicy (__NR_Linux + 229) +#define __NR_mq_open (__NR_Linux + 230) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_mq_unlink (__NR_Linux + 231) +#define __NR_mq_timedsend (__NR_Linux + 232) +#define __NR_mq_timedreceive (__NR_Linux + 233) +#define __NR_mq_notify (__NR_Linux + 234) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_mq_getsetattr (__NR_Linux + 235) +#define __NR_vserver (__NR_Linux + 236) +#define __NR_waitid (__NR_Linux + 237) +#define __NR_add_key (__NR_Linux + 239) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_request_key (__NR_Linux + 240) +#define __NR_keyctl (__NR_Linux + 241) +#define __NR_set_thread_area (__NR_Linux + 242) +#define __NR_inotify_init (__NR_Linux + 243) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_inotify_add_watch (__NR_Linux + 244) +#define __NR_inotify_rm_watch (__NR_Linux + 245) +#define __NR_migrate_pages (__NR_Linux + 246) +#define __NR_openat (__NR_Linux + 247) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_mkdirat (__NR_Linux + 248) +#define __NR_mknodat (__NR_Linux + 249) +#define __NR_fchownat (__NR_Linux + 250) +#define __NR_futimesat (__NR_Linux + 251) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_newfstatat (__NR_Linux + 252) +#define __NR_unlinkat (__NR_Linux + 253) +#define __NR_renameat (__NR_Linux + 254) +#define __NR_linkat (__NR_Linux + 255) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_symlinkat (__NR_Linux + 256) +#define __NR_readlinkat (__NR_Linux + 257) +#define __NR_fchmodat (__NR_Linux + 258) +#define __NR_faccessat (__NR_Linux + 259) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_pselect6 (__NR_Linux + 260) +#define __NR_ppoll (__NR_Linux + 261) +#define __NR_unshare (__NR_Linux + 262) +#define __NR_splice (__NR_Linux + 263) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sync_file_range (__NR_Linux + 264) +#define __NR_tee (__NR_Linux + 265) +#define __NR_vmsplice (__NR_Linux + 266) +#define __NR_move_pages (__NR_Linux + 267) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_set_robust_list (__NR_Linux + 268) +#define __NR_get_robust_list (__NR_Linux + 269) +#define __NR_kexec_load (__NR_Linux + 270) +#define __NR_getcpu (__NR_Linux + 271) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_epoll_pwait (__NR_Linux + 272) +#define __NR_ioprio_set (__NR_Linux + 273) +#define __NR_ioprio_get (__NR_Linux + 274) +#define __NR_utimensat (__NR_Linux + 275) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_signalfd (__NR_Linux + 276) +#define __NR_timerfd (__NR_Linux + 277) +#define __NR_eventfd (__NR_Linux + 278) +#define __NR_fallocate (__NR_Linux + 279) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_timerfd_create (__NR_Linux + 280) +#define __NR_timerfd_gettime (__NR_Linux + 281) +#define __NR_timerfd_settime (__NR_Linux + 282) +#define __NR_signalfd4 (__NR_Linux + 283) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_eventfd2 (__NR_Linux + 284) +#define __NR_epoll_create1 (__NR_Linux + 285) +#define __NR_dup3 (__NR_Linux + 286) +#define __NR_pipe2 (__NR_Linux + 287) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_inotify_init1 (__NR_Linux + 288) +#define __NR_preadv (__NR_Linux + 289) +#define __NR_pwritev (__NR_Linux + 290) +#define __NR_rt_tgsigqueueinfo (__NR_Linux + 291) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_perf_event_open (__NR_Linux + 292) +#define __NR_accept4 (__NR_Linux + 293) +#define __NR_recvmmsg (__NR_Linux + 294) +#define __NR_fanotify_init (__NR_Linux + 295) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fanotify_mark (__NR_Linux + 296) +#define __NR_prlimit64 (__NR_Linux + 297) +#define __NR_name_to_handle_at (__NR_Linux + 298) +#define __NR_open_by_handle_at (__NR_Linux + 299) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_clock_adjtime (__NR_Linux + 300) +#define __NR_syncfs (__NR_Linux + 301) +#define __NR_sendmmsg (__NR_Linux + 302) +#define __NR_setns (__NR_Linux + 303) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_process_vm_readv (__NR_Linux + 304) +#define __NR_process_vm_writev (__NR_Linux + 305) +#define __NR_Linux_syscalls 305 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_64_Linux 5000 +#define __NR_64_Linux_syscalls 305 +#if _MIPS_SIM == _MIPS_SIM_NABI32 +#define __NR_Linux 6000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_read (__NR_Linux + 0) +#define __NR_write (__NR_Linux + 1) +#define __NR_open (__NR_Linux + 2) +#define __NR_close (__NR_Linux + 3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_stat (__NR_Linux + 4) +#define __NR_fstat (__NR_Linux + 5) +#define __NR_lstat (__NR_Linux + 6) +#define __NR_poll (__NR_Linux + 7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_lseek (__NR_Linux + 8) +#define __NR_mmap (__NR_Linux + 9) +#define __NR_mprotect (__NR_Linux + 10) +#define __NR_munmap (__NR_Linux + 11) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_brk (__NR_Linux + 12) +#define __NR_rt_sigaction (__NR_Linux + 13) +#define __NR_rt_sigprocmask (__NR_Linux + 14) +#define __NR_ioctl (__NR_Linux + 15) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_pread64 (__NR_Linux + 16) +#define __NR_pwrite64 (__NR_Linux + 17) +#define __NR_readv (__NR_Linux + 18) +#define __NR_writev (__NR_Linux + 19) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_access (__NR_Linux + 20) +#define __NR_pipe (__NR_Linux + 21) +#define __NR__newselect (__NR_Linux + 22) +#define __NR_sched_yield (__NR_Linux + 23) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_mremap (__NR_Linux + 24) +#define __NR_msync (__NR_Linux + 25) +#define __NR_mincore (__NR_Linux + 26) +#define __NR_madvise (__NR_Linux + 27) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_shmget (__NR_Linux + 28) +#define __NR_shmat (__NR_Linux + 29) +#define __NR_shmctl (__NR_Linux + 30) +#define __NR_dup (__NR_Linux + 31) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_dup2 (__NR_Linux + 32) +#define __NR_pause (__NR_Linux + 33) +#define __NR_nanosleep (__NR_Linux + 34) +#define __NR_getitimer (__NR_Linux + 35) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setitimer (__NR_Linux + 36) +#define __NR_alarm (__NR_Linux + 37) +#define __NR_getpid (__NR_Linux + 38) +#define __NR_sendfile (__NR_Linux + 39) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_socket (__NR_Linux + 40) +#define __NR_connect (__NR_Linux + 41) +#define __NR_accept (__NR_Linux + 42) +#define __NR_sendto (__NR_Linux + 43) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_recvfrom (__NR_Linux + 44) +#define __NR_sendmsg (__NR_Linux + 45) +#define __NR_recvmsg (__NR_Linux + 46) +#define __NR_shutdown (__NR_Linux + 47) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_bind (__NR_Linux + 48) +#define __NR_listen (__NR_Linux + 49) +#define __NR_getsockname (__NR_Linux + 50) +#define __NR_getpeername (__NR_Linux + 51) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_socketpair (__NR_Linux + 52) +#define __NR_setsockopt (__NR_Linux + 53) +#define __NR_getsockopt (__NR_Linux + 54) +#define __NR_clone (__NR_Linux + 55) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fork (__NR_Linux + 56) +#define __NR_execve (__NR_Linux + 57) +#define __NR_exit (__NR_Linux + 58) +#define __NR_wait4 (__NR_Linux + 59) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_kill (__NR_Linux + 60) +#define __NR_uname (__NR_Linux + 61) +#define __NR_semget (__NR_Linux + 62) +#define __NR_semop (__NR_Linux + 63) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_semctl (__NR_Linux + 64) +#define __NR_shmdt (__NR_Linux + 65) +#define __NR_msgget (__NR_Linux + 66) +#define __NR_msgsnd (__NR_Linux + 67) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_msgrcv (__NR_Linux + 68) +#define __NR_msgctl (__NR_Linux + 69) +#define __NR_fcntl (__NR_Linux + 70) +#define __NR_flock (__NR_Linux + 71) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fsync (__NR_Linux + 72) +#define __NR_fdatasync (__NR_Linux + 73) +#define __NR_truncate (__NR_Linux + 74) +#define __NR_ftruncate (__NR_Linux + 75) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getdents (__NR_Linux + 76) +#define __NR_getcwd (__NR_Linux + 77) +#define __NR_chdir (__NR_Linux + 78) +#define __NR_fchdir (__NR_Linux + 79) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_rename (__NR_Linux + 80) +#define __NR_mkdir (__NR_Linux + 81) +#define __NR_rmdir (__NR_Linux + 82) +#define __NR_creat (__NR_Linux + 83) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_link (__NR_Linux + 84) +#define __NR_unlink (__NR_Linux + 85) +#define __NR_symlink (__NR_Linux + 86) +#define __NR_readlink (__NR_Linux + 87) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_chmod (__NR_Linux + 88) +#define __NR_fchmod (__NR_Linux + 89) +#define __NR_chown (__NR_Linux + 90) +#define __NR_fchown (__NR_Linux + 91) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_lchown (__NR_Linux + 92) +#define __NR_umask (__NR_Linux + 93) +#define __NR_gettimeofday (__NR_Linux + 94) +#define __NR_getrlimit (__NR_Linux + 95) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getrusage (__NR_Linux + 96) +#define __NR_sysinfo (__NR_Linux + 97) +#define __NR_times (__NR_Linux + 98) +#define __NR_ptrace (__NR_Linux + 99) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getuid (__NR_Linux + 100) +#define __NR_syslog (__NR_Linux + 101) +#define __NR_getgid (__NR_Linux + 102) +#define __NR_setuid (__NR_Linux + 103) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setgid (__NR_Linux + 104) +#define __NR_geteuid (__NR_Linux + 105) +#define __NR_getegid (__NR_Linux + 106) +#define __NR_setpgid (__NR_Linux + 107) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getppid (__NR_Linux + 108) +#define __NR_getpgrp (__NR_Linux + 109) +#define __NR_setsid (__NR_Linux + 110) +#define __NR_setreuid (__NR_Linux + 111) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setregid (__NR_Linux + 112) +#define __NR_getgroups (__NR_Linux + 113) +#define __NR_setgroups (__NR_Linux + 114) +#define __NR_setresuid (__NR_Linux + 115) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_getresuid (__NR_Linux + 116) +#define __NR_setresgid (__NR_Linux + 117) +#define __NR_getresgid (__NR_Linux + 118) +#define __NR_getpgid (__NR_Linux + 119) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setfsuid (__NR_Linux + 120) +#define __NR_setfsgid (__NR_Linux + 121) +#define __NR_getsid (__NR_Linux + 122) +#define __NR_capget (__NR_Linux + 123) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_capset (__NR_Linux + 124) +#define __NR_rt_sigpending (__NR_Linux + 125) +#define __NR_rt_sigtimedwait (__NR_Linux + 126) +#define __NR_rt_sigqueueinfo (__NR_Linux + 127) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_rt_sigsuspend (__NR_Linux + 128) +#define __NR_sigaltstack (__NR_Linux + 129) +#define __NR_utime (__NR_Linux + 130) +#define __NR_mknod (__NR_Linux + 131) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_personality (__NR_Linux + 132) +#define __NR_ustat (__NR_Linux + 133) +#define __NR_statfs (__NR_Linux + 134) +#define __NR_fstatfs (__NR_Linux + 135) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sysfs (__NR_Linux + 136) +#define __NR_getpriority (__NR_Linux + 137) +#define __NR_setpriority (__NR_Linux + 138) +#define __NR_sched_setparam (__NR_Linux + 139) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sched_getparam (__NR_Linux + 140) +#define __NR_sched_setscheduler (__NR_Linux + 141) +#define __NR_sched_getscheduler (__NR_Linux + 142) +#define __NR_sched_get_priority_max (__NR_Linux + 143) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sched_get_priority_min (__NR_Linux + 144) +#define __NR_sched_rr_get_interval (__NR_Linux + 145) +#define __NR_mlock (__NR_Linux + 146) +#define __NR_munlock (__NR_Linux + 147) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_mlockall (__NR_Linux + 148) +#define __NR_munlockall (__NR_Linux + 149) +#define __NR_vhangup (__NR_Linux + 150) +#define __NR_pivot_root (__NR_Linux + 151) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR__sysctl (__NR_Linux + 152) +#define __NR_prctl (__NR_Linux + 153) +#define __NR_adjtimex (__NR_Linux + 154) +#define __NR_setrlimit (__NR_Linux + 155) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_chroot (__NR_Linux + 156) +#define __NR_sync (__NR_Linux + 157) +#define __NR_acct (__NR_Linux + 158) +#define __NR_settimeofday (__NR_Linux + 159) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_mount (__NR_Linux + 160) +#define __NR_umount2 (__NR_Linux + 161) +#define __NR_swapon (__NR_Linux + 162) +#define __NR_swapoff (__NR_Linux + 163) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_reboot (__NR_Linux + 164) +#define __NR_sethostname (__NR_Linux + 165) +#define __NR_setdomainname (__NR_Linux + 166) +#define __NR_create_module (__NR_Linux + 167) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_init_module (__NR_Linux + 168) +#define __NR_delete_module (__NR_Linux + 169) +#define __NR_get_kernel_syms (__NR_Linux + 170) +#define __NR_query_module (__NR_Linux + 171) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_quotactl (__NR_Linux + 172) +#define __NR_nfsservctl (__NR_Linux + 173) +#define __NR_getpmsg (__NR_Linux + 174) +#define __NR_putpmsg (__NR_Linux + 175) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_afs_syscall (__NR_Linux + 176) +#define __NR_reserved177 (__NR_Linux + 177) +#define __NR_gettid (__NR_Linux + 178) +#define __NR_readahead (__NR_Linux + 179) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_setxattr (__NR_Linux + 180) +#define __NR_lsetxattr (__NR_Linux + 181) +#define __NR_fsetxattr (__NR_Linux + 182) +#define __NR_getxattr (__NR_Linux + 183) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_lgetxattr (__NR_Linux + 184) +#define __NR_fgetxattr (__NR_Linux + 185) +#define __NR_listxattr (__NR_Linux + 186) +#define __NR_llistxattr (__NR_Linux + 187) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_flistxattr (__NR_Linux + 188) +#define __NR_removexattr (__NR_Linux + 189) +#define __NR_lremovexattr (__NR_Linux + 190) +#define __NR_fremovexattr (__NR_Linux + 191) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_tkill (__NR_Linux + 192) +#define __NR_reserved193 (__NR_Linux + 193) +#define __NR_futex (__NR_Linux + 194) +#define __NR_sched_setaffinity (__NR_Linux + 195) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_sched_getaffinity (__NR_Linux + 196) +#define __NR_cacheflush (__NR_Linux + 197) +#define __NR_cachectl (__NR_Linux + 198) +#define __NR_sysmips (__NR_Linux + 199) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_io_setup (__NR_Linux + 200) +#define __NR_io_destroy (__NR_Linux + 201) +#define __NR_io_getevents (__NR_Linux + 202) +#define __NR_io_submit (__NR_Linux + 203) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_io_cancel (__NR_Linux + 204) +#define __NR_exit_group (__NR_Linux + 205) +#define __NR_lookup_dcookie (__NR_Linux + 206) +#define __NR_epoll_create (__NR_Linux + 207) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_epoll_ctl (__NR_Linux + 208) +#define __NR_epoll_wait (__NR_Linux + 209) +#define __NR_remap_file_pages (__NR_Linux + 210) +#define __NR_rt_sigreturn (__NR_Linux + 211) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fcntl64 (__NR_Linux + 212) +#define __NR_set_tid_address (__NR_Linux + 213) +#define __NR_restart_syscall (__NR_Linux + 214) +#define __NR_semtimedop (__NR_Linux + 215) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fadvise64 (__NR_Linux + 216) +#define __NR_statfs64 (__NR_Linux + 217) +#define __NR_fstatfs64 (__NR_Linux + 218) +#define __NR_sendfile64 (__NR_Linux + 219) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_timer_create (__NR_Linux + 220) +#define __NR_timer_settime (__NR_Linux + 221) +#define __NR_timer_gettime (__NR_Linux + 222) +#define __NR_timer_getoverrun (__NR_Linux + 223) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_timer_delete (__NR_Linux + 224) +#define __NR_clock_settime (__NR_Linux + 225) +#define __NR_clock_gettime (__NR_Linux + 226) +#define __NR_clock_getres (__NR_Linux + 227) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_clock_nanosleep (__NR_Linux + 228) +#define __NR_tgkill (__NR_Linux + 229) +#define __NR_utimes (__NR_Linux + 230) +#define __NR_mbind (__NR_Linux + 231) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_get_mempolicy (__NR_Linux + 232) +#define __NR_set_mempolicy (__NR_Linux + 233) +#define __NR_mq_open (__NR_Linux + 234) +#define __NR_mq_unlink (__NR_Linux + 235) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_mq_timedsend (__NR_Linux + 236) +#define __NR_mq_timedreceive (__NR_Linux + 237) +#define __NR_mq_notify (__NR_Linux + 238) +#define __NR_mq_getsetattr (__NR_Linux + 239) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_vserver (__NR_Linux + 240) +#define __NR_waitid (__NR_Linux + 241) +#define __NR_add_key (__NR_Linux + 243) +#define __NR_request_key (__NR_Linux + 244) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_keyctl (__NR_Linux + 245) +#define __NR_set_thread_area (__NR_Linux + 246) +#define __NR_inotify_init (__NR_Linux + 247) +#define __NR_inotify_add_watch (__NR_Linux + 248) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_inotify_rm_watch (__NR_Linux + 249) +#define __NR_migrate_pages (__NR_Linux + 250) +#define __NR_openat (__NR_Linux + 251) +#define __NR_mkdirat (__NR_Linux + 252) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_mknodat (__NR_Linux + 253) +#define __NR_fchownat (__NR_Linux + 254) +#define __NR_futimesat (__NR_Linux + 255) +#define __NR_newfstatat (__NR_Linux + 256) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_unlinkat (__NR_Linux + 257) +#define __NR_renameat (__NR_Linux + 258) +#define __NR_linkat (__NR_Linux + 259) +#define __NR_symlinkat (__NR_Linux + 260) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_readlinkat (__NR_Linux + 261) +#define __NR_fchmodat (__NR_Linux + 262) +#define __NR_faccessat (__NR_Linux + 263) +#define __NR_pselect6 (__NR_Linux + 264) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_ppoll (__NR_Linux + 265) +#define __NR_unshare (__NR_Linux + 266) +#define __NR_splice (__NR_Linux + 267) +#define __NR_sync_file_range (__NR_Linux + 268) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_tee (__NR_Linux + 269) +#define __NR_vmsplice (__NR_Linux + 270) +#define __NR_move_pages (__NR_Linux + 271) +#define __NR_set_robust_list (__NR_Linux + 272) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_get_robust_list (__NR_Linux + 273) +#define __NR_kexec_load (__NR_Linux + 274) +#define __NR_getcpu (__NR_Linux + 275) +#define __NR_epoll_pwait (__NR_Linux + 276) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_ioprio_set (__NR_Linux + 277) +#define __NR_ioprio_get (__NR_Linux + 278) +#define __NR_utimensat (__NR_Linux + 279) +#define __NR_signalfd (__NR_Linux + 280) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_timerfd (__NR_Linux + 281) +#define __NR_eventfd (__NR_Linux + 282) +#define __NR_fallocate (__NR_Linux + 283) +#define __NR_timerfd_create (__NR_Linux + 284) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_timerfd_gettime (__NR_Linux + 285) +#define __NR_timerfd_settime (__NR_Linux + 286) +#define __NR_signalfd4 (__NR_Linux + 287) +#define __NR_eventfd2 (__NR_Linux + 288) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_epoll_create1 (__NR_Linux + 289) +#define __NR_dup3 (__NR_Linux + 290) +#define __NR_pipe2 (__NR_Linux + 291) +#define __NR_inotify_init1 (__NR_Linux + 292) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_preadv (__NR_Linux + 293) +#define __NR_pwritev (__NR_Linux + 294) +#define __NR_rt_tgsigqueueinfo (__NR_Linux + 295) +#define __NR_perf_event_open (__NR_Linux + 296) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_accept4 (__NR_Linux + 297) +#define __NR_recvmmsg (__NR_Linux + 298) +#define __NR_getdents64 (__NR_Linux + 299) +#define __NR_fanotify_init (__NR_Linux + 300) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_fanotify_mark (__NR_Linux + 301) +#define __NR_prlimit64 (__NR_Linux + 302) +#define __NR_name_to_handle_at (__NR_Linux + 303) +#define __NR_open_by_handle_at (__NR_Linux + 304) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_clock_adjtime (__NR_Linux + 305) +#define __NR_syncfs (__NR_Linux + 306) +#define __NR_sendmmsg (__NR_Linux + 307) +#define __NR_setns (__NR_Linux + 308) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_process_vm_readv (__NR_Linux + 309) +#define __NR_process_vm_writev (__NR_Linux + 310) +#define __NR_Linux_syscalls 310 +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __NR_N32_Linux 6000 +#define __NR_N32_Linux_syscalls 310 +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/user.h b/9/platforms/android-16/arch-mips/usr/include/asm/user.h new file mode 100644 index 0000000..a87f239 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/user.h @@ -0,0 +1,49 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_USER_H +#define _ASM_USER_H +#include <asm/page.h> +#include <asm/reg.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define EF_SIZE 180 +struct user { + unsigned long regs[EF_SIZE / + sizeof(unsigned long) + 64]; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + size_t u_tsize; + size_t u_dsize; + size_t u_ssize; + unsigned long start_code; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long start_data; + unsigned long start_stack; + long int signal; + unsigned long u_ar0; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned long magic; + char u_comm[32]; +}; +#define NBPG PAGE_SIZE +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define UPAGES 1 +#define HOST_TEXT_START_ADDR (u.start_code) +#define HOST_DATA_START_ADDR (u.start_data) +#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/vga.h b/9/platforms/android-16/arch-mips/usr/include/asm/vga.h new file mode 100644 index 0000000..c0c2535 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/vga.h @@ -0,0 +1,35 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_VGA_H +#define _ASM_VGA_H +#include <asm/byteorder.h> +#define VGA_MAP_MEM(x, s) (0xb0000000L + (unsigned long)(x)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define vga_readb(x) (*(x)) +#define vga_writeb(x, y) (*(y) = (x)) +#define VT_BUF_HAVE_RW +#undef scr_writew +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#undef scr_readw +#define scr_memcpyw(d, s, c) memcpy(d, s, c) +#define scr_memmovew(d, s, c) memmove(d, s, c) +#define VT_BUF_HAVE_MEMCPYW +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VT_BUF_HAVE_MEMMOVEW +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/vr41xx/irq.h b/9/platforms/android-16/arch-mips/usr/include/asm/vr41xx/irq.h new file mode 100644 index 0000000..1c54b66 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/vr41xx/irq.h @@ -0,0 +1,95 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __NEC_VR41XX_IRQ_H +#define __NEC_VR41XX_IRQ_H +#define MIPS_CPU_IRQ_BASE 0 +#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0) +#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1) +#define INT0_IRQ MIPS_CPU_IRQ(2) +#define INT1_IRQ MIPS_CPU_IRQ(3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define INT2_IRQ MIPS_CPU_IRQ(4) +#define INT3_IRQ MIPS_CPU_IRQ(5) +#define INT4_IRQ MIPS_CPU_IRQ(6) +#define TIMER_IRQ MIPS_CPU_IRQ(7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYSINT1_IRQ_BASE 8 +#define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x)) +#define BATTRY_IRQ SYSINT1_IRQ(0) +#define POWER_IRQ SYSINT1_IRQ(1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define RTCLONG1_IRQ SYSINT1_IRQ(2) +#define ELAPSEDTIME_IRQ SYSINT1_IRQ(3) +#define PIU_IRQ SYSINT1_IRQ(5) +#define AIU_IRQ SYSINT1_IRQ(6) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define KIU_IRQ SYSINT1_IRQ(7) +#define GIUINT_IRQ SYSINT1_IRQ(8) +#define SIU_IRQ SYSINT1_IRQ(9) +#define BUSERR_IRQ SYSINT1_IRQ(10) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SOFTINT_IRQ SYSINT1_IRQ(11) +#define CLKRUN_IRQ SYSINT1_IRQ(12) +#define DOZEPIU_IRQ SYSINT1_IRQ(13) +#define SYSINT1_IRQ_LAST DOZEPIU_IRQ +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define SYSINT2_IRQ_BASE 24 +#define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x)) +#define RTCLONG2_IRQ SYSINT2_IRQ(0) +#define LED_IRQ SYSINT2_IRQ(1) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define HSP_IRQ SYSINT2_IRQ(2) +#define TCLOCK_IRQ SYSINT2_IRQ(3) +#define FIR_IRQ SYSINT2_IRQ(4) +#define CEU_IRQ SYSINT2_IRQ(4) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define DSIU_IRQ SYSINT2_IRQ(5) +#define PCI_IRQ SYSINT2_IRQ(6) +#define SCU_IRQ SYSINT2_IRQ(7) +#define CSI_IRQ SYSINT2_IRQ(8) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define BCU_IRQ SYSINT2_IRQ(9) +#define ETHERNET_IRQ SYSINT2_IRQ(10) +#define SYSINT2_IRQ_LAST ETHERNET_IRQ +#define GIU_IRQ_BASE 40 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) +#define GIU_IRQ_LAST GIU_IRQ(31) +#define VRC4173_IRQ_BASE 72 +#define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VRC4173_USB_IRQ VRC4173_IRQ(0) +#define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1) +#define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2) +#define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4) +#define VRC4173_PIU_IRQ VRC4173_IRQ(5) +#define VRC4173_AIU_IRQ VRC4173_IRQ(6) +#define VRC4173_KIU_IRQ VRC4173_IRQ(7) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VRC4173_GIU_IRQ VRC4173_IRQ(8) +#define VRC4173_AC97_IRQ VRC4173_IRQ(9) +#define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10) +#define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/war.h b/9/platforms/android-16/arch-mips/usr/include/asm/war.h new file mode 100644 index 0000000..d8f95b2 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/war.h @@ -0,0 +1,75 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_WAR_H +#define _ASM_WAR_H +#include <war.h> +#define R4000_WAR 0 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define R4400_WAR 0 +#define DADDI_WAR 0 +#ifndef R4600_V1_INDEX_ICACHEOP_WAR +#error Check setting of R4600_V1_INDEX_ICACHEOP_WAR for your platform +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef R4600_V1_HIT_CACHEOP_WAR +#error Check setting of R4600_V1_HIT_CACHEOP_WAR for your platform +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef R4600_V2_HIT_CACHEOP_WAR +#error Check setting of R4600_V2_HIT_CACHEOP_WAR for your platform +#endif +#ifndef R5432_CP0_INTERRUPT_WAR +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#error Check setting of R5432_CP0_INTERRUPT_WAR for your platform +#endif +#ifndef BCM1250_M3_WAR +#error Check setting of BCM1250_M3_WAR for your platform +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef SIBYTE_1956_WAR +#error Check setting of SIBYTE_1956_WAR for your platform +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef MIPS4K_ICACHE_REFILL_WAR +#error Check setting of MIPS4K_ICACHE_REFILL_WAR for your platform +#endif +#ifndef MIPS_CACHE_SYNC_WAR +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#error Check setting of MIPS_CACHE_SYNC_WAR for your platform +#endif +#ifndef TX49XX_ICACHE_INDEX_INV_WAR +#error Check setting of TX49XX_ICACHE_INDEX_INV_WAR for your platform +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#ifndef RM9000_CDEX_SMP_WAR +#error Check setting of RM9000_CDEX_SMP_WAR for your platform +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#ifndef ICACHE_REFILLS_WORKAROUND_WAR +#error Check setting of ICACHE_REFILLS_WORKAROUND_WAR for your platform +#endif +#ifndef R10000_LLSC_WAR +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#error Check setting of R10000_LLSC_WAR for your platform +#endif +#ifndef MIPS34K_MISSED_ITLB_WAR +#error Check setting of MIPS34K_MISSED_ITLB_WAR for your platform +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/xtalk/xtalk.h b/9/platforms/android-16/arch-mips/usr/include/asm/xtalk/xtalk.h new file mode 100644 index 0000000..3dfbaa0 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/xtalk/xtalk.h @@ -0,0 +1,45 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_XTALK_XTALK_H +#define _ASM_XTALK_XTALK_H +#ifndef __ASSEMBLY__ +typedef char xwidgetnum_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define XWIDGET_NONE -1 +typedef int xwidget_part_num_t; +#define XWIDGET_PART_NUM_NONE -1 +typedef int xwidget_rev_num_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define XWIDGET_REV_NUM_NONE -1 +typedef int xwidget_mfg_num_t; +#define XWIDGET_MFG_NUM_NONE -1 +typedef struct xtalk_piomap_s *xtalk_piomap_t; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define XIO_NOWHERE (0xFFFFFFFFFFFFFFFFull) +#define XIO_ADDR_BITS (0x0000FFFFFFFFFFFFull) +#define XIO_PORT_BITS (0xF000000000000000ull) +#define XIO_PORT_SHIFT (60) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define XIO_PACKED(x) (((x)&XIO_PORT_BITS) != 0) +#define XIO_ADDR(x) ((x)&XIO_ADDR_BITS) +#define XIO_PORT(x) ((xwidgetnum_t)(((x)&XIO_PORT_BITS) >> XIO_PORT_SHIFT)) +#define XIO_PACK(p, o) ((((uint64_t)(p))<<XIO_PORT_SHIFT) | ((o)&XIO_ADDR_BITS)) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif +#endif diff --git a/9/platforms/android-16/arch-mips/usr/include/asm/xtalk/xwidget.h b/9/platforms/android-16/arch-mips/usr/include/asm/xtalk/xwidget.h new file mode 100644 index 0000000..03bb4c1 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/asm/xtalk/xwidget.h @@ -0,0 +1,154 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef _ASM_XTALK_XWIDGET_H +#define _ASM_XTALK_XWIDGET_H +#include <linux/types.h> +#include <asm/xtalk/xtalk.h> +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define WIDGET_ID 0x04 +#define WIDGET_STATUS 0x0c +#define WIDGET_ERR_UPPER_ADDR 0x14 +#define WIDGET_ERR_LOWER_ADDR 0x1c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define WIDGET_CONTROL 0x24 +#define WIDGET_REQ_TIMEOUT 0x2c +#define WIDGET_INTDEST_UPPER_ADDR 0x34 +#define WIDGET_INTDEST_LOWER_ADDR 0x3c +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define WIDGET_ERR_CMD_WORD 0x44 +#define WIDGET_LLP_CFG 0x4c +#define WIDGET_TFLUSH 0x54 +#define WIDGET_REV_NUM 0xf0000000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define WIDGET_PART_NUM 0x0ffff000 +#define WIDGET_MFG_NUM 0x00000ffe +#define WIDGET_REV_NUM_SHFT 28 +#define WIDGET_PART_NUM_SHFT 12 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define WIDGET_MFG_NUM_SHFT 1 +#define XWIDGET_PART_NUM(widgetid) (((widgetid) & WIDGET_PART_NUM) >> WIDGET_PART_NUM_SHFT) +#define XWIDGET_REV_NUM(widgetid) (((widgetid) & WIDGET_REV_NUM) >> WIDGET_REV_NUM_SHFT) +#define XWIDGET_MFG_NUM(widgetid) (((widgetid) & WIDGET_MFG_NUM) >> WIDGET_MFG_NUM_SHFT) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define WIDGET_LLP_REC_CNT 0xff000000 +#define WIDGET_LLP_TX_CNT 0x00ff0000 +#define WIDGET_PENDING 0x0000001f +#define WIDGET_ERR_UPPER_ADDR_ONLY 0x0000ffff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define WIDGET_F_BAD_PKT 0x00010000 +#define WIDGET_LLP_XBAR_CRD 0x0000f000 +#define WIDGET_LLP_XBAR_CRD_SHFT 12 +#define WIDGET_CLR_RLLP_CNT 0x00000800 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define WIDGET_CLR_TLLP_CNT 0x00000400 +#define WIDGET_SYS_END 0x00000200 +#define WIDGET_MAX_TRANS 0x000001f0 +#define WIDGET_WIDGET_ID 0x0000000f +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define WIDGET_INT_VECTOR 0xff000000 +#define WIDGET_INT_VECTOR_SHFT 24 +#define WIDGET_TARGET_ID 0x000f0000 +#define WIDGET_TARGET_ID_SHFT 16 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define WIDGET_UPP_ADDR 0x0000ffff +#define WIDGET_DIDN 0xf0000000 +#define WIDGET_SIDN 0x0f000000 +#define WIDGET_PACTYP 0x00f00000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define WIDGET_TNUM 0x000f8000 +#define WIDGET_COHERENT 0x00004000 +#define WIDGET_DS 0x00003000 +#define WIDGET_GBR 0x00000800 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define WIDGET_VBPM 0x00000400 +#define WIDGET_ERROR 0x00000200 +#define WIDGET_BARRIER 0x00000100 +#define WIDGET_LLP_MAXRETRY 0x03ff0000 +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define WIDGET_LLP_MAXRETRY_SHFT 16 +#define WIDGET_LLP_NULLTIMEOUT 0x0000fc00 +#define WIDGET_LLP_NULLTIMEOUT_SHFT 10 +#define WIDGET_LLP_MAXBURST 0x000003ff +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define WIDGET_LLP_MAXBURST_SHFT 0 +#ifndef __ASSEMBLY__ +typedef u32 widgetreg_t; +typedef volatile struct widget_cfg { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + widgetreg_t w_pad_0; + widgetreg_t w_id; + widgetreg_t w_pad_1; + widgetreg_t w_status; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + widgetreg_t w_pad_2; + widgetreg_t w_err_upper_addr; + widgetreg_t w_pad_3; + widgetreg_t w_err_lower_addr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + widgetreg_t w_pad_4; + widgetreg_t w_control; + widgetreg_t w_pad_5; + widgetreg_t w_req_timeout; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + widgetreg_t w_pad_6; + widgetreg_t w_intdest_upper_addr; + widgetreg_t w_pad_7; + widgetreg_t w_intdest_lower_addr; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + widgetreg_t w_pad_8; + widgetreg_t w_err_cmd_word; + widgetreg_t w_pad_9; + widgetreg_t w_llp_cfg; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + widgetreg_t w_pad_10; + widgetreg_t w_tflush; +} widget_cfg_t; +typedef struct { +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned didn:4; + unsigned sidn:4; + unsigned pactyp:4; + unsigned tnum:5; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned ct:1; + unsigned ds:2; + unsigned gbr:1; + unsigned vbpm:1; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + unsigned error:1; + unsigned bo:1; + unsigned other:8; +} w_err_cmd_word_f; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef union { + widgetreg_t r; + w_err_cmd_word_f f; +} w_err_cmd_word_u; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +typedef struct xwidget_info_s *xwidget_info_t; +typedef struct xwidget_hwid_s { + xwidget_part_num_t part_num; + xwidget_rev_num_t rev_num; +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ + xwidget_mfg_num_t mfg_num; +} *xwidget_hwid_t; +#define XWIDGET_HARDWARE_ID_MATCH(hwid1, hwid2) (((hwid1)->part_num == (hwid2)->part_num) && (((hwid1)->mfg_num == XWIDGET_MFG_NUM_NONE) || ((hwid2)->mfg_num == XWIDGET_MFG_NUM_NONE) || ((hwid1)->mfg_num == (hwid2)->mfg_num))) +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#endif |