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| author | Andrew Hsieh <andrewhsieh@google.com> | 2013-11-11 16:01:46 +0800 |
|---|---|---|
| committer | Andrew Hsieh <andrewhsieh@google.com> | 2013-11-12 15:05:12 +0800 |
| commit | 7b0de5ae35083554f258e68dcfb0c9ada702e70a (patch) | |
| tree | 6db6ed333d1275a724874c1f9d9d28d200397706 /9/platforms/android-16/arch-mips/usr/include/linux/cache.h | |
| parent | e9808d310fa92e2aa27a9208fe59144a43a8d4b6 (diff) | |
| download | prebuilts_ndk-7b0de5ae35083554f258e68dcfb0c9ada702e70a.zip prebuilts_ndk-7b0de5ae35083554f258e68dcfb0c9ada702e70a.tar.gz prebuilts_ndk-7b0de5ae35083554f258e68dcfb0c9ada702e70a.tar.bz2 | |
Refresh prebuilts/ndk/9/platforms with r9b+, part 2/2
Part 2: add new API level 12, 13, 15, 16, 17 and 19
Change-Id: I305970f7766b3ed3e5faf2532952eaa03398fcbd
Diffstat (limited to '9/platforms/android-16/arch-mips/usr/include/linux/cache.h')
| -rw-r--r-- | 9/platforms/android-16/arch-mips/usr/include/linux/cache.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/9/platforms/android-16/arch-mips/usr/include/linux/cache.h b/9/platforms/android-16/arch-mips/usr/include/linux/cache.h new file mode 100644 index 0000000..d281855 --- /dev/null +++ b/9/platforms/android-16/arch-mips/usr/include/linux/cache.h @@ -0,0 +1,54 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __LINUX_CACHE_H +#define __LINUX_CACHE_H + +#include <linux/kernel.h> +#include <asm/cache.h> + +#ifndef L1_CACHE_ALIGN +#define L1_CACHE_ALIGN(x) ALIGN(x, L1_CACHE_BYTES) +#endif + +#ifndef SMP_CACHE_BYTES +#define SMP_CACHE_BYTES L1_CACHE_BYTES +#endif + +#ifndef __read_mostly +#define __read_mostly +#endif + +#ifndef ____cacheline_aligned +#define ____cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES))) +#endif + +#ifndef ____cacheline_aligned_in_smp +#define ____cacheline_aligned_in_smp +#endif + +#ifndef __cacheline_aligned +#define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES), __section__(".data.cacheline_aligned"))) +#endif + +#ifndef __cacheline_aligned_in_smp +#define __cacheline_aligned_in_smp +#endif + +#ifndef INTERNODE_CACHE_SHIFT +#define INTERNODE_CACHE_SHIFT L1_CACHE_SHIFT +#endif + +#ifndef ____cacheline_internodealigned_in_smp +#define ____cacheline_internodealigned_in_smp +#endif + +#endif |