diff options
author | Andrew Hsieh <andrewhsieh@google.com> | 2013-09-06 18:37:46 +0800 |
---|---|---|
committer | Andrew Hsieh <andrewhsieh@google.com> | 2013-09-06 19:04:40 +0800 |
commit | 6986c6e7f06bb3bdedfc3bb08694da9b1227048c (patch) | |
tree | 5c0f01f1f54d9040100858182232c1fb4134b58f /9/platforms/android-18/arch-mips/usr/include/asm/barrier.h | |
parent | 30ee84f92cb832c789366c516fcadb718ccc25e8 (diff) | |
download | prebuilts_ndk-6986c6e7f06bb3bdedfc3bb08694da9b1227048c.zip prebuilts_ndk-6986c6e7f06bb3bdedfc3bb08694da9b1227048c.tar.gz prebuilts_ndk-6986c6e7f06bb3bdedfc3bb08694da9b1227048c.tar.bz2 |
Add NDK r9 part 1/2: platforms/
Change-Id: Ie572e90ffda7f982d931dda1a9f5a0c68953a762
Diffstat (limited to '9/platforms/android-18/arch-mips/usr/include/asm/barrier.h')
-rw-r--r-- | 9/platforms/android-18/arch-mips/usr/include/asm/barrier.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/9/platforms/android-18/arch-mips/usr/include/asm/barrier.h b/9/platforms/android-18/arch-mips/usr/include/asm/barrier.h new file mode 100644 index 0000000..4aed9a7 --- /dev/null +++ b/9/platforms/android-18/arch-mips/usr/include/asm/barrier.h @@ -0,0 +1,48 @@ +/**************************************************************************** + **************************************************************************** + *** + *** This header was automatically generated from a Linux kernel header + *** of the same name, to make information necessary for userspace to + *** call into the kernel available to libc. It contains only constants, + *** structures, and macros generated from the original header, and thus, + *** contains no copyrightable information. + *** + *** To edit the content of this header, modify the corresponding + *** source file (e.g. under external/kernel-headers/original/) then + *** run bionic/libc/kernel/tools/update_all.py + *** + *** Any manual change here will be lost the next time this script will + *** be run. You've been warned! + *** + **************************************************************************** + ****************************************************************************/ +#ifndef __ASM_BARRIER_H +#define __ASM_BARRIER_H +#define read_barrier_depends() do { } while(0) +#define smp_read_barrier_depends() do { } while(0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define __sync() do { } while(0) +#define __fast_iob() __asm__ __volatile__( ".set push\n\t" ".set noreorder\n\t" "lw $0,%0\n\t" "nop\n\t" ".set pop" : : "m" (*(int *)CKSEG1) : "memory") +#define fast_wmb() __sync() +#define fast_rmb() __sync() +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define fast_mb() __sync() +#define fast_iob() do { __sync(); __fast_iob(); } while (0) +#define wmb() fast_wmb() +#define rmb() fast_rmb() +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define mb() fast_mb() +#define iob() fast_iob() +#define __WEAK_ORDERING_MB " \n" +#define __WEAK_LLSC_MB " \n" +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define smp_mb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") +#define smp_rmb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") +#define smp_wmb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") +#define set_mb(var, value) do { var = value; smp_mb(); } while (0) +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ +#define smp_llsc_mb() __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory") +#define smp_llsc_rmb() __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory") +#define smp_llsc_wmb() __asm__ __volatile__(__WEAK_LLSC_MB : : :"memory") +#endif +/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ |