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author | Ian Rogers <irogers@google.com> | 2013-03-21 21:38:24 +0000 |
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committer | Android Git Automerger <android-git-automerger@android.com> | 2013-03-21 21:38:24 +0000 |
commit | da204c5c4244ea67aacbd29c222d0a2d1c35b443 (patch) | |
tree | c5c2124f712006ba6da2d04ba33d6da06aaa6e32 | |
parent | 6ed65d5e7f4d98de5bea34e71c33abd5a7be9b32 (diff) | |
parent | 62980e817c51c56208971ed5c3e98e0cb21e1685 (diff) | |
download | system_core-da204c5c4244ea67aacbd29c222d0a2d1c35b443.zip system_core-da204c5c4244ea67aacbd29c222d0a2d1c35b443.tar.gz system_core-da204c5c4244ea67aacbd29c222d0a2d1c35b443.tar.bz2 |
am 62980e81: Inline ldrex/strex for thumb2, remove ARMv5 remnants.
* commit '62980e817c51c56208971ed5c3e98e0cb21e1685':
Inline ldrex/strex for thumb2, remove ARMv5 remnants.
-rw-r--r-- | include/cutils/atomic-arm.h | 156 |
1 files changed, 33 insertions, 123 deletions
diff --git a/include/cutils/atomic-arm.h b/include/cutils/atomic-arm.h index 795afd3..172a0cd 100644 --- a/include/cutils/atomic-arm.h +++ b/include/cutils/atomic-arm.h @@ -18,55 +18,33 @@ #define ANDROID_CUTILS_ATOMIC_ARM_H #include <stdint.h> -#include <machine/cpu-features.h> #ifndef ANDROID_ATOMIC_INLINE #define ANDROID_ATOMIC_INLINE inline __attribute__((always_inline)) #endif -extern ANDROID_ATOMIC_INLINE void android_compiler_barrier(void) +extern ANDROID_ATOMIC_INLINE void android_compiler_barrier() { __asm__ __volatile__ ("" : : : "memory"); } -#if ANDROID_SMP == 0 -extern ANDROID_ATOMIC_INLINE void android_memory_barrier(void) -{ - android_compiler_barrier(); -} -extern ANDROID_ATOMIC_INLINE void android_memory_store_barrier(void) +extern ANDROID_ATOMIC_INLINE void android_memory_barrier() { +#if ANDROID_SMP == 0 android_compiler_barrier(); -} -#elif defined(__ARM_HAVE_DMB) -extern ANDROID_ATOMIC_INLINE void android_memory_barrier(void) -{ +#else __asm__ __volatile__ ("dmb" : : : "memory"); +#endif } -extern ANDROID_ATOMIC_INLINE void android_memory_store_barrier(void) -{ - __asm__ __volatile__ ("dmb st" : : : "memory"); -} -#elif defined(__ARM_HAVE_LDREX_STREX) -extern ANDROID_ATOMIC_INLINE void android_memory_barrier(void) -{ - __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" : : "r" (0) : "memory"); -} -extern ANDROID_ATOMIC_INLINE void android_memory_store_barrier(void) + +extern ANDROID_ATOMIC_INLINE void android_memory_store_barrier() { - android_memory_barrier(); -} +#if ANDROID_SMP == 0 + android_compiler_barrier(); #else -extern ANDROID_ATOMIC_INLINE void android_memory_barrier(void) -{ - typedef void (kuser_memory_barrier)(void); - (*(kuser_memory_barrier *)0xffff0fa0)(); -} -extern ANDROID_ATOMIC_INLINE void android_memory_store_barrier(void) -{ - android_memory_barrier(); -} + __asm__ __volatile__ ("dmb st" : : : "memory"); #endif +} extern ANDROID_ATOMIC_INLINE int32_t android_atomic_acquire_load(volatile const int32_t *ptr) @@ -83,32 +61,32 @@ int32_t android_atomic_release_load(volatile const int32_t *ptr) return *ptr; } -extern ANDROID_ATOMIC_INLINE void -android_atomic_acquire_store(int32_t value, volatile int32_t *ptr) +extern ANDROID_ATOMIC_INLINE +void android_atomic_acquire_store(int32_t value, volatile int32_t *ptr) { *ptr = value; android_memory_barrier(); } -extern ANDROID_ATOMIC_INLINE void -android_atomic_release_store(int32_t value, volatile int32_t *ptr) +extern ANDROID_ATOMIC_INLINE +void android_atomic_release_store(int32_t value, volatile int32_t *ptr) { android_memory_barrier(); *ptr = value; } -#if defined(__thumb__) -extern int android_atomic_cas(int32_t old_value, int32_t new_value, - volatile int32_t *ptr); -#elif defined(__ARM_HAVE_LDREX_STREX) -extern ANDROID_ATOMIC_INLINE int -android_atomic_cas(int32_t old_value, int32_t new_value, volatile int32_t *ptr) +extern ANDROID_ATOMIC_INLINE +int android_atomic_cas(int32_t old_value, int32_t new_value, + volatile int32_t *ptr) { int32_t prev, status; do { __asm__ __volatile__ ("ldrex %0, [%3]\n" "mov %1, #0\n" "teq %0, %4\n" +#ifdef __thumb2__ + "it eq\n" +#endif "strexeq %1, %5, [%3]" : "=&r" (prev), "=&r" (status), "+m"(*ptr) : "r" (ptr), "Ir" (old_value), "r" (new_value) @@ -116,49 +94,26 @@ android_atomic_cas(int32_t old_value, int32_t new_value, volatile int32_t *ptr) } while (__builtin_expect(status != 0, 0)); return prev != old_value; } -#else -extern ANDROID_ATOMIC_INLINE int -android_atomic_cas(int32_t old_value, int32_t new_value, volatile int32_t *ptr) -{ - typedef int (kuser_cmpxchg)(int32_t, int32_t, volatile int32_t *); - int32_t prev, status; - prev = *ptr; - do { - status = (*(kuser_cmpxchg *)0xffff0fc0)(old_value, new_value, ptr); - if (__builtin_expect(status == 0, 1)) - return 0; - prev = *ptr; - } while (prev == old_value); - return 1; -} -#endif -extern ANDROID_ATOMIC_INLINE int -android_atomic_acquire_cas(int32_t old_value, - int32_t new_value, - volatile int32_t *ptr) +extern ANDROID_ATOMIC_INLINE +int android_atomic_acquire_cas(int32_t old_value, int32_t new_value, + volatile int32_t *ptr) { int status = android_atomic_cas(old_value, new_value, ptr); android_memory_barrier(); return status; } -extern ANDROID_ATOMIC_INLINE int -android_atomic_release_cas(int32_t old_value, - int32_t new_value, - volatile int32_t *ptr) +extern ANDROID_ATOMIC_INLINE +int android_atomic_release_cas(int32_t old_value, int32_t new_value, + volatile int32_t *ptr) { android_memory_barrier(); return android_atomic_cas(old_value, new_value, ptr); } - -#if defined(__thumb__) -extern int32_t android_atomic_add(int32_t increment, - volatile int32_t *ptr); -#elif defined(__ARM_HAVE_LDREX_STREX) -extern ANDROID_ATOMIC_INLINE int32_t -android_atomic_add(int32_t increment, volatile int32_t *ptr) +extern ANDROID_ATOMIC_INLINE +int32_t android_atomic_add(int32_t increment, volatile int32_t *ptr) { int32_t prev, tmp, status; android_memory_barrier(); @@ -173,19 +128,6 @@ android_atomic_add(int32_t increment, volatile int32_t *ptr) } while (__builtin_expect(status != 0, 0)); return prev; } -#else -extern ANDROID_ATOMIC_INLINE int32_t -android_atomic_add(int32_t increment, volatile int32_t *ptr) -{ - int32_t prev, status; - android_memory_barrier(); - do { - prev = *ptr; - status = android_atomic_cas(prev, prev + increment, ptr); - } while (__builtin_expect(status != 0, 0)); - return prev; -} -#endif extern ANDROID_ATOMIC_INLINE int32_t android_atomic_inc(volatile int32_t *addr) { @@ -197,11 +139,8 @@ extern ANDROID_ATOMIC_INLINE int32_t android_atomic_dec(volatile int32_t *addr) return android_atomic_add(-1, addr); } -#if defined(__thumb__) -extern int32_t android_atomic_and(int32_t value, volatile int32_t *ptr); -#elif defined(__ARM_HAVE_LDREX_STREX) -extern ANDROID_ATOMIC_INLINE int32_t -android_atomic_and(int32_t value, volatile int32_t *ptr) +extern ANDROID_ATOMIC_INLINE +int32_t android_atomic_and(int32_t value, volatile int32_t *ptr) { int32_t prev, tmp, status; android_memory_barrier(); @@ -216,25 +155,9 @@ android_atomic_and(int32_t value, volatile int32_t *ptr) } while (__builtin_expect(status != 0, 0)); return prev; } -#else -extern ANDROID_ATOMIC_INLINE int32_t -android_atomic_and(int32_t value, volatile int32_t *ptr) -{ - int32_t prev, status; - android_memory_barrier(); - do { - prev = *ptr; - status = android_atomic_cas(prev, prev & value, ptr); - } while (__builtin_expect(status != 0, 0)); - return prev; -} -#endif -#if defined(__thumb__) -extern int32_t android_atomic_or(int32_t value, volatile int32_t *ptr); -#elif defined(__ARM_HAVE_LDREX_STREX) -extern ANDROID_ATOMIC_INLINE int32_t -android_atomic_or(int32_t value, volatile int32_t *ptr) +extern ANDROID_ATOMIC_INLINE +int32_t android_atomic_or(int32_t value, volatile int32_t *ptr) { int32_t prev, tmp, status; android_memory_barrier(); @@ -249,18 +172,5 @@ android_atomic_or(int32_t value, volatile int32_t *ptr) } while (__builtin_expect(status != 0, 0)); return prev; } -#else -extern ANDROID_ATOMIC_INLINE int32_t -android_atomic_or(int32_t value, volatile int32_t *ptr) -{ - int32_t prev, status; - android_memory_barrier(); - do { - prev = *ptr; - status = android_atomic_cas(prev, prev | value, ptr); - } while (__builtin_expect(status != 0, 0)); - return prev; -} -#endif #endif /* ANDROID_CUTILS_ATOMIC_ARM_H */ |