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author | Ashok Bhat <ashok.bhat@arm.com> | 2013-02-21 10:27:40 +0000 |
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committer | David Butcher <david.butcher@arm.com> | 2013-12-12 17:30:13 +0000 |
commit | bfc6dc4ca8d5a1ee498e80a18350b91519a5412c (patch) | |
tree | 9df6c0b02646b3635ac04a0aa7623be572997ab6 /libpixelflinger/codeflinger/ARMAssemblerInterface.cpp | |
parent | d10afb17486f87a56baf97a893b4e4533eb5b851 (diff) | |
download | system_core-bfc6dc4ca8d5a1ee498e80a18350b91519a5412c.zip system_core-bfc6dc4ca8d5a1ee498e80a18350b91519a5412c.tar.gz system_core-bfc6dc4ca8d5a1ee498e80a18350b91519a5412c.tar.bz2 |
Pixelflinger: Support for handling 64-bit addresses in GGL Assembler
GGLAssembler assumes addresses to be 32-bit and uses ARM 32-bit
instructions to load/store/manipulate addresses. To support, 64-bit
architectures, following changes has been done
1. ARMAssemblerInterface has been extended to support four new
operations ADDR_LDR, ADDR_STR, ADDR_SUB, ADDR_ADD. Base class
implements these virtual functions to use 32bit equivalent
function. This avoids existing 32-bit Assembler backend
implementations like ARMAssembler and MIPSAssembler from
mapping the new functions to existing equivalent routines.
This also allows 64-bit Architectures like AArch64 to override
the function in their assembler backend implementations.
2. GGLAssembler code (spread over GGLAssembler.cpp, GGLAssembler.h
and texturing.cpp) has been changed to use the new operations
for address operations.
Change-Id: I3d7eace4691e3e47cef737d97ac67ce6ef4fb18d
Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
Diffstat (limited to 'libpixelflinger/codeflinger/ARMAssemblerInterface.cpp')
-rw-r--r-- | libpixelflinger/codeflinger/ARMAssemblerInterface.cpp | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/libpixelflinger/codeflinger/ARMAssemblerInterface.cpp b/libpixelflinger/codeflinger/ARMAssemblerInterface.cpp index 073633c..5041999 100644 --- a/libpixelflinger/codeflinger/ARMAssemblerInterface.cpp +++ b/libpixelflinger/codeflinger/ARMAssemblerInterface.cpp @@ -61,6 +61,29 @@ uint32_t ARMAssemblerInterface::__immed8_pre(int32_t immed8, int W) ((W&1)<<21) | (((offset&0xF0)<<4)|(offset&0xF)); } +// The following four functions are required for address manipulation +// These are virtual functions, which can be overridden by architectures +// that need special handling of address values (e.g. 64-bit arch) +void ARMAssemblerInterface::ADDR_LDR(int cc, int Rd, + int Rn, uint32_t offset) +{ + LDR(cc, Rd, Rn, offset); +} +void ARMAssemblerInterface::ADDR_STR(int cc, int Rd, + int Rn, uint32_t offset) +{ + STR(cc, Rd, Rn, offset); +} +void ARMAssemblerInterface::ADDR_ADD(int cc, int s, + int Rd, int Rn, uint32_t Op2) +{ + dataProcessing(opADD, cc, s, Rd, Rn, Op2); +} +void ARMAssemblerInterface::ADDR_SUB(int cc, int s, + int Rd, int Rn, uint32_t Op2) +{ + dataProcessing(opSUB, cc, s, Rd, Rn, Op2); +} }; // namespace android |