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author | Paul Lind <plind@mips.com> | 2012-02-01 10:54:19 -0800 |
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committer | Paul Lind <plind@mips.com> | 2012-08-13 11:41:15 -0700 |
commit | 2bc2b792782b304b15d8c48b54916a9b3fa3a7ac (patch) | |
tree | 12bdbda74e161ec1a3874fb873912641315ddb14 /libpixelflinger/codeflinger/CodeCache.cpp | |
parent | ae8927aa05adf9e5a00760b45e4634eecf6340e3 (diff) | |
download | system_core-2bc2b792782b304b15d8c48b54916a9b3fa3a7ac.zip system_core-2bc2b792782b304b15d8c48b54916a9b3fa3a7ac.tar.gz system_core-2bc2b792782b304b15d8c48b54916a9b3fa3a7ac.tar.bz2 |
Add MIPS support to pixelflinger.
See the comment-block at the top of MIPSAssembler.cpp for
implementation overview.
Change-Id: Id492c10610574af8c89c38d19e12fafc3652c28a
Diffstat (limited to 'libpixelflinger/codeflinger/CodeCache.cpp')
-rw-r--r-- | libpixelflinger/codeflinger/CodeCache.cpp | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/libpixelflinger/codeflinger/CodeCache.cpp b/libpixelflinger/codeflinger/CodeCache.cpp index a713feb..4f2ede3 100644 --- a/libpixelflinger/codeflinger/CodeCache.cpp +++ b/libpixelflinger/codeflinger/CodeCache.cpp @@ -36,6 +36,12 @@ namespace android { #include <errno.h> #endif +#if defined(__mips__) +#include <asm/cachectl.h> +#include <errno.h> +#endif + +// ---------------------------------------------------------------------------- // ---------------------------------------------------------------------------- Assembly::Assembly(size_t size) @@ -155,12 +161,12 @@ int CodeCache::cache( const AssemblyKeyBase& keyBase, mCacheInUse += assemblySize; mWhen++; // synchronize caches... -#if defined(__arm__) +#if defined(__arm__) || defined(__mips__) const long base = long(assembly->base()); const long curr = base + long(assembly->size()); err = cacheflush(base, curr, 0); - ALOGE_IF(err, "__ARM_NR_cacheflush error %s\n", - strerror(errno)); + ALOGE_IF(err, "cacheflush error %s\n", + strerror(errno)); #endif } |