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authorAshok Bhat <ashok.bhat@arm.com>2013-02-28 18:32:03 +0000
committerDavid Butcher <david.butcher@arm.com>2013-12-12 17:30:13 +0000
commit658f89dc5c418dbbc0c5d78f5861855b90ca8c9f (patch)
tree838e11a42cbed3d206f45a9b81d03770c8871422 /libpixelflinger/codeflinger/CodeCache.cpp
parentbfc6dc4ca8d5a1ee498e80a18350b91519a5412c (diff)
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Pixelflinger: Add AArch64 support to pixelflinger JIT.
See the comment-block at the top of Aarch64Assembler.cpp for overview on how AArch64 support has been implemented In addition, this commit contains [x] AArch64 inline asm versions of gglmul series of functions and a new unit test bench to test the functions [x] Assembly implementations of scanline_col32cb16blend and scanline_t32cb16blend for AArch64, with unit test bench Change-Id: I915cded9e1d39d9a2a70bf8a0394b8a0064d1eb4 Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
Diffstat (limited to 'libpixelflinger/codeflinger/CodeCache.cpp')
-rw-r--r--libpixelflinger/codeflinger/CodeCache.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/libpixelflinger/codeflinger/CodeCache.cpp b/libpixelflinger/codeflinger/CodeCache.cpp
index 58fde7e..4fe30d9 100644
--- a/libpixelflinger/codeflinger/CodeCache.cpp
+++ b/libpixelflinger/codeflinger/CodeCache.cpp
@@ -34,7 +34,7 @@ namespace android {
// ----------------------------------------------------------------------------
-#if defined(__arm__)
+#if defined(__arm__) || defined(__aarch64__)
#include <unistd.h>
#include <errno.h>
#endif
@@ -201,7 +201,7 @@ int CodeCache::cache( const AssemblyKeyBase& keyBase,
mCacheInUse += assemblySize;
mWhen++;
// synchronize caches...
-#if defined(__arm__) || defined(__mips__)
+#if defined(__arm__) || defined(__mips__) || defined(__aarch64__)
const long base = long(assembly->base());
const long curr = base + long(assembly->size());
err = cacheflush(base, curr, 0);