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authorKan-Ru Chen <kanru@0xlab.org>2010-05-04 15:53:33 +0800
committerKan-Ru Chen <kanru@0xlab.org>2010-08-18 17:02:34 +0800
commita7e96642a9f91620b69716cc3198c6ebb4d0553c (patch)
tree5453f334fada8706edc4481c139ddbacd44c8180 /libpixelflinger/codeflinger
parent5dfd90e5c79774d9981d25ab4defbd1e1f652c34 (diff)
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codeflinger: Correct misleading comment of STM instruction
According to the ARM Architecture Reference Manual, the comment on STM instruction should be in reverse order. Change-Id: I4af852a0478798ff7b02ab9c29c68e320ff78696 Signed-off-by: Kan-Ru Chen <kanru@0xlab.org>
Diffstat (limited to 'libpixelflinger/codeflinger')
-rw-r--r--libpixelflinger/codeflinger/ARMAssembler.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/libpixelflinger/codeflinger/ARMAssembler.cpp b/libpixelflinger/codeflinger/ARMAssembler.cpp
index fa9f1ad..4726a08 100644
--- a/libpixelflinger/codeflinger/ARMAssembler.cpp
+++ b/libpixelflinger/codeflinger/ARMAssembler.cpp
@@ -334,7 +334,7 @@ void ARMAssembler::LDM(int cc, int dir,
void ARMAssembler::STM(int cc, int dir,
int Rn, int W, uint32_t reg_list)
-{ // FA EA FD ED IB IA DB DA
+{ // ED FD EA FA IB IA DB DA
const uint8_t P[8] = { 0, 1, 0, 1, 1, 0, 1, 0 };
const uint8_t U[8] = { 0, 0, 1, 1, 1, 1, 0, 0 };
*mPC++ = (cc<<28) | (4<<25) | (uint32_t(P[dir])<<24) |