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| author | Duane Sand <duane.sand@imgtec.com> | 2014-06-28 18:55:26 -0700 |
|---|---|---|
| committer | Duane Sand <duane.sand@imgtec.com> | 2014-07-31 16:21:16 -0700 |
| commit | 734f50c2fe5b8778370b687c29401effcb254862 (patch) | |
| tree | c1c4b1ad8cdcd79eb2d015e8d5da80f778788482 /libpixelflinger/tests | |
| parent | cddc97cb3a927d179a42e0fec77f0d267fcd74d1 (diff) | |
| download | system_core-734f50c2fe5b8778370b687c29401effcb254862.zip system_core-734f50c2fe5b8778370b687c29401effcb254862.tar.gz system_core-734f50c2fe5b8778370b687c29401effcb254862.tar.bz2 | |
[MIPSR6] Skip pixelflinger, memset assembler code on mips32r6
Temporarily use generic C-coded libpixelflinger & memset on mips32r6.
Change-Id: I629b11ba955eaba323cba1df96c39f75f4d24d62
Diffstat (limited to 'libpixelflinger/tests')
| -rw-r--r-- | libpixelflinger/tests/codegen/codegen.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/libpixelflinger/tests/codegen/codegen.cpp b/libpixelflinger/tests/codegen/codegen.cpp index 46c1ccc..148b6f4 100644 --- a/libpixelflinger/tests/codegen/codegen.cpp +++ b/libpixelflinger/tests/codegen/codegen.cpp @@ -9,16 +9,18 @@ #include "codeflinger/CodeCache.h" #include "codeflinger/GGLAssembler.h" #include "codeflinger/ARMAssembler.h" +#if defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6 #include "codeflinger/MIPSAssembler.h" +#endif #include "codeflinger/Arm64Assembler.h" -#if defined(__arm__) || defined(__mips__) || defined(__aarch64__) +#if defined(__arm__) || (defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6) || defined(__aarch64__) # define ANDROID_ARM_CODEGEN 1 #else # define ANDROID_ARM_CODEGEN 0 #endif -#if defined (__mips__) +#if defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6 #define ASSEMBLY_SCRATCH_SIZE 4096 #elif defined(__aarch64__) #define ASSEMBLY_SCRATCH_SIZE 8192 @@ -52,7 +54,7 @@ static void ggl_test_codegen(uint32_t n, uint32_t p, uint32_t t0, uint32_t t1) GGLAssembler assembler( new ARMAssembler(a) ); #endif -#if defined(__mips__) && !defined(__LP64__) +#if defined(__mips__) && !defined(__LP64__) && __mips_isa_rev < 6 GGLAssembler assembler( new ArmToMipsAssembler(a) ); #endif |