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* Add -no-integrated-as at local level.Chih-Hung Hsieh2014-10-064-0/+15
| | | | | | | Later we will enable integrated-as as default at the global level. BUG: 17820427 Change-Id: I1beed3e75d074d970fa9112ec1c0f0df3d43947a
* Fix some clang compilation issues.Dan Albert2014-09-111-2/+2
| | | | | | | | | | | | Use expected inline behavior with clang. GCC defaults to -std=gnu90, giving C89 inline semantics with GNU extensions. Clang defaults to C99. Explicitly use gnu90. Mark an unused parameter as __unused. Fix some incorrect casts. Change-Id: I05b95585d5e3688eda71769b63b6b8a9237bcaf4
* [MIPSR6] Skip pixelflinger, memset assembler code on mips32r6Duane Sand2014-07-313-9/+13
| | | | | | Temporarily use generic C-coded libpixelflinger & memset on mips32r6. Change-Id: I629b11ba955eaba323cba1df96c39f75f4d24d62
* Build pixelflinger tests as native tests, not executables.Narayan Kamath2014-06-266-6/+14
| | | | | | | This has the side effect of building tests for both 32 and 64 bit, where required. Change-Id: I674800d34b4fa7cc5d34573c96b754ac85777970
* pixelflinger: Use pointer arithmetic to determine cache flush parametersAshok Bhat2014-06-191-3/+3
| | | | | | | | | CodeCache casts base address to long and then adds size (of type ssize_t) to get end address. This can cause sign-extension problems. This patch instead uses simple pointer arithmetic. Change-Id: Ib71d515a6fd6a7f4762cf974d6cf4eba9a601fa8 Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
* [MIPS64] Use generic cpu-independent libpixelflinger for mips64Duane Sand2014-06-032-6/+6
| | | | | | | For now, use generic C code instead of generated mips instructions, in the same manner as used on x86 and x86_64 targets. Change-Id: If3607484e0a446a755c62c030b3069d46ab5beb2
* Judge mmap failed by MAP_FAILED instead of NULLHurri Lu2014-05-221-1/+1
| | | | | Change-Id: I74422cfdba341fcd1a6235044700cf3986e853d0 Signed-off-by: Hurri Lu <jlu32@marvell.com>
* Cleanup: warning fixit.Sasha Levitskiy2014-04-112-12/+7
| | | | | | | bootable/recovery has a dependent commit: I9adb470b04e4301989d128c9c3097b21b4dea431 Change-Id: Icf23e659265d71d5226d527c2b40cfbc132320ee Signed-off-by: Sasha Levitskiy <sanek@google.com>
* Fix the build for NEON in libpixelflingerKévin PETIT2014-03-062-1/+5
| | | | | | | | | ARCH_ARM_HAVE_NEON is only ever defined to true, so test for that. For the NEON function to be used, the file has to include machine/cpu-features.h so that __ARM_HAVE_NEON is defined. Change-Id: I0db196b39c493092415859e009531fcff6fc1e8b Signed-off-by: Kévin PETIT <kevin.petit@arm.com>
* Fix the handling of CodeCache return codes in pixelflingerKévin PETIT2014-02-261-2/+2
| | | | | | | | | | The error condition was not correctly detected: an error was reported by checking that the index returned by CodeCache::cache was non-zero. This did not work because this function can return a positive value on success. Change-Id: I1f90125ee62ab277b80da4dfb341733cd6e8e86a Signed-off-by: Kévin PETIT <kevin.petit@arm.com>
* Fix compiler warnings in libpixelflingerAshok Bhat2014-02-209-53/+54
| | | | | Change-Id: I6a5708ae6bc934b196d59d81a6cd550b05ed704f Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
* pixelflinger: support multilib buildsColin Cross2014-02-111-35/+31
| | | | | | | Use the LOCAL_*_arch variables to support building for 32-bit and 64-bit at the same time. Change-Id: Ibef8044e8b6500a6aa111320eb35bcdaf51ad064
* pixelflinger: use __builtin___clear_cache instead of cacheflushColin Cross2014-02-112-7/+3
| | | | | | | cacheflush doesn't exist on LP64 any more, and gcc's __builtin___clear_cache is better in every way. Use it instead. Change-Id: Ibbf6facbdefc15b6dda51d014e1c44fb7aa2b17d
* Use <stdint.h> for INT32_MIN and INT32_MAX.Elliott Hughes2014-01-241-2/+0
| | | | | Bug: 12708004 Change-Id: I99f222b2db1d128abf6ffbf7173a5aaff48f8e85
* system/core: rename aarch64 target to arm64Colin Cross2014-01-2321-174/+174
| | | | | | | Rename aarch64 build targets to arm64. The gcc toolchain is still aarch64. Change-Id: Ia92d8a50824e5329cf00fd6f4f92eae112b7f3a3
* Pixelflinger: Add AArch64 support to pixelflinger JIT.Ashok Bhat2013-12-1224-11/+4178
| | | | | | | | | | | | | | | | | See the comment-block at the top of Aarch64Assembler.cpp for overview on how AArch64 support has been implemented In addition, this commit contains [x] AArch64 inline asm versions of gglmul series of functions and a new unit test bench to test the functions [x] Assembly implementations of scanline_col32cb16blend and scanline_t32cb16blend for AArch64, with unit test bench Change-Id: I915cded9e1d39d9a2a70bf8a0394b8a0064d1eb4 Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
* Pixelflinger: Support for handling 64-bit addresses in GGL AssemblerAshok Bhat2013-12-127-19/+80
| | | | | | | | | | | | | | | | | | | | | | GGLAssembler assumes addresses to be 32-bit and uses ARM 32-bit instructions to load/store/manipulate addresses. To support, 64-bit architectures, following changes has been done 1. ARMAssemblerInterface has been extended to support four new operations ADDR_LDR, ADDR_STR, ADDR_SUB, ADDR_ADD. Base class implements these virtual functions to use 32bit equivalent function. This avoids existing 32-bit Assembler backend implementations like ARMAssembler and MIPSAssembler from mapping the new functions to existing equivalent routines. This also allows 64-bit Architectures like AArch64 to override the function in their assembler backend implementations. 2. GGLAssembler code (spread over GGLAssembler.cpp, GGLAssembler.h and texturing.cpp) has been changed to use the new operations for address operations. Change-Id: I3d7eace4691e3e47cef737d97ac67ce6ef4fb18d Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
* Pixelflinger: Fix issue of pointers being stored in intsAshok Bhat2013-12-123-6/+6
| | | | | | | | | | Pixelflinger's code makes assumptions, at certain places, that pointers can be stored as ints. This patch makes use of uintptr_t wherever pointers are stored as int or cast to int. Change-Id: Ie76f425cbc82ac038a747f77a95bd31774f4a8e8 Signed-off-by: Ashok Bhat <ashok.bhat@arm.com>
* libpixelflinger: do not use anonymous structssynergy dev2013-11-251-5/+5
| | | | | | Avoiding the use of gnu extensions improves code portability Change-Id: Ie9e94e3ce030f52a22997f8a48de1e6c1c549894
* Add liblogYing Wang2013-04-091-2/+2
| | | | | Bug: 8580410 Change-Id: Iab3a9b4307f207c14a04a922cc7350c54e60e9ad
* move tinyutils into its own namespaceMathias Agopian2013-04-0125-130/+185
| | | | | | | | | I was fed-up with the constant conflicts in Eclipse with the "libutils" version. Also fix a few copyright notices. Change-Id: I8ffcb845af4b5d0d178f5565f64dfcfbfa27fcd6
* Remove unnecessary compiler pragma.Ian Rogers2012-08-291-8/+3
| | | | | | | | | | With dlmalloc 2.8.6 the compiler pragmas to suppress warnings are not necessary. Also fix compiler warning about redefinition of LOG_TAG. Depends upon: https://android-review.googlesource.com/42351 Change-Id: I50f70be31f4bd994b09083e722759464476c70b3
* Merge "Add MIPS support to pixelflinger."Jean-Baptiste Queru2012-08-2719-182/+3970
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| * Add MIPS support to pixelflinger.Paul Lind2012-08-1319-182/+3970
| | | | | | | | | | | | | | See the comment-block at the top of MIPSAssembler.cpp for implementation overview. Change-Id: Id492c10610574af8c89c38d19e12fafc3652c28a
* | Upgrade to dlmalloc 2.8.5.Ian Rogers2012-08-202-26/+67
|/ | | | | | | | | | Remove mspace functionality from cutils. Directly declare mspace from dlmalloc in code flinger's code cache, and manage without using morecore. Depends upon: https://android-review.googlesource.com/41717 Change-Id: If927254febd4414212c690f16509ef2ee1b44b44
* Add Mips support to libpixelflingerDuane Sand2012-05-303-1/+278
| | | | Change-Id: Ib81cb01b8d90ed1afa1fd54b3cc009d7fec0f814
* Prevent bit shifting if num bits is negativeBhanu Chetlapalli2012-01-251-1/+2
| | | | | | | | Causes OpenGL Software Renderer to generate incorrect window coordinates on MIPS & possibly x86 Change-Id: I3c51b6a5a4e6af75e9b31d9d47e4e4d894825888 Signed-off-by: Bhanu Chetlapalli <bhanu@mips.com>
* Rename LOG_ASSERT to ALOG_ASSERTSteve Block2012-01-171-6/+6
| | | | Change-Id: Iff15ac5e7ab226d437c08d23f18fd54e6793e65c
* Rename (IF_)LOGE(_IF) to (IF_)ALOGE(_IF)Steve Block2012-01-176-9/+9
| | | | Change-Id: I52fce957db06c281e2618daa4e2ecba19974f2eb
* Rename (IF_)LOGW(_IF) to (IF_)ALOGW(_IF)Steve Block2012-01-171-1/+1
| | | | Change-Id: I6c2a1d56dadb7e5c69e478f4d8c7d9f2127db2af
* Rename (IF_)LOGI(_IF) to (IF_)ALOGI(_IF)Steve Block2012-01-173-5/+5
| | | | Change-Id: I929ea38bc6fe6efeefa7870c8e7e4c19cd0029b3
* Rename (IF_)LOGD(_IF) to (IF_)ALOGD(_IF)Steve Block2012-01-171-8/+8
| | | | Change-Id: Ia0476219b71ece949595515ee07ea072ed349d73
* Rename (IF_)LOGV(_IF) to (IF_)ALOGV(_IF)Steve Block2012-01-171-4/+4
| | | | Change-Id: Ia9a357dec5ad12eea93fd03401a3b02b38e4e94f
* Fix DEBUG_NEEDS usageVladimir Chtchetkine2011-08-291-1/+1
| | | | Change-Id: Ic107c60080e55e1f9092f20fe3bd55e7592ca9fd
* pixelflinger: Provide more scanline shortcut functions.David 'Digit' Turner2011-04-161-40/+842
| | | | | | | | | | | | | | | | | | | This patch adds a dozen more "shortcut" scanline-processing functions to pixel-flingers. All of them avoid using the JIT for the corresponding operation (on ARM), or using the generic and _extremely_ slow 'scanline' function (on x86, where there is no JIT). The shortcuts were selected by running the system under emulation (build full_x86-eng, then launch emulator-x86), and correspond to operations that are in use when using the system's typical UI features. This makes it much more responsive and amenable to testing most applications, at least those that don't use OpenGL ES heavily. Note that HW OpenGLES emulation is under completion and should solve this problem entirely, though is not there yet. Change-Id: I9c73ba21ad158d6cc5532fabe7ed2419e00ecb3f
* am 4906db21: Merge "codeflinger: Correct misleading comment of STM instruction"Jean-Baptiste Queru2010-11-231-1/+1
|\ | | | | | | | | * commit '4906db21e041327042b87122b233e1f150618334': codeflinger: Correct misleading comment of STM instruction
| * Merge "codeflinger: Correct misleading comment of STM instruction"Jean-Baptiste Queru2010-11-231-1/+1
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| | * codeflinger: Correct misleading comment of STM instructionKan-Ru Chen2010-08-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | According to the ARM Architecture Reference Manual, the comment on STM instruction should be in reverse order. Change-Id: I4af852a0478798ff7b02ab9c29c68e320ff78696 Signed-off-by: Kan-Ru Chen <kanru@0xlab.org>
* | | am 8e0e372a: Set PROT_EXEC on the whole pixelflinger code cache.Jean-Baptiste Queru2010-10-151-1/+1
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Merge commit '8e0e372a388434a0553810e2b958e59a26a6bd96' into gingerbread-plus-aosp * commit '8e0e372a388434a0553810e2b958e59a26a6bd96': Set PROT_EXEC on the whole pixelflinger code cache.
| * | | Set PROT_EXEC on the whole pixelflinger code cache.Jean-Baptiste Queru2010-10-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pointer difference between word pointers is a number of words, and it needs to be multiplied by the size of a word to get a proper byte size. Without this, we tend to see crashes when the code crosses a page boundary. Bug: 3026204 Bug: 3097482 Change-Id: I37776d26d5afcdb1da71680de02fbb95e6548371
* | | | Manual mergeJean-Baptiste Queru2010-08-252-32/+31
|\ \ \ \ | | |/ / | |/| | | | | | Change-Id: I849703a709fe4bf9ea7181268221d9b648b2e73d
| * | | Copyright message changedDave Butcher2010-08-192-32/+31
| | |/ | |/| | | | | | | Change requested by Android Open Source Project
* | | am 5dfd90e5: Merge "pixelflinger: Fix function naming typo: gglBitBlti"Jean-Baptiste Queru2010-08-171-1/+1
|\ \ \ | |/ / | | | | | | | | | | | | | | | Merge commit '5dfd90e5c79774d9981d25ab4defbd1e1f652c34' into gingerbread-plus-aosp * commit '5dfd90e5c79774d9981d25ab4defbd1e1f652c34': pixelflinger: Fix function naming typo: gglBitBlti
| * | Merge "pixelflinger: Fix function naming typo: gglBitBlti"Jean-Baptiste Queru2010-08-161-1/+1
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| | * | pixelflinger: Fix function naming typo: gglBitBltiJim Huang2010-08-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From the functionality, the function gglBitBlti() implemented bit-block (image) transfer operation in which several bitmaps are combined into one using a raster operator. Renaming to gglBitBlit() should be explicit. Change-Id: I23886623b5421131cf7c7bfb8ec67c3809566c93
* | | | am 4ea1a52b: Merge "libpixelflinger: ARMv6 specific objects are not used. ↵Jean-Baptiste Queru2010-08-171-18/+0
|\ \ \ \ | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove." Merge commit '4ea1a52b1bbbd6e78c5909c75d773416108f5b84' into gingerbread-plus-aosp * commit '4ea1a52b1bbbd6e78c5909c75d773416108f5b84': libpixelflinger: ARMv6 specific objects are not used. Remove.
| * | | Merge "libpixelflinger: ARMv6 specific objects are not used. Remove."Jean-Baptiste Queru2010-08-161-18/+0
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| | * | | libpixelflinger: ARMv6 specific objects are not used. Remove.Jim Huang2010-08-101-18/+0
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch attempts to remove the generation of libpixelflinger_armv6, which contains the ARMv6 specific object - rotate90CW_4x4_16v6.o. But, libpixelflinger_armv6 is not actually used by other projects. Change-Id: I0e26fa2cf8b4dacfd208dd4279539c3e5b07580e
* | | | am 6090dacd: libpixelflinger: Move codeflinger test function to ↵Jim Huang2010-08-173-26/+51
|\ \ \ \ | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | test-opengl-codegen Merge commit '6090dacd1894429baaf13f7b30b2f6e9e2c1617f' into gingerbread-plus-aosp * commit '6090dacd1894429baaf13f7b30b2f6e9e2c1617f': libpixelflinger: Move codeflinger test function to test-opengl-codegen
| * | | libpixelflinger: Move codeflinger test function to test-opengl-codegenJim Huang2010-08-103-26/+51
| |/ / | | | | | | | | | | | | | | | | | | There is no need to include codeflinger test function in libpixelflinger. Instead, it should exist in test-opengl-codegen. Change-Id: Ic5b0bd1f754b2ac678d4e16565568c70ceb8d325
generated by cgit v1.1 at 2024-12-25 15:15:16 +0000