Merge branch 'master' of https://android.googlesource.com/toolchain/binutils

38 files changed, 513 insertions, 117 deletions

diff --git a/binutils-2.25/bfd/ChangeLog b/binutils-2.25/bfd/ChangeLog
index f124354..f229d66 100644
--- a/binutils-2.25/bfd/ChangeLog
+++ b/binutils-2.25/bfd/ChangeLog
@@ -1,3 +1,17 @@
+2015-07-23  Joseph Myers  <joseph@codesourcery.com>
+
+	* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections)
+	<DT_MIPS_RLD_MAP_REL>: Add target address to host address
+	difference, not to host pointer.
+
+2015-06-26  Matthew Fortune  <matthew.fortune@imgtec.com>
+
+	* elfxx-mips.c (_bfd_mips_elf_create_dynamic_sections): Use executable
+	instead of !shared to indicate an application vs shared library.
+	(_bfd_mips_elf_size_dynamic_sections): Likewise.
+	(_bfd_mips_elf_finish_dynamic_sections): Handle DT_MIPS_RLD_MAP_REL.
+	(_bfd_mips_elf_get_target_dtag): Likewise.
+
 2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
 	* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
@@ -6,12 +20,6 @@
 	float only when Tag_ABI_VFP_args is 1, using new enum value
 	AEABI_VFP_args_vfp to check that.
 
-2015-07-23  Joseph Myers  <joseph@codesourcery.com>
-
-	* elfxx-mips.c (_bfd_mips_elf_finish_dynamic_sections)
-	<DT_MIPS_RLD_MAP_REL>: Add target address to host address
-	difference, not to host pointer.
-
 2015-04-01  Tejas Belagod  <tejas.belagod@arm.com>
 	    Marcus Shawcroft  <marcus.shawcroft@arm.com>
 	    Jiong Wang  <jiong.wang@arm.com>
diff --git a/binutils-2.25/bfd/elfxx-mips.c b/binutils-2.25/bfd/elfxx-mips.c
index 998549d..02440cd 100644
--- a/binutils-2.25/bfd/elfxx-mips.c
+++ b/binutils-2.25/bfd/elfxx-mips.c
@@ -9785,7 +9785,7 @@ _bfd_mips_elf_size_dynamic_sections (bfd *output_bfd,
 	return FALSE;
 
       if (info->executable
-	  && !MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_RLD_MAP2, 0))
+	  && !MIPS_ELF_ADD_DYNAMIC_ENTRY (info, DT_MIPS_RLD_MAP_REL, 0))
 	return FALSE;
 
       /* The DT_DEBUG entry may be filled in by the dynamic linker and
@@ -11496,12 +11496,15 @@ _bfd_mips_elf_finish_dynamic_sections (bfd *output_bfd,
 		    break;
 		  }
 		s = h->root.u.def.section;
+
+		/* The MIPS_RLD_MAP tag stores the absolute address of the
+		   debug pointer.  */
 		dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
 				  + h->root.u.def.value);
 	      }
 	      break;
 
-	    case DT_MIPS_RLD_MAP2:
+	    case DT_MIPS_RLD_MAP_REL:
 	      {
 		struct elf_link_hash_entry *h;
 		bfd_vma dt_addr, rld_addr;
@@ -11514,6 +11517,8 @@ _bfd_mips_elf_finish_dynamic_sections (bfd *output_bfd,
 		  }
 		s = h->root.u.def.section;
 
+		/* The MIPS_RLD_MAP_REL tag stores the offset to the debug
+		   pointer, relative to the address of the tag.  */
 		dt_addr = (sdyn->output_section->vma + sdyn->output_offset
 			   + (b - sdyn->contents));
 		rld_addr = (s->output_section->vma + s->output_offset
@@ -15446,8 +15451,8 @@ _bfd_mips_elf_get_target_dtag (bfd_vma dtag)
       return "MIPS_HIPAGENO";
     case DT_MIPS_RLD_MAP:
       return "MIPS_RLD_MAP";
-    case DT_MIPS_RLD_MAP2:
-      return "MIPS_RLD_MAP2";
+    case DT_MIPS_RLD_MAP_REL:
+      return "MIPS_RLD_MAP_REL";
     case DT_MIPS_DELTA_CLASS:
       return "MIPS_DELTA_CLASS";
     case DT_MIPS_DELTA_CLASS_NO:
diff --git a/binutils-2.25/binutils/ChangeLog b/binutils-2.25/binutils/ChangeLog
index 9f7e17c..3e0ea7c 100644
--- a/binutils-2.25/binutils/ChangeLog
+++ b/binutils-2.25/binutils/ChangeLog
@@ -1,3 +1,7 @@
+2015-06-26  Matthew Fortune  <matthew.fortune@imgtec.com>
+
+	* readelf.c (get_mips_dynamic_type): Handle DT_MIPS_RLD_MAP_REL.
+
 2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
 	* readelf.c (arm_attr_tag_ABI_VFP_args): Add "compatible".
diff --git a/binutils-2.25/binutils/readelf.c b/binutils-2.25/binutils/readelf.c
index 83518c7..e59dd2e 100644
--- a/binutils-2.25/binutils/readelf.c
+++ b/binutils-2.25/binutils/readelf.c
@@ -1618,7 +1618,7 @@ get_mips_dynamic_type (unsigned long type)
     case DT_MIPS_GOTSYM: return "MIPS_GOTSYM";
     case DT_MIPS_HIPAGENO: return "MIPS_HIPAGENO";
     case DT_MIPS_RLD_MAP: return "MIPS_RLD_MAP";
-    case DT_MIPS_RLD_MAP2: return "MIPS_RLD_MAP2";
+    case DT_MIPS_RLD_MAP_REL: return "MIPS_RLD_MAP_REL";
     case DT_MIPS_DELTA_CLASS: return "MIPS_DELTA_CLASS";
     case DT_MIPS_DELTA_CLASS_NO: return "MIPS_DELTA_CLASS_NO";
     case DT_MIPS_DELTA_INSTANCE: return "MIPS_DELTA_INSTANCE";
diff --git a/binutils-2.25/gold/ChangeLog b/binutils-2.25/gold/ChangeLog
index 24e8755..9e84837 100644
--- a/binutils-2.25/gold/ChangeLog
+++ b/binutils-2.25/gold/ChangeLog
@@ -1,4 +1,78 @@
-2015-10.27  Han Shen  <shenhan@google.com>
+2015-07-20  Yiran Wang  <yiran@google.com>
+	Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/15574
+	* resolve.cc (Symbol_table): Remove warning about references
+	from shared objects to hidden symbols.
+	* testsuite/Makefile.am (hidden_test): Add hidden_test.syms.
+	* testsuite/Makefile.in: Regenerate.
+	* testsuite/hidden_test.sh: Check dynamic symbol table; update
+	expected error messages.
+
+2016-06-28 Rahul Chaudhry  <rahulchaudhry@google.com>
+
+	Revert patch -- to be replaced by the upstream patch with tests.
+
+	2015-06-16  Yiran Wang <yiran@google.com>
+
+	    * resolve.cc disable the warning of a hidden symbol matches a
+	    reference to be resolved
+
+2016-02-05  Sriraman Tallam  <tmsriram@google.com>
+
+        * icf.cc (get_rel_addend): New function.
+        (get_section_contents):  Move merge section addend computation to a
+        new function.  Ignore negative values for SHT_REL and SHT_RELA addends.
+        Fix bug to not read past the length of the section.
+
+    Fix bug related to addend computation for MERGE sections.
+
+
+2016-02-26  Egor Kochetov  <egor.kochetov@intel.com>
+	    Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/19735
+	* ehframe.h (Cie::fde_encoding): New method.
+	* ehframe.cc (Eh_frame::read_fde): Discard FDEs for zero-length
+	address ranges.
+
+2016-02-11 Rahul Chaudhry  <rahulchaudhry@google.com>
+
+	* aarch64.cc (Target_aarch64::scan_erratum_843419_span): Remove
+	info message for every erratum 843419 found and fixed.
+
+2015-12-17  Peter Collingbourne  <pcc@google.com>
+
+	PR gold/18780
+	* arm.cc (Target_arm::do_make_data_plt): Choose PLT generator based
+	on value of --long-plt flag.
+	(Output_data_plt_arm_standard::do_get_plt_entry_size): Moved to
+	Output_data_plt_arm_short.
+	(Output_data_plt_arm_standard::do_fill_plt_entry): Likewise.
+	(Output_data_plt_arm_standard::plt_entry): Likewise.
+	(Output_data_plt_arm_standard::do_fill_first_plt_entry): Fix
+	variable reference.
+	(Output_data_plt_arm_short): New class.
+	(Output_data_plt_arm_short::do_fill_plt_entry): Error out on too large
+	PLT offsets instead of asserting.
+	(Output_data_plt_arm_long): New class.
+	* options.h (General_options): Define --long-plt flag.
+
+2016-01-15 Han Shen  <shenhan@google.com>
+
+	PR gold/19472 - need pc-relative stubs.
+
+	* aarch64.cc (Reloc_stub::stub_type_for_reloc): Return PC-relative
+	stub type for DSOs and pie executables.
+
+2015-11-05  Cary Coutant  <ccoutant@gmail.com>
+
+	PR gold/19163
+	* aarch64.cc (Target_aarch64::Relocate::relocate): Don't apply
+	certain relocations if --no-apply-dynamic-relocs is set.
+	* options.h (--apply-dynamic-relocs): New aarch64-specific option.
+
+2015-10-27  Han Shen  <shenhan@google.com>
 
 	PR gold/19042 - unsupported reloc 311/312.
 
diff --git a/binutils-2.25/gold/aarch64.cc b/binutils-2.25/gold/aarch64.cc
index a62833b..aa540f0 100644
--- a/binutils-2.25/gold/aarch64.cc
+++ b/binutils-2.25/gold/aarch64.cc
@@ -1327,10 +1327,12 @@ Reloc_stub<size, big_endian>::stub_type_for_reloc(
   if (aarch64_valid_for_adrp_p(location, dest))
     return ST_ADRP_BRANCH;
 
-  if (parameters->options().output_is_position_independent()
-      && parameters->options().output_is_executable())
+  // Always use PC-relative addressing in case of -shared or -pie.
+  if (parameters->options().output_is_position_independent())
     return ST_LONG_BRANCH_PCREL;
 
+  // This saves 2 insns per stub, compared to ST_LONG_BRANCH_PCREL.
+  // But is only applicable to non-shared or non-pie.
   return ST_LONG_BRANCH_ABS;
 }
 
@@ -6907,16 +6909,41 @@ Target_aarch64<size, big_endian>::Relocate::relocate(
       break;
 
     case elfcpp::R_AARCH64_ABS64:
+      if (!parameters->options().apply_dynamic_relocs()
+          && parameters->options().output_is_position_independent()
+          && gsym != NULL
+          && gsym->needs_dynamic_reloc(reloc_property->reference_flags())
+          && !gsym->can_use_relative_reloc(false))
+        // We have generated an absolute dynamic relocation, so do not
+        // apply the relocation statically. (Works around bugs in older
+        // Android dynamic linkers.)
+        break;
       reloc_status = Reloc::template rela_ua<64>(
 	view, object, psymval, addend, reloc_property);
       break;
 
     case elfcpp::R_AARCH64_ABS32:
+      if (!parameters->options().apply_dynamic_relocs()
+          && parameters->options().output_is_position_independent()
+          && gsym != NULL
+          && gsym->needs_dynamic_reloc(reloc_property->reference_flags()))
+        // We have generated an absolute dynamic relocation, so do not
+        // apply the relocation statically. (Works around bugs in older
+        // Android dynamic linkers.)
+        break;
       reloc_status = Reloc::template rela_ua<32>(
 	view, object, psymval, addend, reloc_property);
       break;
 
     case elfcpp::R_AARCH64_ABS16:
+      if (!parameters->options().apply_dynamic_relocs()
+          && parameters->options().output_is_position_independent()
+          && gsym != NULL
+          && gsym->needs_dynamic_reloc(reloc_property->reference_flags()))
+        // We have generated an absolute dynamic relocation, so do not
+        // apply the relocation statically. (Works around bugs in older
+        // Android dynamic linkers.)
+        break;
       reloc_status = Reloc::template rela_ua<16>(
 	view, object, psymval, addend, reloc_property);
       break;
@@ -8180,10 +8207,6 @@ Target_aarch64<size, big_endian>::scan_erratum_843419_span(
 	    }
 	  if (do_report)
 	    {
-	      gold_info(_("Erratum 843419 found and fixed at \"%s\", "
-			     "section %d, offset 0x%08x."),
-			   relobj->name().c_str(), shndx,
-			   (unsigned int)(span_start + offset));
 	      unsigned int erratum_insn_offset =
 		span_start + offset + insn_offset;
 	      Address erratum_address =
diff --git a/binutils-2.25/gold/arm.cc b/binutils-2.25/gold/arm.cc
index 86920c4..94149d6 100644
--- a/binutils-2.25/gold/arm.cc
+++ b/binutils-2.25/gold/arm.cc
@@ -62,7 +62,10 @@ template<bool big_endian>
 class Output_data_plt_arm;
 
 template<bool big_endian>
-class Output_data_plt_arm_standard;
+class Output_data_plt_arm_short;
+
+template<bool big_endian>
+class Output_data_plt_arm_long;
 
 template<bool big_endian>
 class Stub_table;
@@ -2558,7 +2561,11 @@ class Target_arm : public Sized_target<32, big_endian>
 		   Output_data_space* got_irelative)
   {
     gold_assert(got_plt != NULL && got_irelative != NULL);
-    return new Output_data_plt_arm_standard<big_endian>(
+    if (parameters->options().long_plt())
+      return new Output_data_plt_arm_long<big_endian>(
+	layout, got, got_plt, got_irelative);
+    else
+      return new Output_data_plt_arm_short<big_endian>(
 	layout, got, got_plt, got_irelative);
   }
 
@@ -7777,29 +7784,14 @@ class Output_data_plt_arm_standard : public Output_data_plt_arm<big_endian>
   do_first_plt_entry_offset() const
   { return sizeof(first_plt_entry); }
 
-  // Return the size of a PLT entry.
-  virtual unsigned int
-  do_get_plt_entry_size() const
-  { return sizeof(plt_entry); }
-
   virtual void
   do_fill_first_plt_entry(unsigned char* pov,
 			  Arm_address got_address,
 			  Arm_address plt_address);
 
-  virtual void
-  do_fill_plt_entry(unsigned char* pov,
-		    Arm_address got_address,
-		    Arm_address plt_address,
-		    unsigned int got_offset,
-		    unsigned int plt_offset);
-
  private:
   // Template for the first PLT entry.
   static const uint32_t first_plt_entry[5];
-
-  // Template for subsequent PLT entries.
-  static const uint32_t plt_entry[3];
 };
 
 // ARM PLTs.
@@ -7827,7 +7819,7 @@ Output_data_plt_arm_standard<big_endian>::do_fill_first_plt_entry(
 {
   // Write first PLT entry.  All but the last word are constants.
   const size_t num_first_plt_words = (sizeof(first_plt_entry)
-				      / sizeof(plt_entry[0]));
+				      / sizeof(first_plt_entry[0]));
   for (size_t i = 0; i < num_first_plt_words - 1; i++)
     elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
   // Last word in first PLT entry is &GOT[0] - .
@@ -7836,9 +7828,39 @@ Output_data_plt_arm_standard<big_endian>::do_fill_first_plt_entry(
 }
 
 // Subsequent entries in the PLT.
+// This class generates short (12-byte) entries, for displacements up to 2^28.
 
 template<bool big_endian>
-const uint32_t Output_data_plt_arm_standard<big_endian>::plt_entry[3] =
+class Output_data_plt_arm_short : public Output_data_plt_arm_standard<big_endian>
+{
+ public:
+  Output_data_plt_arm_short(Layout* layout,
+			    Arm_output_data_got<big_endian>* got,
+			    Output_data_space* got_plt,
+			    Output_data_space* got_irelative)
+    : Output_data_plt_arm_standard<big_endian>(layout, got, got_plt, got_irelative)
+  { }
+
+ protected:
+  // Return the size of a PLT entry.
+  virtual unsigned int
+  do_get_plt_entry_size() const
+  { return sizeof(plt_entry); }
+
+  virtual void
+  do_fill_plt_entry(unsigned char* pov,
+		    Arm_address got_address,
+		    Arm_address plt_address,
+		    unsigned int got_offset,
+		    unsigned int plt_offset);
+
+ private:
+  // Template for subsequent PLT entries.
+  static const uint32_t plt_entry[3];
+};
+
+template<bool big_endian>
+const uint32_t Output_data_plt_arm_short<big_endian>::plt_entry[3] =
 {
   0xe28fc600,	// add   ip, pc, #0xNN00000
   0xe28cca00,	// add   ip, ip, #0xNN000
@@ -7847,7 +7869,7 @@ const uint32_t Output_data_plt_arm_standard<big_endian>::plt_entry[3] =
 
 template<bool big_endian>
 void
-Output_data_plt_arm_standard<big_endian>::do_fill_plt_entry(
+Output_data_plt_arm_short<big_endian>::do_fill_plt_entry(
     unsigned char* pov,
     Arm_address got_address,
     Arm_address plt_address,
@@ -7856,8 +7878,9 @@ Output_data_plt_arm_standard<big_endian>::do_fill_plt_entry(
 {
   int32_t offset = ((got_address + got_offset)
 		    - (plt_address + plt_offset + 8));
+  if (offset < 0 || offset > 0x0fffffff)
+    gold_error(_("PLT offset too large, try linking with --long-plt"));
 
-  gold_assert(offset >= 0 && offset < 0x0fffffff);
   uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
   elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
   uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
@@ -7866,6 +7889,68 @@ Output_data_plt_arm_standard<big_endian>::do_fill_plt_entry(
   elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
 }
 
+// This class generates long (16-byte) entries, for arbitrary displacements.
+
+template<bool big_endian>
+class Output_data_plt_arm_long : public Output_data_plt_arm_standard<big_endian>
+{
+ public:
+  Output_data_plt_arm_long(Layout* layout,
+			   Arm_output_data_got<big_endian>* got,
+			   Output_data_space* got_plt,
+			   Output_data_space* got_irelative)
+    : Output_data_plt_arm_standard<big_endian>(layout, got, got_plt, got_irelative)
+  { }
+
+ protected:
+  // Return the size of a PLT entry.
+  virtual unsigned int
+  do_get_plt_entry_size() const
+  { return sizeof(plt_entry); }
+
+  virtual void
+  do_fill_plt_entry(unsigned char* pov,
+		    Arm_address got_address,
+		    Arm_address plt_address,
+		    unsigned int got_offset,
+		    unsigned int plt_offset);
+
+ private:
+  // Template for subsequent PLT entries.
+  static const uint32_t plt_entry[4];
+};
+
+template<bool big_endian>
+const uint32_t Output_data_plt_arm_long<big_endian>::plt_entry[4] =
+{
+  0xe28fc200,	// add   ip, pc, #0xN0000000
+  0xe28cc600,	// add   ip, ip, #0xNN00000
+  0xe28cca00,	// add   ip, ip, #0xNN000
+  0xe5bcf000,	// ldr   pc, [ip, #0xNNN]!
+};
+
+template<bool big_endian>
+void
+Output_data_plt_arm_long<big_endian>::do_fill_plt_entry(
+    unsigned char* pov,
+    Arm_address got_address,
+    Arm_address plt_address,
+    unsigned int got_offset,
+    unsigned int plt_offset)
+{
+  int32_t offset = ((got_address + got_offset)
+		    - (plt_address + plt_offset + 8));
+
+  uint32_t plt_insn0 = plt_entry[0] | (offset >> 28);
+  elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
+  uint32_t plt_insn1 = plt_entry[1] | ((offset >> 20) & 0xff);
+  elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
+  uint32_t plt_insn2 = plt_entry[2] | ((offset >> 12) & 0xff);
+  elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
+  uint32_t plt_insn3 = plt_entry[3] | (offset & 0xfff);
+  elfcpp::Swap<32, big_endian>::writeval(pov + 12, plt_insn3);
+}
+
 // Write out the PLT.  This uses the hand-coded instructions above,
 // and adjusts them as needed.  This is all specified by the arm ELF
 // Processor Supplement.
diff --git a/binutils-2.25/gold/dwp.cc b/binutils-2.25/gold/dwp.cc
index 121f37b..9eef68a 100644
--- a/binutils-2.25/gold/dwp.cc
+++ b/binutils-2.25/gold/dwp.cc
@@ -2427,6 +2427,10 @@ main(int argc, char** argv)
   if (exe_filename == NULL && files.empty())
     gold_fatal(_("no input files and no executable specified"));
 
+  // If there are no DWO files, there is nothing to do.
+  if (files.empty())
+    return EXIT_SUCCESS;
+
   if (verify_only)
     {
       // Get list of DWO files in the DWP file and compare with
diff --git a/binutils-2.25/gold/ehframe.cc b/binutils-2.25/gold/ehframe.cc
index 4f92618..fc45e87 100644
--- a/binutils-2.25/gold/ehframe.cc
+++ b/binutils-2.25/gold/ehframe.cc
@@ -1010,6 +1010,8 @@ Eh_frame::read_fde(Sized_relobj_file<size, big_endian>* object,
   // pointer to a PC relative offset when generating a shared library.
   relocs->advance(pfdeend - pcontents);
 
+  // Find the section index for code that this FDE describes.
+  // If we have discarded the section, we can also discard the FDE.
   unsigned int fde_shndx;
   const int sym_size = elfcpp::Elf_sizes<size>::sym_size;
   if (symndx >= symbols_size / sym_size)
@@ -1018,13 +1020,40 @@ Eh_frame::read_fde(Sized_relobj_file<size, big_endian>* object,
   bool is_ordinary;
   fde_shndx = object->adjust_sym_shndx(symndx, sym.get_st_shndx(),
 				       &is_ordinary);
+  bool is_discarded = (is_ordinary
+		       && fde_shndx != elfcpp::SHN_UNDEF
+		       && fde_shndx < object->shnum()
+		       && !object->is_section_included(fde_shndx));
+
+  // Fetch the address range field from the FDE. The offset and size
+  // of the field depends on the PC encoding given in the CIE, but
+  // it is always an absolute value. If the address range is 0, this
+  // FDE corresponds to a function that was discarded during optimization
+  // (too late to discard the corresponding FDE).
+  uint64_t address_range = 0;
+  int pc_size = cie->fde_encoding() & 7;
+  if (pc_size == elfcpp::DW_EH_PE_absptr)
+    pc_size = size == 32 ? elfcpp::DW_EH_PE_udata4 : elfcpp::DW_EH_PE_udata8;
+  switch (pc_size)
+    {
+    case elfcpp::DW_EH_PE_udata2:
+      address_range = elfcpp::Swap<16, big_endian>::readval(pfde + 2);
+      break;
+    case elfcpp::DW_EH_PE_udata4:
+      address_range = elfcpp::Swap<32, big_endian>::readval(pfde + 4);
+      break;
+    case elfcpp::DW_EH_PE_udata8:
+      gold_assert(size == 64);
+      address_range = elfcpp::Swap_unaligned<64, big_endian>::readval(pfde + 8);
+      break;
+    default:
+      // All other cases were rejected in Eh_frame::read_cie.
+      gold_unreachable();
+    }
 
-  if (is_ordinary
-      && fde_shndx != elfcpp::SHN_UNDEF
-      && fde_shndx < object->shnum()
-      && !object->is_section_included(fde_shndx))
+  if (is_discarded || address_range == 0)
     {
-      // This FDE applies to a section which we are discarding.  We
+      // This FDE applies to a discarded function.  We
       // can discard this FDE.
       this->merge_map_.add_mapping(object, shndx, (pfde - 8) - pcontents,
 				   pfdeend - (pfde - 8), -1);
diff --git a/binutils-2.25/gold/ehframe.h b/binutils-2.25/gold/ehframe.h
index e9c9da8..8c0df99 100644
--- a/binutils-2.25/gold/ehframe.h
+++ b/binutils-2.25/gold/ehframe.h
@@ -322,6 +322,11 @@ class Cie
 	unsigned int addralign, Eh_frame_hdr* eh_frame_hdr,
 	Post_fdes* post_fdes);
 
+  // Return the FDE encoding.
+  unsigned char
+  fde_encoding() const
+  { return this->fde_encoding_; }
+
   friend bool operator<(const Cie&, const Cie&);
   friend bool operator==(const Cie&, const Cie&);
 
diff --git a/binutils-2.25/gold/icf.cc b/binutils-2.25/gold/icf.cc
index ad88715..1ae1829 100644
--- a/binutils-2.25/gold/icf.cc
+++ b/binutils-2.25/gold/icf.cc
@@ -213,6 +213,45 @@ preprocess_for_unique_sections(const std::vector<Section_id>& id_section,
     }
 }
 
+// For SHF_MERGE sections that use REL relocations, the addend is stored in
+// the text section at the relocation offset.  Read  the addend value given
+// the pointer to the addend in the text section and the addend size.
+// Update the addend value if a valid addend is found.
+// Parameters:
+// RELOC_ADDEND_PTR   : Pointer to the addend in the text section.
+// ADDEND_SIZE        : The size of the addend.
+// RELOC_ADDEND_VALUE : Pointer to the addend that is updated.
+
+inline void
+get_rel_addend(const unsigned char* reloc_addend_ptr,
+	       const unsigned int addend_size,
+	       uint64_t* reloc_addend_value)
+{
+  switch (addend_size)
+    {
+    case 0:
+      break;
+    case 1:
+      *reloc_addend_value =
+        read_from_pointer<8>(reloc_addend_ptr);
+      break;
+    case 2:
+      *reloc_addend_value =
+          read_from_pointer<16>(reloc_addend_ptr);
+      break;
+    case 4:
+      *reloc_addend_value =
+        read_from_pointer<32>(reloc_addend_ptr);
+      break;
+    case 8:
+      *reloc_addend_value =
+        read_from_pointer<64>(reloc_addend_ptr);
+      break;
+    default:
+      gold_unreachable();
+    }
+}
+
 // This returns the buffer containing the section's contents, both
 // text and relocs.  Relocs are differentiated as those pointing to
 // sections that could be folded and those that cannot.  Only relocs
@@ -397,58 +436,36 @@ get_section_contents(bool first_iteration,
                   uint64_t entsize =
                     (it_v->first)->section_entsize(it_v->second);
 		  long long offset = it_a->first;
-
-                  unsigned long long addend = it_a->second;
-                  // Ignoring the addend when it is a negative value.  See the 
-                  // comments in Merged_symbol_value::Value in object.h.
-                  if (addend < 0xffffff00)
-                    offset = offset + addend;
-
-		  // For SHT_REL relocation sections, the addend is stored in the
-		  // text section at the relocation offset.
-		  uint64_t reloc_addend_value = 0;
+		  // Handle SHT_RELA and SHT_REL addends, only one of these
+		  // addends exists.
+		  // Get the SHT_RELA addend.  For RELA relocations, we have
+		  // the addend from the relocation.
+		  uint64_t reloc_addend_value = it_a->second;
+
+		  // Handle SHT_REL addends.
+		  // For REL relocations, we need to fetch the addend from the
+		  // section contents.
                   const unsigned char* reloc_addend_ptr =
 		    contents + static_cast<unsigned long long>(*it_o);
-		  switch(*it_addend_size)
-		    {
-		      case 0:
-		        {
-                          break;
-                        }
-                      case 1:
-                        {
-                          reloc_addend_value =
-                            read_from_pointer<8>(reloc_addend_ptr);
-			  break;
-                        }
-                      case 2:
-                        {
-                          reloc_addend_value =
-                            read_from_pointer<16>(reloc_addend_ptr);
-			  break;
-                        }
-                      case 4:
-                        {
-                          reloc_addend_value =
-                            read_from_pointer<32>(reloc_addend_ptr);
-			  break;
-                        }
-                      case 8:
-                        {
-                          reloc_addend_value =
-                            read_from_pointer<64>(reloc_addend_ptr);
-			  break;
-                        }
-		      default:
-		        gold_unreachable();
-		    }
-		  offset = offset + reloc_addend_value;
+
+		  // Update the addend value with the SHT_REL addend if
+		  // available.
+		  get_rel_addend(reloc_addend_ptr, *it_addend_size,
+				 &reloc_addend_value);
+
+		  // Ignore the addend when it is a negative value.  See the
+		  // comments in Merged_symbol_value::value in object.h.
+		  if (reloc_addend_value < 0xffffff00)
+		    offset = offset + reloc_addend_value;
 
                   section_size_type secn_len;
+
                   const unsigned char* str_contents =
                   (it_v->first)->section_contents(it_v->second,
                                                   &secn_len,
                                                   false) + offset;
+		  gold_assert (offset < (long long) secn_len);
+
                   if ((secn_flags & elfcpp::SHF_STRINGS) != 0)
                     {
                       // String merge section.
@@ -489,10 +506,14 @@ get_section_contents(bool first_iteration,
                     }
                   else
                     {
-                      // Use the entsize to determine the length.
-                      buffer.append(reinterpret_cast<const 
+                      // Use the entsize to determine the length to copy.
+		      uint64_t bufsize = entsize;
+		      // If entsize is too big, copy all the remaining bytes.
+		      if ((offset + entsize) > secn_len)
+			bufsize = secn_len - offset;
+                      buffer.append(reinterpret_cast<const
                                                      char*>(str_contents),
-                                    entsize);
+                                    bufsize);
                     }
 		  buffer.append("@");
                 }
diff --git a/binutils-2.25/gold/options.h b/binutils-2.25/gold/options.h
index 6502e1f..0fa26f1 100644
--- a/binutils-2.25/gold/options.h
+++ b/binutils-2.25/gold/options.h
@@ -644,6 +644,13 @@ class General_options
 	      N_("Allow unresolved references in shared libraries"),
 	      N_("Do not allow unresolved references in shared libraries"));
 
+  // Note: this is cherry-picked from upstream patch 0eccf19f9. But the default
+  // value is changed from "true" to "false".
+  DEFINE_bool(apply_dynamic_relocs, options::TWO_DASHES, '\0', false,
+	      N_("Apply link-time values for dynamic relocations (default)"),
+	      N_("(aarch64 only) Do not apply link-time values "
+		 "for dynamic relocations"));
+
   DEFINE_bool(as_needed, options::TWO_DASHES, '\0', false,
 	      N_("Only set DT_NEEDED for shared libraries if used"),
 	      N_("Always DT_NEEDED for shared libraries"));
@@ -834,6 +841,10 @@ class General_options
 		    "veneer"),
 		 NULL);
 
+  DEFINE_bool(long_plt, options::TWO_DASHES, '\0', false,
+	      N_("(ARM only) Generate long PLT entries"),
+	      N_("(ARM only) Do not generate long PLT entries"));
+
   DEFINE_bool(g, options::EXACTLY_ONE_DASH, '\0', false,
 	      N_("Ignored"), NULL);
 
diff --git a/binutils-2.25/gold/resolve.cc b/binutils-2.25/gold/resolve.cc
index 54de87d..b49c45c 100644
--- a/binutils-2.25/gold/resolve.cc
+++ b/binutils-2.25/gold/resolve.cc
@@ -279,8 +279,10 @@ Symbol_table::resolve(Sized_symbol<size>* to,
            && (to->visibility() == elfcpp::STV_HIDDEN
                || to->visibility() == elfcpp::STV_INTERNAL))
     {
-      // it is good to be helpful, but the warning leads to build error
-      // for some users, so disable it if not really wanted.
+      // The symbol is hidden, so a reference from a shared object
+      // cannot bind to it.  We tried issuing a warning in this case,
+      // but that produces false positives when the symbol is
+      // actually resolved in a different shared object (PR 15574).
       return;
     }
   else
diff --git a/binutils-2.25/gold/testsuite/Makefile.am b/binutils-2.25/gold/testsuite/Makefile.am
index a9caa6b..ce1af05 100644
--- a/binutils-2.25/gold/testsuite/Makefile.am
+++ b/binutils-2.25/gold/testsuite/Makefile.am
@@ -1894,11 +1894,13 @@ endif MCMODEL_MEDIUM
 # referenced by a shared library.
 check_SCRIPTS += hidden_test.sh
 check_DATA += hidden_test.err
-MOSTLYCLEANFILES += hidden_test hidden_test.err
+MOSTLYCLEANFILES += hidden_test hidden_test.err hidden_test.syms
 libhidden.so: hidden_test_1.c gcctestdir/ld
 	$(COMPILE) -Bgcctestdir/ -g -shared -fPIC -w -o $@ $(srcdir)/hidden_test_1.c
 hidden_test: hidden_test_main.o libhidden.so gcctestdir/ld
 	$(LINK) -Bgcctestdir/ -Wl,-R,. hidden_test_main.o libhidden.so 2>hidden_test.err
+hidden_test.syms: hidden_test
+	$(TEST_NM) -D hidden_test > $@
 hidden_test.err: hidden_test
 	@touch hidden_test.err
 
diff --git a/binutils-2.25/gold/testsuite/Makefile.in b/binutils-2.25/gold/testsuite/Makefile.in
index 3cdf45e..17a73fd 100644
--- a/binutils-2.25/gold/testsuite/Makefile.in
+++ b/binutils-2.25/gold/testsuite/Makefile.in
@@ -507,6 +507,7 @@ check_PROGRAMS = $(am__EXEEXT_1) $(am__EXEEXT_2) $(am__EXEEXT_3) \
 @GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@	discard_locals_relocatable_test2.out \
 @GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@	hidden_test \
 @GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@	hidden_test.err \
+@GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@	hidden_test.syms \
 @GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@	retain_symbols_file_test \
 @GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@	retain_symbols_file_test.in \
 @GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@	retain_symbols_file_test.stdout \
@@ -5624,6 +5625,8 @@ uninstall-am:
 @GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@	$(COMPILE) -Bgcctestdir/ -g -shared -fPIC -w -o $@ $(srcdir)/hidden_test_1.c
 @GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@hidden_test: hidden_test_main.o libhidden.so gcctestdir/ld
 @GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@	$(LINK) -Bgcctestdir/ -Wl,-R,. hidden_test_main.o libhidden.so 2>hidden_test.err
+@GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@hidden_test.syms: hidden_test
+@GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@	$(TEST_NM) -D hidden_test > $@
 @GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@hidden_test.err: hidden_test
 @GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@	@touch hidden_test.err
 @GCC_TRUE@@TEST_AS_NATIVE_LINKER_TRUE@retain_symbols_file_test.so: basic_pic_test.o gcctestdir/ld
diff --git a/binutils-2.25/gold/testsuite/hidden_test.sh b/binutils-2.25/gold/testsuite/hidden_test.sh
index 39ebbf6..05633d0 100755
--- a/binutils-2.25/gold/testsuite/hidden_test.sh
+++ b/binutils-2.25/gold/testsuite/hidden_test.sh
@@ -29,11 +29,11 @@
 # error messages are issued for the references to internal and
 # hidden symbols.  The errors will be found in hidden_test.err.
 
-check()
+check_missing()
 {
-    if ! grep -q "$2" "$1"
+    if grep -q "$2" "$1"
     then
-	echo "Did not find expected error in $1:"
+	echo "Found unexpected error in $1:"
 	echo "   $2"
 	echo ""
 	echo "Actual error output below:"
@@ -42,25 +42,29 @@ check()
     fi
 }
 
-check_missing()
+check_missing_sym()
 {
     if grep -q "$2" "$1"
     then
-	echo "Found unexpected error in $1:"
+	echo "Found unexpected symbol in $1:"
 	echo "   $2"
 	echo ""
-	echo "Actual error output below:"
+	echo "Actual nm output below:"
 	cat "$1"
 	exit 1
     fi
 }
 
-# We should see errors for hidden and internal symbols.
-check hidden_test.err "hidden symbol 'main_hidden' in hidden_test_main.o is referenced by DSO libhidden.so"
-check hidden_test.err "internal symbol 'main_internal' in hidden_test_main.o is referenced by DSO libhidden.so"
-
 # We shouldn't see errors for the default and protected symbols.
 check_missing hidden_test.err "main_default"
 check_missing hidden_test.err "main_protected"
 
+# We shouldn't see errors for the hidden and internal symbols either (PR 15574).
+check_missing hidden_test.err "main_hidden"
+check_missing hidden_test.err "main_internal"
+
+# We shouldn't see the hidden or internal symbols in the dynamic symbol table.
+check_missing_sym hidden_test.syms "main_hidden"
+check_missing_sym hidden_test.syms "main_internal"
+
 exit 0
diff --git a/binutils-2.25/include/ChangeLog b/binutils-2.25/include/ChangeLog
index 0204432..27f0e43 100644
--- a/binutils-2.25/include/ChangeLog
+++ b/binutils-2.25/include/ChangeLog
@@ -1,3 +1,7 @@
+2015-06-26  Matthew Fortune  <matthew.fortune@imgtec.com>
+
+	* elf/mips.h (DT_MIPS_RLD_MAP_REL): New macro.
+
 2014-10-30  Andrew Pinski  <apinski@cavium.com>
 
 	* elf/mips.h (AFL_EXT_OCTEON3): Define.
diff --git a/binutils-2.25/include/elf/mips.h b/binutils-2.25/include/elf/mips.h
index 87704e0..537c089 100644
--- a/binutils-2.25/include/elf/mips.h
+++ b/binutils-2.25/include/elf/mips.h
@@ -749,8 +749,8 @@ extern void bfd_mips_elf32_swap_reginfo_out
 /* Points to the base of a writable PLT.  */
 #define DT_MIPS_RWPLT          0x70000034
 
-/* Address of run time loader map, used for debugging.  */
-#define DT_MIPS_RLD_MAP2       0x70000035
+/* Relative offset of run time loader map, used for debugging.  */
+#define DT_MIPS_RLD_MAP_REL    0x70000035
 
 /* Flags which may appear in a DT_MIPS_FLAGS entry.  */
 
diff --git a/binutils-2.25/ld/testsuite/ChangeLog b/binutils-2.25/ld/testsuite/ChangeLog
index 1526978..dcddad5 100644
--- a/binutils-2.25/ld/testsuite/ChangeLog
+++ b/binutils-2.25/ld/testsuite/ChangeLog
@@ -1,3 +1,25 @@
+2015-06-26  Matthew Fortune  <matthew.fortune@imgtec.com>
+
+	* ld-mips-elf/pic-and-nonpic-3b.ad: Adjust for extra dynamic tag.
+	* ld-mips-elf/pic-and-nonpic-4b.ad: Likewise.
+	* ld-mips-elf/pic-and-nonpic-5b.ad: Likewise.
+	* ld-mips-elf/pic-and-nonpic-6-n32.ad: Likewise.
+	* ld-mips-elf/pic-and-nonpic-6-n64.ad: Likewise.
+	* ld-mips-elf/pic-and-nonpic-6-o32.ad: Likewise.
+	* ld-mips-elf/tlsdyn-o32-1.d: Likewise.
+	* ld-mips-elf/tlsdyn-o32-1.got: Likewise.
+	* ld-mips-elf/tlsdyn-o32-2.d: Likewise.
+	* ld-mips-elf/tlsdyn-o32-2.got: Likewise.
+	* ld-mips-elf/tlsdyn-o32-3.d: Likewise.
+	* ld-mips-elf/tlsdyn-o32-3.got: Likewise.
+	* ld-mips-elf/tlsdyn-o32.d: Likewise.
+	* ld-mips-elf/tlsdyn-o32.got: Likewise.
+	* ld-mips-elf/pie-n32.d: New file.
+	* ld-mips-elf/pie-n64.d: Likewise.
+	* ld-mips-elf/pie-o32.d: Likewise.
+	* ld-mips-elf/pie.s: Likewise.
+	* ld-mips-elf/mips-elf.exp: Add new tests.
+
 2014-12-25  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
 	* ld-arm/attr-merge-2a.s: Add Tag_ABI_VFP_args.
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/mips-elf.exp b/binutils-2.25/ld/testsuite/ld-mips-elf/mips-elf.exp
index 21c809f..c587d57 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/mips-elf.exp
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/mips-elf.exp
@@ -186,6 +186,15 @@ if { $linux_gnu } {
     }
 }
 
+# Test PIE debug dynamic tags
+if { $linux_gnu } {
+    run_dump_test "pie-o32"
+    if { $has_newabi } {
+	run_dump_test "pie-n32"
+	run_dump_test "pie-n64"
+    }
+}
+
 if $has_newabi {
     if { $embedded_elf } {
 	run_dump_test "elf-rel-got-n32-embed" \
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.ad b/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.ad
index 227d15d..9f5ca90 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.ad
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-3b.ad
@@ -8,6 +8,7 @@ Dynamic section at offset .* contains .*:
  0x0000000a \(STRSZ\) .*
  0x0000000b \(SYMENT\) .*
  0x70000016 \(MIPS_RLD_MAP\) * 0x80000
+ 0x70000035 \(MIPS_RLD_MAP_REL\) .*
  0x00000015 \(DEBUG\) * 0x0
  0x00000003 \(PLTGOT\) * 0xa0000
  0x70000001 \(MIPS_RLD_VERSION\) * 1
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.ad b/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.ad
index e14a2d3..1bea044 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.ad
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-4b.ad
@@ -8,6 +8,7 @@ Dynamic section at offset .* contains .*:
  0x0000000a \(STRSZ\) .*
  0x0000000b \(SYMENT\) .*
  0x70000016 \(MIPS_RLD_MAP\) * 0x80000
+ 0x70000035 \(MIPS_RLD_MAP_REL\) .*
  0x00000015 \(DEBUG\) * 0x0
  0x00000003 \(PLTGOT\) * 0xa0000
  0x00000011 \(REL\) * 0x43000
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.ad b/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.ad
index d7a672f..972ace1 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.ad
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-5b.ad
@@ -9,6 +9,7 @@ Dynamic section at offset .* contains .*:
  0x0000000a \(STRSZ\) .*
  0x0000000b \(SYMENT\) .*
  0x70000016 \(MIPS_RLD_MAP\) * 0x80000
+ 0x70000035 \(MIPS_RLD_MAP_REL\) .*
  0x00000015 \(DEBUG\) * 0x0
  0x00000016 \(TEXTREL\) * 0x0
  0x00000003 \(PLTGOT\) * 0xa0000
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.ad b/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.ad
index 5df3c6c..28ee34a 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.ad
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.ad
@@ -8,6 +8,7 @@ Dynamic section at offset .* contains .*:
  0x0000000a \(STRSZ\) .*
  0x0000000b \(SYMENT\) .*
  0x70000016 \(MIPS_RLD_MAP\) * 0x80000
+ 0x70000035 \(MIPS_RLD_MAP_REL\) .*
  0x00000015 \(DEBUG\) * 0x0
  0x00000003 \(PLTGOT\) * 0xa0000
  0x00000011 \(REL\) * 0x43000
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.ad b/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.ad
index d8fc300..7b2ce4c 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.ad
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.ad
@@ -8,6 +8,7 @@ Dynamic section at offset .* contains .*:
  0x0+0000000a \(STRSZ\) .*
  0x0+0000000b \(SYMENT\) .*
  0x0+70000016 \(MIPS_RLD_MAP\) * 0x80000
+ 0x0+70000035 \(MIPS_RLD_MAP_REL\) .*
  0x0+00000015 \(DEBUG\) * 0x0
  0x0+00000003 \(PLTGOT\) * 0xa0000
  0x0+00000011 \(REL\) * 0x43000
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.ad b/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.ad
index 5df3c6c..28ee34a 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.ad
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/pic-and-nonpic-6-o32.ad
@@ -8,6 +8,7 @@ Dynamic section at offset .* contains .*:
  0x0000000a \(STRSZ\) .*
  0x0000000b \(SYMENT\) .*
  0x70000016 \(MIPS_RLD_MAP\) * 0x80000
+ 0x70000035 \(MIPS_RLD_MAP_REL\) .*
  0x00000015 \(DEBUG\) * 0x0
  0x00000003 \(PLTGOT\) * 0xa0000
  0x00000011 \(REL\) * 0x43000
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/pie-n32.d b/binutils-2.25/ld/testsuite/ld-mips-elf/pie-n32.d
new file mode 100644
index 0000000..bcfbcd2
--- /dev/null
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/pie-n32.d
@@ -0,0 +1,23 @@
+#source: pie.s
+#as: -march=from-abi -mabi=n32 -EB
+#ld: -melf32btsmipn32 -pie
+#readelf: -d
+
+Dynamic section at offset 0x180 contains 16 entries:
+  Tag * Type * Name/Value
+ 0x00000004 \(HASH\) * 0x228
+ 0x00000005 \(STRTAB\) * 0x304
+ 0x00000006 \(SYMTAB\) * 0x264
+ 0x0000000a \(STRSZ\) * 72 \(bytes\)
+ 0x0000000b \(SYMENT\) * 16 \(bytes\)
+ 0x70000035 \(MIPS_RLD_MAP_REL\) * 0x101b8
+ 0x00000015 \(DEBUG\) * 0x0
+ 0x00000003 \(PLTGOT\) * 0x10370
+ 0x70000001 \(MIPS_RLD_VERSION\) * 1
+ 0x70000005 \(MIPS_FLAGS\) * NOTPOT
+ 0x70000006 \(MIPS_BASE_ADDRESS\) * 0x0
+ 0x7000000a \(MIPS_LOCAL_GOTNO\) * 2
+ 0x70000011 \(MIPS_SYMTABNO\) * 10
+ 0x70000012 \(MIPS_UNREFEXTNO\) * 13
+ 0x70000013 \(MIPS_GOTSYM\) * 0xa
+ 0x00000000 \(NULL\) * 0x0
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/pie-n64.d b/binutils-2.25/ld/testsuite/ld-mips-elf/pie-n64.d
new file mode 100644
index 0000000..bf2238c
--- /dev/null
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/pie-n64.d
@@ -0,0 +1,23 @@
+#source: pie.s
+#as: -march=from-abi -mabi=64 -EB
+#ld: -melf64btsmip -pie
+#readelf: -d
+
+Dynamic section at offset 0x208 contains 16 entries:
+  Tag * Type * Name/Value
+ 0x0+00000004 \(HASH\) * 0x358
+ 0x0+00000005 \(STRTAB\) * 0x488
+ 0x0+00000006 \(SYMTAB\) * 0x398
+ 0x0+0000000a \(STRSZ\) * 72 \(bytes\)
+ 0x0+0000000b \(SYMENT\) * 24 \(bytes\)
+ 0x0+70000035 \(MIPS_RLD_MAP_REL\) * 0x102a8
+ 0x0+00000015 \(DEBUG\) * 0x0
+ 0x0+00000003 \(PLTGOT\) * 0x10510
+ 0x0+70000001 \(MIPS_RLD_VERSION\) * 1
+ 0x0+70000005 \(MIPS_FLAGS\) * NOTPOT
+ 0x0+70000006 \(MIPS_BASE_ADDRESS\) * 0x0
+ 0x0+7000000a \(MIPS_LOCAL_GOTNO\) * 2
+ 0x0+70000011 \(MIPS_SYMTABNO\) * 10
+ 0x0+70000012 \(MIPS_UNREFEXTNO\) * 13
+ 0x0+70000013 \(MIPS_GOTSYM\) * 0xa
+ 0x0+00000000 \(NULL\) * 0x0
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/pie-o32.d b/binutils-2.25/ld/testsuite/ld-mips-elf/pie-o32.d
new file mode 100644
index 0000000..5a9a308
--- /dev/null
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/pie-o32.d
@@ -0,0 +1,23 @@
+#source: pie.s
+#as: -mabi=32 -EB
+#ld: -melf32btsmip -pie
+#readelf: -d
+
+Dynamic section at offset 0x178 contains 16 entries:
+  Tag * Type * Name/Value
+ 0x00000004 \(HASH\) * 0x220
+ 0x00000005 \(STRTAB\) * 0x2fc
+ 0x00000006 \(SYMTAB\) * 0x25c
+ 0x0000000a \(STRSZ\) * 72 \(bytes\)
+ 0x0000000b \(SYMENT\) * 16 \(bytes\)
+ 0x70000035 \(MIPS_RLD_MAP_REL\) * 0x101c0
+ 0x00000015 \(DEBUG\) * 0x0
+ 0x00000003 \(PLTGOT\) * 0x10370
+ 0x70000001 \(MIPS_RLD_VERSION\) * 1
+ 0x70000005 \(MIPS_FLAGS\) * NOTPOT
+ 0x70000006 \(MIPS_BASE_ADDRESS\) * 0x0
+ 0x7000000a \(MIPS_LOCAL_GOTNO\) * 2
+ 0x70000011 \(MIPS_SYMTABNO\) * 10
+ 0x70000012 \(MIPS_UNREFEXTNO\) * 13
+ 0x70000013 \(MIPS_GOTSYM\) * 0xa
+ 0x00000000 \(NULL\) * 0x0
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/pie.s b/binutils-2.25/ld/testsuite/ld-mips-elf/pie.s
new file mode 100644
index 0000000..c7f2b20
--- /dev/null
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/pie.s
@@ -0,0 +1,6 @@
+	.abicalls
+	.global	__start
+	.ent	__start
+__start:
+	jr $31
+	.end	__start
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.d b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.d
index ca52d8b..6b8f96c 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.d
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.d
@@ -5,7 +5,7 @@ Disassembly of section .text:
 
 .* <__start>:
   .*:	3c1c0fc0 	lui	gp,0xfc0
-  .*:	279c7c40 	addiu	gp,gp,31808
+  .*:	279c7c30 	addiu	gp,gp,31792
   .*:	0399e021 	addu	gp,gp,t9
   .*:	27bdfff0 	addiu	sp,sp,-16
   .*:	afbe0008 	sw	s8,8\(sp\)
@@ -55,7 +55,7 @@ Disassembly of section .text:
 
 .* <other>:
   .*:	3c1c0fc0 	lui	gp,0xfc0
-  .*:	279c7b80 	addiu	gp,gp,31616
+  .*:	279c7b70 	addiu	gp,gp,31600
   .*:	0399e021 	addu	gp,gp,t9
   .*:	27bdfff0 	addiu	sp,sp,-16
   .*:	afbe0008 	sw	s8,8\(sp\)
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.got b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.got
index d70fdd0..86eba9c 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.got
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-1.got
@@ -13,6 +13,6 @@ OFFSET   TYPE              VALUE
 
 
 Contents of section .got:
- 10000020 00000000 80000000 0040047c 00000000  ................
+ 10000020 00000000 80000000 0040048c 00000000  .........@......
  10000030 00000000 00000000 00000000 00000000  ................
  10000040 00000000 00000001 00000000           ............    
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d
index ca52d8b..6b8f96c 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.d
@@ -5,7 +5,7 @@ Disassembly of section .text:
 
 .* <__start>:
   .*:	3c1c0fc0 	lui	gp,0xfc0
-  .*:	279c7c40 	addiu	gp,gp,31808
+  .*:	279c7c30 	addiu	gp,gp,31792
   .*:	0399e021 	addu	gp,gp,t9
   .*:	27bdfff0 	addiu	sp,sp,-16
   .*:	afbe0008 	sw	s8,8\(sp\)
@@ -55,7 +55,7 @@ Disassembly of section .text:
 
 .* <other>:
   .*:	3c1c0fc0 	lui	gp,0xfc0
-  .*:	279c7b80 	addiu	gp,gp,31616
+  .*:	279c7b70 	addiu	gp,gp,31600
   .*:	0399e021 	addu	gp,gp,t9
   .*:	27bdfff0 	addiu	sp,sp,-16
   .*:	afbe0008 	sw	s8,8\(sp\)
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got
index 6b00157..434820d 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-2.got
@@ -13,6 +13,6 @@ OFFSET   TYPE              VALUE
 
 
 Contents of section .got:
- 10000020 00000000 80000000 0040047c 00000000  .*
+ 10000020 00000000 80000000 0040048c 00000000  .*
  10000030 00000000 00000000 00000000 00000000  .*
  10000040 00000000 00000001 00000000           .*
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d
index 78eb882..758a4f2 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.d
@@ -5,7 +5,7 @@ Disassembly of section .text:
 
 .* <other>:
   .*:	3c1c0fc0 	lui	gp,0xfc0
-  .*:	279c7c40 	addiu	gp,gp,31808
+  .*:	279c7c30 	addiu	gp,gp,31792
   .*:	0399e021 	addu	gp,gp,t9
   .*:	27bdfff0 	addiu	sp,sp,-16
   .*:	afbe0008 	sw	s8,8\(sp\)
@@ -51,7 +51,7 @@ Disassembly of section .text:
 
 .* <__start>:
   .*:	3c1c0fc0 	lui	gp,0xfc0
-  .*:	279c7b90 	addiu	gp,gp,31632
+  .*:	279c7b80 	addiu	gp,gp,31616
   .*:	0399e021 	addu	gp,gp,t9
   .*:	27bdfff0 	addiu	sp,sp,-16
   .*:	afbe0008 	sw	s8,8\(sp\)
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got
index 01eb44f..043d491 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32-3.got
@@ -13,6 +13,6 @@ OFFSET   TYPE              VALUE
 
 
 Contents of section .got:
- 10000020 00000000 80000000 0040052c 00000000  .*
+ 10000020 00000000 80000000 0040053c 00000000  .*
  10000030 00000000 00000000 00000000 00000000  .*
  10000040 00000000 00000001 00000000           .*
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32.d b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32.d
index 699035b..ea50960 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32.d
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32.d
@@ -5,7 +5,7 @@ Disassembly of section .text:
 
 .* <__start>:
   .*:	3c1c0fc0 	lui	gp,0xfc0
-  .*:	279c7bf0 	addiu	gp,gp,31728
+  .*:	279c7be0 	addiu	gp,gp,31712
   .*:	0399e021 	addu	gp,gp,t9
   .*:	27bdfff0 	addiu	sp,sp,-16
   .*:	afbe0008 	sw	s8,8\(sp\)
diff --git a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32.got b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32.got
index a1587a6..7942188 100644
--- a/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32.got
+++ b/binutils-2.25/ld/testsuite/ld-mips-elf/tlsdyn-o32.got
@@ -13,6 +13,6 @@ OFFSET   TYPE              VALUE
 
 
 Contents of section .got:
- 10000020 00000000 80000000 004004cc 00000000  ................
+ 10000020 00000000 80000000 004004dc 00000000  .........@......
  10000030 00000000 00000000 00000001 00000000  ................
  10000040 00000000 00000000 00000000           ............