added GTA04b7 (Neo900)

Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>

6 files changed, 359 insertions, 0 deletions

diff --git a/u-boot/board/goldelico/gta04b7/ACX565AKM.c b/u-boot/board/goldelico/gta04b7/ACX565AKM.c
new file mode 100644
index 0000000..5e6612e
--- /dev/null
+++ b/u-boot/board/goldelico/gta04b7/ACX565AKM.c
@@ -0,0 +1,188 @@
+/* u-boot driver for the Sharp LQ050W1LC1B LCM
+ *
+ * Copyright (C) 2012 by Golden Delicious Computers GmbH&Co. KG
+ * Author: H. Nikolaus Schaller <hns@goldelico.com>
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <asm/errno.h>
+#include <asm/io.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/gpio.h>
+#include <asm/mach-types.h>
+#include <twl4030.h>
+#include "../gta04/dssfb.h"
+#include "../gta04/panel.h"
+#include "../gta04/backlight.h"
+#include "ACX565AKM.h"
+
+#define mdelay(n) ({ unsigned long msec = (n); while (msec--) udelay(1000); })
+
+#ifndef CONFIG_GOLDELICO_EXPANDER_B4
+
+#error only for B4 board
+
+#endif
+
+#ifdef CONFIG_OMAP3_GTA04
+
+#define GPIO_POWER 12			/* McBSP5-CLKX enables 5V DC/DC (backlight) for the display */
+#define GPIO_BLSHUTDOWN 19		/* McBSP5-FSX controls Backlight SHUTDOWN (shutdown if high) */
+#define GPIO_SHUTDOWN 20		/* McBSP5-DX controls LVDS SHUTDOWN (shutdown if low) */
+
+#elif CONFIG_OMAP3_BEAGLE
+
+#define GPIO_POWER 162			/* McBSP1-CLKX enables 5V DC/DC (backlight) for the display */
+#define GPIO_BLSHUTDOWN 161		/* McBSP1-FSX controls Backlight SHUTDOWN (shutdown if high) */
+#define GPIO_SHUTDOWN 158		/* McBSP1-DX controls LVDS SHUTDOWN (shutdown if low) */
+
+#endif
+
+// configure beagle board DSS for the LQ050W1LC1B
+
+#define DVI_BACKGROUND_COLOR		0x00fadc29	// rgb(250, 220, 41)
+
+#define DSS1_FCLK	432000000	// see figure 15-65
+#define DSS1_FCLK3730	108000000	// compare table 3-34, figure 7-63 - but there are other factors
+#define PIXEL_CLOCK	48336000	// approx. 48.336 MHz (will be divided from 432 MHz)
+
+// all values are min ratings
+
+#define VDISP	600				// vertical active area
+#define VFP		(621-VDISP)/3	// vertical front porch
+#define VS		(621-VDISP)/3	// VSYNC pulse width
+#define VBP		(621-VDISP)/3	// vertical back porch
+#define VDS		(VS+VBP)		// vertical data start
+#define VBL		(VS+VBP+VFP)	// vertical blanking period
+#define VP		(VDISP+VBL)		// vertical cycle
+
+#define HDISP	1024			// horizontal active area
+#define HFP		(1312-HDISP)/3	// horizontal front porch
+#define HS		(1312-HDISP)/3	// HSYNC pulse width
+#define HBP		(1312-HDISP)/3	// horizontal back porch
+#define HDS		(HS+HBP)		// horizontal data start
+#define HBL		(HS+HBP+HFP)	// horizontal blanking period
+#define HP		(HDISP+HBL)		// horizontal cycle
+
+int displayColumns=HDISP;
+int displayLines=VDISP;
+
+static /*const*/ struct panel_config lcm_cfg = 
+{
+	.timing_h	= ((HBP-1)<<20) | ((HFP-1)<<8) | ((HS-1)<<0), /* Horizantal timing */
+	.timing_v	= ((VBP+0)<<20) | ((VFP+0)<<8) | ((VS-1)<<0), /* Vertical timing */
+	// negative clock edge
+	// negative sync pulse
+	// positive DE pulse incl. HSYNC&VSYNC
+	.pol_freq	= (1<<17)|(1<<16)|(0<<15)|(0<<14)|(0<<13)|(0<<12)|0x28,    /* Pol Freq */
+	.divisor	= (0x0001<<16)|(DSS1_FCLK/PIXEL_CLOCK), /* Pixel Clock divisor from dss1_fclk */
+	.lcd_size	= ((HDISP-1)<<0) | ((VDISP-1)<<16), /* as defined by LCM */
+	.panel_type	= 0x01, /* TFT */
+	.data_lines	= 0x03, /* 24 Bit RGB */
+	.load_mode	= 0x02, /* Frame Mode */
+	.panel_color	= DVI_BACKGROUND_COLOR
+};
+
+int panel_reg_init(void)
+{
+	omap_request_gpio(GPIO_SHUTDOWN);
+	omap_set_gpio_direction(GPIO_SHUTDOWN, 0);		// output
+	omap_request_gpio(GPIO_POWER);
+	omap_set_gpio_direction(GPIO_POWER, 0);		// output
+	omap_request_gpio(GPIO_BLSHUTDOWN);
+	omap_set_gpio_direction(GPIO_BLSHUTDOWN, 0);	// output
+	return 0;
+}
+
+int panel_check(void)
+{
+	return 0;
+}
+
+const char *panel_state(void)
+{
+	return "?";
+}
+
+/* frontend function */
+int panel_enter_state(enum panel_state new_state)
+{
+	return 0;
+}
+
+int panel_display_onoff(int on)
+{
+	if(on)
+		{
+		omap_set_gpio_dataout(GPIO_POWER, 1);
+		mdelay(10);
+		omap_set_gpio_dataout(GPIO_SHUTDOWN, 1);
+		mdelay(100);
+		omap_set_gpio_dataout(GPIO_BLSHUTDOWN, 0);
+		}
+	else
+		{
+		omap_set_gpio_dataout(GPIO_BLSHUTDOWN, 1);
+		mdelay(5);
+		omap_set_gpio_dataout(GPIO_SHUTDOWN, 0);
+		mdelay(10);
+		omap_set_gpio_dataout(GPIO_POWER, 0);
+		mdelay(200);
+		}
+	return 0;
+}
+
+int board_video_init(GraphicDevice *pGD)
+{
+	extern int get_board_revision(void);
+	printf("board_video_init() LQ050W1LC1B\n");
+	
+	// FIXME: here we should pass down the GPIO(s)
+	
+	backlight_init();	// initialize backlight
+#if defined (CONFIG_OMAP3_BEAGLE)
+#define REVISION_XM 0
+	if(get_board_revision() == REVISION_XM) {
+		/* Set VAUX1 to 3.3V for GTA04E display board */
+		twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VAUX1_DEDICATED,
+								/*TWL4030_PM_RECEIVER_VAUX1_VSEL_33*/ 0x07,
+								TWL4030_PM_RECEIVER_VAUX1_DEV_GRP,
+								TWL4030_PM_RECEIVER_DEV_GRP_P1);
+		udelay(5000);
+	}
+#endif
+	
+	// FIXME: here we should init the TSC and pass down the GPIO numbers and resistance values
+	
+	if(panel_reg_init())	// initialize SPI
+		{
+		printf("No LCM connected\n");
+		return 1;
+		}
+	
+	if (get_cpu_family() == CPU_OMAP36XX)
+		lcm_cfg.divisor	= (0x0001<<16)|(DSS1_FCLK3730/PIXEL_CLOCK); /* get Pixel Clock divisor from dss1_fclk */
+	dssfb_init(&lcm_cfg);
+	
+	printf("did board_video_init()\n");
+	return 0;
+}
+
diff --git a/u-boot/board/goldelico/gta04b7/ACX565AKM.h b/u-boot/board/goldelico/gta04b7/ACX565AKM.h
new file mode 100644
index 0000000..5a8b80c
--- /dev/null
+++ b/u-boot/board/goldelico/gta04b7/ACX565AKM.h
@@ -0,0 +1,4 @@
+#ifndef _COM37H3M05DTC_H
+#define _COM37H3M05DTC_H
+
+#endif
diff --git a/u-boot/board/goldelico/gta04b7/Makefile b/u-boot/board/goldelico/gta04b7/Makefile
new file mode 100644
index 0000000..679a05a
--- /dev/null
+++ b/u-boot/board/goldelico/gta04b7/Makefile
@@ -0,0 +1,49 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	:= gta04b7.o ACX565AKM.o ../gta04/backlight.o ../gta04/status.o ../gta04/tsc2007.o ../gta04/dssfb.o ../gta04/gps.o ../gta04/shutdown.o ../gta04/systest.o ../gta04/commands.o ../gta04/ulpi-phy.o  ../gta04/twl4030-additions.o
+
+SRCS	:= $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+clean:
+	rm -f $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
\ No newline at end of file
diff --git a/u-boot/board/goldelico/gta04b7/config.mk b/u-boot/board/goldelico/gta04b7/config.mk
new file mode 100644
index 0000000..cf055db
--- /dev/null
+++ b/u-boot/board/goldelico/gta04b7/config.mk
@@ -0,0 +1,33 @@
+#
+# (C) Copyright 2006
+# Texas Instruments, <www.ti.com>
+#
+# Beagle Board uses OMAP3 (ARM-CortexA8) cpu
+# see http://www.ti.com/ for more information on Texas Instruments
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+# Physical Address:
+# 8000'0000 (bank0)
+# A000/0000 (bank1)
+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
+# (mem base + reserved)
+
+# For use with external or internal boots.
+CONFIG_SYS_TEXT_BASE = 0x80008000
diff --git a/u-boot/board/goldelico/gta04b7/gta04b7.c b/u-boot/board/goldelico/gta04b7/gta04b7.c
new file mode 100644
index 0000000..dc5d1a2
--- /dev/null
+++ b/u-boot/board/goldelico/gta04b7/gta04b7.c
@@ -0,0 +1,24 @@
+#include <common.h>
+#include <twl4030.h>
+#include <asm/io.h>
+#include <asm/arch/mmc_host_def.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/gpio.h>
+#include <asm/mach-types.h>
+#include "../gta04/gta04.h"
+#include "gta04b4.h"
+
+// make us initialize using both pinmux sets
+
+void muxinit(void)
+{
+	MUX_GTA04();
+	MUX_EXPANDER_B4();
+}
+
+#undef MUX_GTA04
+#define MUX_GTA04() muxinit()
+
+// take the original beagle.c code
+#include "../gta04/gta04.c"
diff --git a/u-boot/board/goldelico/gta04b7/gta04b7.h b/u-boot/board/goldelico/gta04b7/gta04b7.h
new file mode 100644
index 0000000..f202949
--- /dev/null
+++ b/u-boot/board/goldelico/gta04b7/gta04b7.h
@@ -0,0 +1,61 @@
+// all reuseable pins on GTA04 expansion connector
+
+// GPIO -> GTA04-Pin -> Expander function
+
+#define MUX_EXPANDER_B4() \
+MUX_VAL(CP(SYS_CLKOUT1),	(IDIS | PTD | DIS | M4)) /*GPIO_10 / KEYIRQ - TRF-IRQ*/\
+MUX_VAL(CP(ETK_CLK_ES2),	(IDIS | PTD | EN  | M4)) /*GPIO_12 / McBSP5-CLKX - Enable 3.3V LDO for display*/\
+MUX_VAL(CP(ETK_D0),			(IEN  | PTD | EN  | M1)) /*GPIO_14 / MCSPI3-SIMO -> TRF*/\
+MUX_VAL(CP(ETK_D1),			(IEN  | PTD | EN  | M1)) /*GPIO_15 / MCSPI3-SOMI -> TRF*/\
+MUX_VAL(CP(ETK_D2),			(IEN  | PTD | EN  | M1)) /*GPIO_16 / MCSPI3-CS -> TRF*/\
+MUX_VAL(CP(ETK_D3),			(IEN  | PTD | EN  | M1)) /*GPIO_17 / MCSPI3-CLK -> TRF*/\
+MUX_VAL(CP(ETK_D4_ES2),		(IDIS | PTU | EN  | M4)) /*GPIO_18 / McBSP5-DR - drives RS232 EXT line*/\
+MUX_VAL(CP(ETK_D5_ES2),		(IDIS | PTD | EN  | M4)) /*GPIO_19 / McBSP5-FSX - TRF79x0 EN/EN2*/\
+MUX_VAL(CP(ETK_D6_ES2),		(IDIS | PTD | EN  | M4)) /*GPIO_20 / McBSP5-DX - Enable 5V on VBUS*/\
+MUX_VAL(CP(UART2_CTS),		(IEN  | PTU | DIS | M4)) /*GPIO_144 / UART2-CTS - ext Ant */\
+MUX_VAL(CP(UART2_RTS),		(IDIS | PTD | DIS | M4)) /*GPIO_145 / UART2-RTS - GPS ON(0)/OFF(1)*/\
+MUX_VAL(CP(UART2_TX),		(IDIS | PTU | DIS | M0)) /*GPIO_146 / UART2-TX - GPS_TX */\
+MUX_VAL(CP(UART2_RX),		(IEN  | PTU | DIS | M0)) /*GPIO_147 / UART2-RX - GPS_RX */\
+MUX_VAL(CP(MCBSP4_CLKX),	(IEN  | PTD | DIS | M0)) /*GPIO_152 / MCBSP4_CLKX*/\
+MUX_VAL(CP(MCBSP4_DR),		(IEN  | PTD | DIS | M0)) /*GPIO_153 / MCBSP4_DR*/\
+MUX_VAL(CP(MCBSP4_DX),		(IEN  | PTD | DIS | M0)) /*GPIO_154 / MCBSP4_DX*/\
+MUX_VAL(CP(MCBSP4_FSX),		(IEN  | PTD | DIS | M0)) /*GPIO_155 / MCBSP4_FSX*/\
+MUX_VAL(CP(MCBSP_CLKS),		(IDIS | PTD | DIS | M4)) /*GPIO_160 / PENIRQ*/\
+muxname="GTA04B4"
+
+#if 0
+MUX_VAL(CP(UART3_CTS_RCTX),	(IDIS | PTD | DIS | M0)) /*GPIO_163 / UART3-CTS*/\
+MUX_VAL(CP(UART3_RTS_SD),	(IDIS | PTD | DIS | M0)) /*GPIO_164 / UART3-RTS*/\
+MUX_VAL(CP(UART3_RX_IRRX),	(IDIS | PTD | DIS | M0)) /*GPIO_165 / UART3-RX*/\
+MUX_VAL(CP(UART3_TX_IRTX),	(IDIS | PTD | DIS | M0)) /*GPIO_166 / UART3-TX*/\
+
+#endif
+
+// FIXME: clean up so that we have the right PinMuxes
+#if 0
+
+MUX_VAL(CP(ETK_D0),		(IEN  | PTD | EN  | M1)) /*GPIO_17 -> MCSPI3-CLK -> TRF*/\
+MUX_VAL(CP(MMC2_CLK),		(IDIS | PTD | EN  | M4)) /*GPIO_130 -> MCSPI3-CLK -> TRF*/\
+MUX_VAL(CP(MMC2_CMD),		(IDIS | PTD | EN  | M4)) /*GPIO_131 -> MCSPI3-SIMO -> TRF*/\
+MUX_VAL(CP(MMC2_DAT0),		(IEN  | PTU | EN  | M4)) /*GPIO_132 -> MCSPI3-SOMI -> TRF*/\
+MUX_VAL(CP(MCBSP1_DX),		(IDIS | PTD | EN  | M4)) /*GPIO_158 - Display STBY */\
+MUX_VAL(CP(MCBSP1_DR),		(IDIS | PTD | EN  | M4)) /*GPIO_159 - McBSP1-DR -> TRF EN2 */\
+MUX_VAL(CP(MCBSP1_FSX),		(IDIS | PTD | EN  | M4)) /*GPIO_161 - McBSP1-FSX -> TRF EN */\
+
+MUX_VAL(CP(MMC2_DAT1),		(IEN  | PTU | EN  | M4)) /*GPIO_133 -> UART3-RX (software)*/\
+MUX_VAL(CP(MMC2_DAT2),		(IDIS | PTU | EN  | M4)) /*GPIO_134 -> UART3-TX (software)*/\
+MUX_VAL(CP(MMC2_DAT3),		(IDIS | PTU | EN  | M1)) /*GPIO_135 -> MCSPI3-CS0*/\
+MUX_VAL(CP(MMC2_DAT4),		(IEN  | PTD | EN  | M4)) /*GPIO_136 - AUX */\
+MUX_VAL(CP(MMC2_DAT5),		(IEN  | PTU | EN  | M4)) /*GPIO_137 - POWER */\
+MUX_VAL(CP(MMC2_DAT6),		(IDIS | PTU | EN  | M4)) /*GPIO_138 - UART3-RTS (software) */\
+MUX_VAL(CP(MMC2_DAT7),		(IEN  | PTU | EN  | M4)) /*GPIO_139 - UART3-CTS (software) */\
+MUX_VAL(CP(UART2_RX),		(IEN  | PTU | EN  | M4)) /*GPIO_143 - UART2-RX */\
+MUX_VAL(CP(UART2_CTS),		(IDIS | PTU | EN  | M4)) /*GPIO_144 - UART2-CTS */\
+MUX_VAL(CP(UART2_RTS),		(IDIS | PTU | EN  | M4)) /*GPIO_145 - UART2-RTS */\
+MUX_VAL(CP(UART2_TX),		(IEN  | PTU | EN  | M4)) /*GPIO_146 - UART2-TX */\
+MUX_VAL(CP(MCBSP1_CLKR),	(IEN  | PTD | EN  | M4)) /*GPIO_156 - KEYIRQ -> TRF IRQ */\
+MUX_VAL(CP(MCBSP1_FSR),		(IEN  | PTU | EN  | M4)) /*GPIO_157 - PENIRQ */\
+MUX_VAL(CP(MCBSP_CLKS),		(IEN  | PTU | DIS | M0)) /*McBSP_CLKS */\
+MUX_VAL(CP(MCBSP1_CLKX),	(IDIS | PTD | EN  | M4)) /*GPIO_162 - McBSP1-CLKX -> UART3 Powerdown */
+
+#endif