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| author | Akira Hatanaka <ahatanaka@mips.com> | 2013-09-06 23:52:46 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-09-06 23:52:46 +0000 |
| commit | 997c5dead83fc237280888696e1fa719563fc7f1 (patch) | |
| tree | d9ff25edc9d09da90e07367e5dce38dcc09ac745 | |
| parent | cd3c1b9af9c79bd128a4811570269022a8183408 (diff) | |
| download | external_llvm-997c5dead83fc237280888696e1fa719563fc7f1.zip external_llvm-997c5dead83fc237280888696e1fa719563fc7f1.tar.gz external_llvm-997c5dead83fc237280888696e1fa719563fc7f1.tar.bz2 | |
[mips] Define "trap" as a pseudo instruction that turns into "break 0, 0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190224 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Mips/MipsCodeEmitter.cpp | 4 | ||||
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 10 |
2 files changed, 11 insertions, 3 deletions
diff --git a/lib/Target/Mips/MipsCodeEmitter.cpp b/lib/Target/Mips/MipsCodeEmitter.cpp index 0f1917a..b50edf1 100644 --- a/lib/Target/Mips/MipsCodeEmitter.cpp +++ b/lib/Target/Mips/MipsCodeEmitter.cpp @@ -327,6 +327,10 @@ bool MipsCodeEmitter::expandPseudos(MachineBasicBlock::instr_iterator &MI, BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BEQ)).addReg(Mips::ZERO) .addReg(Mips::ZERO).addOperand(MI->getOperand(0)); break; + case Mips::TRAP: + BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BREAK)).addImm(0) + .addImm(0); + break; case Mips::JALRPseudo: BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::JALR), Mips::RA) .addReg(MI->getOperand(0).getReg()); diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 9fb2a75..65dfaed 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -783,9 +783,12 @@ class MFC3OP<string asmstr, RegisterOperand RO> : InstSE<(outs RO:$rt, RO:$rd, uimm16:$sel), (ins), !strconcat(asmstr, "\t$rt, $rd, $sel"), [], NoItinerary, FrmFR>; -let isBarrier = 1, isTerminator = 1, isCodeGenOnly = 1 in -def TRAP : InstSE<(outs), (ins), "break", [(trap)], NoItinerary, FrmOther> { - let Inst = 0x0000000d; +class TrapBase<Instruction RealInst> + : PseudoSE<(outs), (ins), [(trap)], NoItinerary>, + PseudoInstExpansion<(RealInst 0, 0)> { + let isBarrier = 1; + let isTerminator = 1; + let isCodeGenOnly = 1; } //===----------------------------------------------------------------------===// @@ -941,6 +944,7 @@ def TNEI : TEQI_FT<"tnei", GPR32Opnd>, TEQI_FM<0xe>; def BREAK : BRK_FT<"break">, BRK_FM<0xd>; def SYSCALL : SYS_FT<"syscall">, SYS_FM<0xc>; +def TRAP : TrapBase<BREAK>; def ERET : ER_FT<"eret">, ER_FM<0x18>; def DERET : ER_FT<"deret">, ER_FM<0x1f>; |