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authorChris Lattner <sabre@nondot.org>2006-10-17 21:47:13 +0000
committerChris Lattner <sabre@nondot.org>2006-10-17 21:47:13 +0000
commitb360729873eb142ae2327cd399880e4ef55bea2a (patch)
tree8253867f4a86b333834bfdbd437920636392391e
parent50662beab7cc6394a0d6524d16fe7de1d5192196 (diff)
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Trivial patch to speed up legalizing common i64 constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31020 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAG.cpp7
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index a2aee09..45fd350 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1234,6 +1234,13 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
if (N2C && N2C->getValue() == 0)
return N2;
break;
+ case ISD::OR:
+ case ISD::XOR:
+ // (X ^| 0) -> X. This commonly occurs when legalizing i64 values, so it's
+ // worth handling here.
+ if (N2C && N2C->getValue() == 0)
+ return N1;
+ break;
case ISD::FP_ROUND_INREG:
if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
break;