diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index a2aee09..45fd350 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1234,6 +1234,13 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, if (N2C && N2C->getValue() == 0) return N2; break; + case ISD::OR: + case ISD::XOR: + // (X ^| 0) -> X. This commonly occurs when legalizing i64 values, so it's + // worth handling here. + if (N2C && N2C->getValue() == 0) + return N1; + break; case ISD::FP_ROUND_INREG: if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding. break; |