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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2009-07-12 18:10:18 +0000 |
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| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2009-07-12 18:10:18 +0000 |
| commit | 635c9f0fbddb5aef75870f379522b9f279b77385 (patch) | |
| tree | 27fce915f324dcf655f34868b26353c59c565711 /lib/CodeGen/ScheduleDAGInstrs.cpp | |
| parent | f90244488d1e1ac608a9272ecb1d5950902234c6 (diff) | |
| download | external_llvm-635c9f0fbddb5aef75870f379522b9f279b77385.zip external_llvm-635c9f0fbddb5aef75870f379522b9f279b77385.tar.gz external_llvm-635c9f0fbddb5aef75870f379522b9f279b77385.tar.bz2 | |
Implement support for promotion of AND/OR/XOR on integer types.
The blackfin processor has a legal i16 type, but only logic operations on i32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75419 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/ScheduleDAGInstrs.cpp')
0 files changed, 0 insertions, 0 deletions