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authorCameron Zwarich <zwarich@apple.com>2011-02-22 00:46:27 +0000
committerCameron Zwarich <zwarich@apple.com>2011-02-22 00:46:27 +0000
commit92efda7e9183ae16bde7a3ad96b682e779d89cf3 (patch)
treec95dc6ff9ae0c0bf7b6a7698974efbddf606a779 /lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
parent63a8dae64dea89ae4a6f93ee17cf3fbbc2815084 (diff)
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Merge information about the number of zero, one, and sign bits of live-out registers
at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine phase. This fixes <rdar://problem/8760114>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126170 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp45
1 files changed, 40 insertions, 5 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index bbc62d8..450757f 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -471,6 +471,13 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo() {
if (!TargetRegisterInfo::isVirtualRegister(DestReg))
continue;
+ bool IsPHI = false;
+ DenseMap<unsigned, unsigned>::const_iterator It = FuncInfo->PHISrcToDestMap.find(DestReg);
+ if (It != FuncInfo->PHISrcToDestMap.end()) {
+ IsPHI = true;
+ DestReg = It->second;
+ }
+
// Ignore non-scalar or non-integer values.
SDValue Src = N->getOperand(2);
EVT SrcVT = Src.getValueType();
@@ -482,14 +489,27 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo() {
CurDAG->ComputeMaskedBits(Src, Mask, KnownZero, KnownOne);
// Only install this information if it tells us something.
- if (NumSignBits != 1 || KnownZero != 0 || KnownOne != 0) {
- FuncInfo->LiveOutRegInfo.grow(DestReg);
+ if (!IsPHI && NumSignBits == 1 && KnownZero == 0 && KnownOne == 0)
+ continue;
+
+ FuncInfo->LiveOutRegInfo.grow(DestReg);
+ FunctionLoweringInfo::LiveOutInfo &LOI = FuncInfo->LiveOutRegInfo[DestReg];
+
+ // If this is a PHI and there is existing information, merge it with the
+ // information from this block.
+ if (IsPHI && LOI.IsValid) {
FunctionLoweringInfo::LiveOutInfo &LOI =
FuncInfo->LiveOutRegInfo[DestReg];
- LOI.NumSignBits = NumSignBits;
- LOI.KnownOne = KnownOne;
- LOI.KnownZero = KnownZero;
+ LOI.NumSignBits = std::min(LOI.NumSignBits, NumSignBits);
+ LOI.KnownOne &= KnownOne;
+ LOI.KnownZero &= KnownZero;
+ continue;
}
+
+ LOI.NumSignBits = NumSignBits;
+ LOI.KnownOne = KnownOne;
+ LOI.KnownZero = KnownZero;
+ LOI.IsValid = true;
} while (!Worklist.empty());
}
@@ -840,6 +860,21 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
#ifndef NDEBUG
CheckLineNumbers(LLVMBB);
#endif
+
+ if (EnableFastISel) {
+ FuncInfo->AllPredsVisited = false;
+ } else {
+ FuncInfo->AllPredsVisited = true;
+ for (const_pred_iterator PI = pred_begin(LLVMBB), PE = pred_end(LLVMBB);
+ PI != PE; ++PI) {
+ if (!FuncInfo->VisitedBBs.count(*PI)) {
+ FuncInfo->AllPredsVisited = false;
+ break;
+ }
+ }
+ FuncInfo->VisitedBBs.insert(LLVMBB);
+ }
+
FuncInfo->MBB = FuncInfo->MBBMap[LLVMBB];
FuncInfo->InsertPt = FuncInfo->MBB->getFirstNonPHI();