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author | Dan Gohman <gohman@apple.com> | 2009-01-13 20:24:13 +0000 |
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committer | Dan Gohman <gohman@apple.com> | 2009-01-13 20:24:13 +0000 |
commit | bc0b56732a2d1dc22767e0f3930f22a76d99470a (patch) | |
tree | ca0c8659323b4d12946471be758a50bbd2d96735 /lib/CodeGen | |
parent | 6893cd76152e805291c3c9f36fa81b330846434d (diff) | |
download | external_llvm-bc0b56732a2d1dc22767e0f3930f22a76d99470a.zip external_llvm-bc0b56732a2d1dc22767e0f3930f22a76d99470a.tar.gz external_llvm-bc0b56732a2d1dc22767e0f3930f22a76d99470a.tar.bz2 |
The list-td and list-tdrr schedulers don't yet support physreg
scheduling dependencies. Add assertion checks to help catch
this.
It appears the Mips target defaults to list-td, and it has a
regression test that uses a physreg dependence. Such code was
liable to be miscompiled, and now evokes an assertion failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62177 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/CodeGen')
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp | 6 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp | 6 |
2 files changed, 10 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp index fea74ca..6f0767a 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp @@ -140,8 +140,12 @@ void ScheduleDAGList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { // Top down: release successors. for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); - I != E; ++I) + I != E; ++I) { + assert(!I->isAssignedRegDep() && + "The list-td scheduler doesn't yet support physreg dependencies!"); + ReleaseSucc(SU, *I); + } SU->isScheduled = true; AvailableQueue->ScheduledNode(SU); diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp index bc5443e..03d3ef5 100644 --- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp +++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp @@ -816,8 +816,12 @@ void ScheduleDAGRRList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) { // Top down: release successors for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); - I != E; ++I) + I != E; ++I) { + assert(!I->isAssignedRegDep() && + "The list-tdrr scheduler doesn't yet support physreg dependencies!"); + ReleaseSucc(SU, &*I); + } SU->isScheduled = true; AvailableQueue->ScheduledNode(SU); |