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author | Hao Liu <Hao.Liu@arm.com> | 2013-10-10 17:00:52 +0000 |
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committer | Hao Liu <Hao.Liu@arm.com> | 2013-10-10 17:00:52 +0000 |
commit | 6a5a667517160ca1b557002a29d08868ae029451 (patch) | |
tree | ab7bac232ae99d6b321cad35b0d0a5d8fbd39fcf /lib/Target/AArch64/AArch64InstrFormats.td | |
parent | 812ddcc50f8bc3ec6ce115863ff2263815906aaf (diff) | |
download | external_llvm-6a5a667517160ca1b557002a29d08868ae029451.zip external_llvm-6a5a667517160ca1b557002a29d08868ae029451.tar.gz external_llvm-6a5a667517160ca1b557002a29d08868ae029451.tar.bz2 |
Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192361 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/AArch64/AArch64InstrFormats.td')
-rw-r--r-- | lib/Target/AArch64/AArch64InstrFormats.td | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/lib/Target/AArch64/AArch64InstrFormats.td b/lib/Target/AArch64/AArch64InstrFormats.td index 5781578..ab4d083 100644 --- a/lib/Target/AArch64/AArch64InstrFormats.td +++ b/lib/Target/AArch64/AArch64InstrFormats.td @@ -1194,5 +1194,23 @@ class NeonI_Scalar2SameMisc<bit u, bits<2> size, bits<5> opcode, dag outs, dag i // Inherit Rd in 4-0 } +// Format AdvSIMD vector load/store multiple N-element structure +class NeonI_LdStMult<bit q, bit l, bits<4> opcode, bits<2> size, + dag outs, dag ins, string asmstr, + list<dag> patterns, InstrItinClass itin> + : A64InstRtn<outs, ins, asmstr, patterns, itin> +{ + let Inst{31} = 0b0; + let Inst{30} = q; + let Inst{29-23} = 0b0011000; + let Inst{22} = l; + let Inst{21-16} = 0b000000; + let Inst{15-12} = opcode; + let Inst{11-10} = size; + + // Inherit Rn in 9-5 + // Inherit Rt in 4-0 +} + } |