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path: root/lib/Target/AArch64/AArch64InstrFormats.td
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* Update aosp/master LLVM for rebase to r235153Pirama Arumuga Nainar2015-05-181-3/+212
* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-231-1/+1
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-021-29/+43
* Bring in fixes for Cortex-A53 errata + build updates.Stephen Hines2014-10-171-3/+5
* Update LLVM for rebase to r212749.Stephen Hines2014-07-211-13/+52
* Update LLVM for 3.5 rebase (r209712).Stephen Hines2014-05-291-1184/+8271
* Update to LLVM 3.5a.Stephen Hines2014-04-241-3/+1
* Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.Hao Liu2013-11-191-0/+79
* Implement AArch64 NEON instruction set AdvSIMD (table).Jiangning Liu2013-11-141-0/+19
* [AArch64] Implemented AdvSIMD scalar x indexed element format and AdvSIMD scalarChad Rosier2013-11-121-0/+28
* Implement AArch64 Neon instruction set Perm.Jiangning Liu2013-11-061-0/+18
* Implement AArch64 Neon instruction set Bitwise Extract.Jiangning Liu2013-11-061-0/+18
* Implement AArch64 Neon Crypto instruction classes AES, SHA, and 3 SHA.Jiangning Liu2013-11-051-0/+44
* Implement AArch64 post-index vector load/store multiple N-element structure c...Hao Liu2013-11-051-0/+26
* [AArch64] Add support for NEON scalar shift immediate instructions.Chad Rosier2013-10-311-0/+19
* [AArch64] Make the use of FP instructions optional, but enabled by default.Amara Emerson2013-10-311-0/+4
* [AArch64] Add support for NEON scalar three register different instructionChad Rosier2013-10-171-0/+18
* Implement AArch64 vector load/store multiple N-element structure class SIMD(l...Hao Liu2013-10-101-0/+18
* Revert "Implement AArch64 vector load/store multiple N-element structure clas...Rafael Espindola2013-10-101-18/+0
* Implement AArch64 vector load/store multiple N-element structure class SIMD(l...Hao Liu2013-10-101-0/+18
* [AArch64] Add support for NEON scalar signed/unsigned integer to floating-pointChad Rosier2013-10-081-0/+16
* Implement aarch64 neon instruction set AdvSIMD (Across).Jiangning Liu2013-10-051-0/+19
* Implement aarch64 neon instruction set AdvSIMD (3V elem).Jiangning Liu2013-10-041-17/+30
* Initial support for Neon scalar instructions.Jiangning Liu2013-09-241-2/+19
* Implement 3 AArch64 neon instructions : umov smov ins.Kevin Qin2013-09-171-0/+40
* Implement aarch64 neon instruction set AdvSIMD (3V Diff), covering the follow...Jiangning Liu2013-09-091-0/+20
* Clang and AArch64 backend patches to support shll/shl and vmovl instructions ...Hao Liu2013-08-151-0/+19
* AArch64: add initial NEON supportTim Northover2013-08-011-0/+93
* AArch64 InstrFormats:Jia Liu2013-04-281-1/+1
* TypoFrancois Pichet2013-02-241-1/+1
* AArch64: add block comments where missingTim Northover2013-02-141-2/+5
* Fix formatting in AArch64 backend.Tim Northover2013-02-051-106/+53
* Add AArch64 as an experimental target.Tim Northover2013-01-311-0/+1011