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authorEvan Cheng <evan.cheng@apple.com>2009-09-09 23:55:03 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-09-09 23:55:03 +0000
commit71429f87316fc88ebe54b904c4b1326a71fbc3ec (patch)
tree61f2465d35a777082027f0ff30a49ca6229b90f7 /lib/Target/ARM/ARMInstrFormats.td
parent431b4df9155bfbe94d3b50a1f1bdebfa9055cb44 (diff)
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Fix double load / store multiple encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81403 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrFormats.td')
-rw-r--r--lib/Target/ARM/ARMInstrFormats.td5
1 files changed, 2 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td
index 62e64db..5388197 100644
--- a/lib/Target/ARM/ARMInstrFormats.td
+++ b/lib/Target/ARM/ARMInstrFormats.td
@@ -1070,7 +1070,7 @@ class ASI5<bits<4> opcod1, bits<2> opcod2, dag oops, dag iops,
}
// Load / store multiple
-class AXSI5<dag oops, dag iops, InstrItinClass itin,
+class AXDI5<dag oops, dag iops, InstrItinClass itin,
string asm, list<dag> pattern>
: VFPXI<oops, iops, AddrMode5, Size4Bytes, IndexModeNone,
VFPLdStMulFrm, itin, asm, "", pattern> {
@@ -1079,7 +1079,7 @@ class AXSI5<dag oops, dag iops, InstrItinClass itin,
let Inst{11-8} = 0b1011;
}
-class AXDI5<dag oops, dag iops, InstrItinClass itin,
+class AXSI5<dag oops, dag iops, InstrItinClass itin,
string asm, list<dag> pattern>
: VFPXI<oops, iops, AddrMode5, Size4Bytes, IndexModeNone,
VFPLdStMulFrm, itin, asm, "", pattern> {
@@ -1088,7 +1088,6 @@ class AXDI5<dag oops, dag iops, InstrItinClass itin,
let Inst{11-8} = 0b1010;
}
-
// Double precision, unary
class ADuI<bits<8> opcod1, bits<4> opcod2, bits<4> opcod3, dag oops, dag iops,
InstrItinClass itin, string opc, string asm, list<dag> pattern>