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author | Evan Cheng <evan.cheng@apple.com> | 2011-07-01 22:36:09 +0000 |
---|---|---|
committer | Evan Cheng <evan.cheng@apple.com> | 2011-07-01 22:36:09 +0000 |
commit | 385e930d55f3ecd3c9538823dfa5896a12461845 (patch) | |
tree | c173011a67d530d425d77f01bb63eb61edd67222 /lib/Target/ARM | |
parent | ce795dc92f693a855dbf1450570e6aeb69774bcc (diff) | |
download | external_llvm-385e930d55f3ecd3c9538823dfa5896a12461845.zip external_llvm-385e930d55f3ecd3c9538823dfa5896a12461845.tar.gz external_llvm-385e930d55f3ecd3c9538823dfa5896a12461845.tar.bz2 |
Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134281 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM')
-rw-r--r-- | lib/Target/ARM/ARMSubtarget.cpp | 2 | ||||
-rw-r--r-- | lib/Target/ARM/ARMSubtarget.h | 2 | ||||
-rw-r--r-- | lib/Target/ARM/CMakeLists.txt | 2 | ||||
-rw-r--r-- | lib/Target/ARM/Makefile | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMSubtarget.cpp b/lib/Target/ARM/ARMSubtarget.cpp index 5f94a1f..a7010c5 100644 --- a/lib/Target/ARM/ARMSubtarget.cpp +++ b/lib/Target/ARM/ARMSubtarget.cpp @@ -21,7 +21,7 @@ #define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC -#include "ARMGenSubtarget.inc" +#include "ARMGenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/ARM/ARMSubtarget.h b/lib/Target/ARM/ARMSubtarget.h index 3a9431f..66e4426 100644 --- a/lib/Target/ARM/ARMSubtarget.h +++ b/lib/Target/ARM/ARMSubtarget.h @@ -20,7 +20,7 @@ #include <string> #define GET_SUBTARGETINFO_HEADER -#include "ARMGenSubtarget.inc" +#include "ARMGenSubtargetInfo.inc" namespace llvm { class GlobalValue; diff --git a/lib/Target/ARM/CMakeLists.txt b/lib/Target/ARM/CMakeLists.txt index b1d4f54..a261ca0 100644 --- a/lib/Target/ARM/CMakeLists.txt +++ b/lib/Target/ARM/CMakeLists.txt @@ -9,7 +9,7 @@ tablegen(ARMGenAsmMatcher.inc -gen-asm-matcher) tablegen(ARMGenDAGISel.inc -gen-dag-isel) tablegen(ARMGenFastISel.inc -gen-fast-isel) tablegen(ARMGenCallingConv.inc -gen-callingconv) -tablegen(ARMGenSubtarget.inc -gen-subtarget) +tablegen(ARMGenSubtargetInfo.inc -gen-subtarget) tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info) tablegen(ARMGenDecoderTables.inc -gen-arm-decoder) diff --git a/lib/Target/ARM/Makefile b/lib/Target/ARM/Makefile index 6472c53..51a8ac4 100644 --- a/lib/Target/ARM/Makefile +++ b/lib/Target/ARM/Makefile @@ -14,7 +14,7 @@ TARGET = ARM # Make sure that tblgen is run, first thing. BUILT_SOURCES = ARMGenRegisterInfo.inc ARMGenInstrInfo.inc \ ARMGenAsmWriter.inc ARMGenAsmMatcher.inc \ - ARMGenDAGISel.inc ARMGenSubtarget.inc \ + ARMGenDAGISel.inc ARMGenSubtargetInfo.inc \ ARMGenCodeEmitter.inc ARMGenCallingConv.inc \ ARMGenDecoderTables.inc ARMGenEDInfo.inc \ ARMGenFastISel.inc ARMGenMCCodeEmitter.inc |