Update LLVM for merge to r171905.

Android.mk
lib/Analysis/Android.mk
lib/CodeGen/Android.mk
lib/CodeGen/MachineScheduler.cpp - specify std::pop_heap()
lib/IR/Android.mk - new from lib/VMCore
lib/MC/Android.mk
lib/MC/MCAssembler.cpp - put back pointer param (from reference).
lib/Support/DeltaAlgorithm.cpp - iterator -> const_iterator !
lib/TableGen/Android.mk
lib/Target/ARM/ARMJITInfo.cpp - Removed unused legacy JIT changes
lib/Target/ARM/Android.mk
lib/Target/ARM/AsmParser/Android.mk
lib/Target/ARM/Disassembler/Android.mk
lib/Target/ARM/MCTargetDesc/Android.mk
lib/Target/Android.mk
lib/Target/Mips/Android.mk
lib/Target/Mips/Disassembler/Android.mk
lib/Target/Mips/MCTargetDesc/Android.mk
lib/Target/X86/Android.mk
lib/Target/X86/AsmParser/Android.mk
lib/Target/X86/Disassembler/Android.mk
lib/Transforms/IPO/Android.mk
lib/Transforms/Instrumentation/Android.mk
lib/Transforms/Scalar/Android.mk
lib/Transforms/Utils/Android.mk
lib/Transforms/Vectorize/Android.mk
lib/VMCore/Android.mk - moved to lib/IR
llvm-gen-intrinsics.mk - new Intrinsics.td location
utils/TableGen/Android.mk

Change-Id: Ifebdb1716c372fd917a844c44be9d10df66434b0

5 files changed, 3 insertions, 29 deletions

diff --git a/lib/Target/ARM/ARMJITInfo.cpp b/lib/Target/ARM/ARMJITInfo.cpp
index a5642d6..351a290 100644
--- a/lib/Target/ARM/ARMJITInfo.cpp
+++ b/lib/Target/ARM/ARMJITInfo.cpp
@@ -48,7 +48,7 @@ static TargetJITInfo::JITCompilerFn JITCompilerFunction;
 // write our own wrapper, which does things our way, so we have complete
 // control over register saving and restoring.
 extern "C" {
-#if defined(__arm__) && !defined(ANDROID)
+#if defined(__arm__)
   void ARMCompilationCallback();
   asm(
     ".text\n"
@@ -248,7 +248,6 @@ intptr_t ARMJITInfo::resolveRelocDestAddr(MachineRelocation *MR) const {
     return getJumpTableBaseAddr(MR->getJumpTableIndex());
   case ARM::reloc_arm_cp_entry:
   case ARM::reloc_arm_vfp_cp_entry:
-  case ARM::reloc_arm_so_imm_cp_entry:
     // Constant pool entry address.
     return getConstantPoolEntryAddr(MR->getConstantPoolIndex());
   case ARM::reloc_arm_machine_cp_entry: {
@@ -295,29 +294,6 @@ void ARMJITInfo::relocate(void *Function, MachineRelocation *MR,
       *((intptr_t*)RelocPos) |= 15 << ARMII::RegRnShift;
       break;
     }
-    case ARM::reloc_arm_so_imm_cp_entry: {
-      ResultPtr = ResultPtr - (intptr_t)RelocPos - 8;
-      // If the result is positive, set bit U(23) to 1.
-      if (ResultPtr >= 0)
-        *((intptr_t*)RelocPos) |= 1 << ARMII::U_BitShift;
-      else {
-        // Otherwise, obtain the absolute value and set bit U(23) to 0.
-        *((intptr_t*)RelocPos) &= ~(1 << ARMII::U_BitShift);
-        // FIXME: Also set bit 22 to 1 since 'sub' instruction is going to be used.
-        *((intptr_t*)RelocPos) |= 1 << 22;
-        ResultPtr = - ResultPtr;
-      }
-
-      int SoImmVal = ARM_AM::getSOImmVal(ResultPtr);
-      assert(SoImmVal != -1 && "Not a valid so_imm value!");
-      *((intptr_t*)RelocPos) |= (ARM_AM::getSOImmValRot((unsigned)SoImmVal) >> 1)
-            << ARMII::SoRotImmShift;
-      *((intptr_t*)RelocPos) |= ARM_AM::getSOImmValImm((unsigned)SoImmVal);
-       // Set register Rn to PC (which is register 15 on all architectures).
-       // FIXME: This avoids the need for register info in the JIT class.
-       *((intptr_t*)RelocPos) |= 15 << ARMII::RegRnShift;
-      break;
-    }
     case ARM::reloc_arm_pic_jt:
     case ARM::reloc_arm_machine_cp_entry:
     case ARM::reloc_arm_absolute: {
diff --git a/lib/Target/ARM/Android.mk b/lib/Target/ARM/Android.mk
index bf58f11..6a25ae1 100644
--- a/lib/Target/ARM/Android.mk
+++ b/lib/Target/ARM/Android.mk
@@ -12,7 +12,6 @@ arm_codegen_TBLGEN_TABLES := \
   ARMGenFastISel.inc \
   ARMGenCallingConv.inc \
   ARMGenSubtargetInfo.inc \
-  ARMGenEDInfo.inc \
   ARMGenDisassemblerTables.inc
 
 arm_codegen_SRC_FILES := \
@@ -22,7 +21,6 @@ arm_codegen_SRC_FILES := \
   ARMCodeEmitter.cpp \
   ARMConstantIslandPass.cpp \
   ARMConstantPoolValue.cpp \
-  ARMELFWriterInfo.cpp \
   ARMExpandPseudoInsts.cpp \
   ARMFastISel.cpp \
   ARMFrameLowering.cpp \
@@ -39,6 +37,7 @@ arm_codegen_SRC_FILES := \
   ARMSubtarget.cpp \
   ARMTargetMachine.cpp \
   ARMTargetObjectFile.cpp \
+  ARMTargetTransformInfo.cpp \
   InstPrinter/ARMInstPrinter.cpp \
   MLxExpansionPass.cpp \
   Thumb1FrameLowering.cpp \
diff --git a/lib/Target/ARM/AsmParser/Android.mk b/lib/Target/ARM/AsmParser/Android.mk
index 5e64e27..e17a274 100644
--- a/lib/Target/ARM/AsmParser/Android.mk
+++ b/lib/Target/ARM/AsmParser/Android.mk
@@ -5,7 +5,6 @@ LOCAL_PATH := $(call my-dir)
 #===---------------------------------------------------------------===
 
 arm_asm_parser_SRC_FILES := \
-  ARMAsmLexer.cpp \
   ARMAsmParser.cpp
 
 arm_asm_parser_TBLGEN_TABLES := \
diff --git a/lib/Target/ARM/Disassembler/Android.mk b/lib/Target/ARM/Disassembler/Android.mk
index fb14762..51e364b 100644
--- a/lib/Target/ARM/Disassembler/Android.mk
+++ b/lib/Target/ARM/Disassembler/Android.mk
@@ -2,7 +2,6 @@ LOCAL_PATH := $(call my-dir)
 
 arm_disassembler_TBLGEN_TABLES := \
   ARMGenDisassemblerTables.inc \
-  ARMGenEDInfo.inc \
   ARMGenInstrInfo.inc \
   ARMGenSubtargetInfo.inc \
   ARMGenRegisterInfo.inc
diff --git a/lib/Target/ARM/MCTargetDesc/Android.mk b/lib/Target/ARM/MCTargetDesc/Android.mk
index 48a1db0..b283ec5 100644
--- a/lib/Target/ARM/MCTargetDesc/Android.mk
+++ b/lib/Target/ARM/MCTargetDesc/Android.mk
@@ -9,6 +9,7 @@ arm_mc_desc_TBLGEN_TABLES := \
 arm_mc_desc_SRC_FILES := \
   ARMAsmBackend.cpp \
   ARMELFObjectWriter.cpp \
+  ARMELFStreamer.cpp \
   ARMMCAsmInfo.cpp \
   ARMMCCodeEmitter.cpp \
   ARMMCExpr.cpp \