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author | Charles Davis <cdavis5x@gmail.com> | 2013-08-27 05:38:30 +0000 |
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committer | Charles Davis <cdavis5x@gmail.com> | 2013-08-27 05:38:30 +0000 |
commit | f69a29b23a116a3520f185054290c445abf9aa62 (patch) | |
tree | c98b02ef136f3b0b7378b2e883faae39c6177679 /lib/Target/ARM | |
parent | 45fbe98c21d06448d1977e8abc95972f4ad86b26 (diff) | |
download | external_llvm-f69a29b23a116a3520f185054290c445abf9aa62.zip external_llvm-f69a29b23a116a3520f185054290c445abf9aa62.tar.gz external_llvm-f69a29b23a116a3520f185054290c445abf9aa62.tar.bz2 |
Revert "Fix the build broken by r189315." and "Move everything depending on Object/MachOFormat.h over to Support/MachO.h."
This reverts commits r189319 and r189315. r189315 broke some tests on what I
believe are big-endian platforms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189321 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM')
-rw-r--r-- | lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 32 | ||||
-rw-r--r-- | lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp | 128 |
2 files changed, 81 insertions, 79 deletions
diff --git a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp index 828442f..b1e25d8 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp @@ -25,9 +25,9 @@ #include "llvm/MC/MCSectionMachO.h" #include "llvm/MC/MCSubtargetInfo.h" #include "llvm/MC/MCValue.h" +#include "llvm/Object/MachOFormat.h" #include "llvm/Support/ELF.h" #include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/MachO.h" #include "llvm/Support/raw_ostream.h" using namespace llvm; @@ -640,16 +640,16 @@ public: // FIXME: This should be in a separate file. class DarwinARMAsmBackend : public ARMAsmBackend { public: - const MachO::CPUSubTypeARM Subtype; + const object::mach::CPUSubtypeARM Subtype; DarwinARMAsmBackend(const Target &T, const StringRef TT, - MachO::CPUSubTypeARM st) + object::mach::CPUSubtypeARM st) : ARMAsmBackend(T, TT), Subtype(st) { HasDataInCodeSupport = true; } MCObjectWriter *createObjectWriter(raw_ostream &OS) const { return createARMMachObjectWriter(OS, /*Is64Bit=*/false, - MachO::CPU_TYPE_ARM, + object::mach::CTM_ARM, Subtype); } @@ -664,18 +664,18 @@ MCAsmBackend *llvm::createARMAsmBackend(const Target &T, StringRef TT, StringRef Triple TheTriple(TT); if (TheTriple.isOSDarwin()) { - MachO::CPUSubTypeARM CS = - StringSwitch<MachO::CPUSubTypeARM>(TheTriple.getArchName()) - .Cases("armv4t", "thumbv4t", MachO::CPU_SUBTYPE_ARM_V4T) - .Cases("armv5e", "thumbv5e", MachO::CPU_SUBTYPE_ARM_V5TEJ) - .Cases("armv6", "thumbv6", MachO::CPU_SUBTYPE_ARM_V6) - .Cases("armv6m", "thumbv6m", MachO::CPU_SUBTYPE_ARM_V6M) - .Cases("armv7em", "thumbv7em", MachO::CPU_SUBTYPE_ARM_V7EM) - .Cases("armv7f", "thumbv7f", MachO::CPU_SUBTYPE_ARM_V7F) - .Cases("armv7k", "thumbv7k", MachO::CPU_SUBTYPE_ARM_V7K) - .Cases("armv7m", "thumbv7m", MachO::CPU_SUBTYPE_ARM_V7M) - .Cases("armv7s", "thumbv7s", MachO::CPU_SUBTYPE_ARM_V7S) - .Default(MachO::CPU_SUBTYPE_ARM_V7); + object::mach::CPUSubtypeARM CS = + StringSwitch<object::mach::CPUSubtypeARM>(TheTriple.getArchName()) + .Cases("armv4t", "thumbv4t", object::mach::CSARM_V4T) + .Cases("armv5e", "thumbv5e",object::mach::CSARM_V5TEJ) + .Cases("armv6", "thumbv6", object::mach::CSARM_V6) + .Cases("armv6m", "thumbv6m", object::mach::CSARM_V6M) + .Cases("armv7em", "thumbv7em", object::mach::CSARM_V7EM) + .Cases("armv7f", "thumbv7f", object::mach::CSARM_V7F) + .Cases("armv7k", "thumbv7k", object::mach::CSARM_V7K) + .Cases("armv7m", "thumbv7m", object::mach::CSARM_V7M) + .Cases("armv7s", "thumbv7s", object::mach::CSARM_V7S) + .Default(object::mach::CSARM_V7); return new DarwinARMAsmBackend(T, TT, CS); } diff --git a/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp b/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp index ee43f5f..b9efe74 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMMachObjectWriter.cpp @@ -20,9 +20,10 @@ #include "llvm/MC/MCMachOSymbolFlags.h" #include "llvm/MC/MCMachObjectWriter.h" #include "llvm/MC/MCValue.h" +#include "llvm/Object/MachOFormat.h" #include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/MachO.h" using namespace llvm; +using namespace llvm::object; namespace { class ARMMachObjectWriter : public MCMachObjectTargetWriter { @@ -62,7 +63,7 @@ public: static bool getARMFixupKindMachOInfo(unsigned Kind, unsigned &RelocType, unsigned &Log2Size) { - RelocType = unsigned(MachO::ARM_RELOC_VANILLA); + RelocType = unsigned(macho::RIT_Vanilla); Log2Size = ~0U; switch (Kind) { @@ -91,21 +92,21 @@ static bool getARMFixupKindMachOInfo(unsigned Kind, unsigned &RelocType, case ARM::fixup_arm_uncondbl: case ARM::fixup_arm_condbl: case ARM::fixup_arm_blx: - RelocType = unsigned(MachO::ARM_RELOC_BR24); + RelocType = unsigned(macho::RIT_ARM_Branch24Bit); // Report as 'long', even though that is not quite accurate. Log2Size = llvm::Log2_32(4); return true; // Handle Thumb branches. case ARM::fixup_arm_thumb_br: - RelocType = unsigned(MachO::ARM_THUMB_RELOC_BR22); + RelocType = unsigned(macho::RIT_ARM_ThumbBranch22Bit); Log2Size = llvm::Log2_32(2); return true; case ARM::fixup_t2_uncondbranch: case ARM::fixup_arm_thumb_bl: case ARM::fixup_arm_thumb_blx: - RelocType = unsigned(MachO::ARM_THUMB_RELOC_BR22); + RelocType = unsigned(macho::RIT_ARM_ThumbBranch22Bit); Log2Size = llvm::Log2_32(4); return true; @@ -120,23 +121,23 @@ static bool getARMFixupKindMachOInfo(unsigned Kind, unsigned &RelocType, // 1 - thumb instructions case ARM::fixup_arm_movt_hi16: case ARM::fixup_arm_movt_hi16_pcrel: - RelocType = unsigned(MachO::ARM_RELOC_HALF); + RelocType = unsigned(macho::RIT_ARM_Half); Log2Size = 1; return true; case ARM::fixup_t2_movt_hi16: case ARM::fixup_t2_movt_hi16_pcrel: - RelocType = unsigned(MachO::ARM_RELOC_HALF); + RelocType = unsigned(macho::RIT_ARM_Half); Log2Size = 3; return true; case ARM::fixup_arm_movw_lo16: case ARM::fixup_arm_movw_lo16_pcrel: - RelocType = unsigned(MachO::ARM_RELOC_HALF); + RelocType = unsigned(macho::RIT_ARM_Half); Log2Size = 0; return true; case ARM::fixup_t2_movw_lo16: case ARM::fixup_t2_movw_lo16_pcrel: - RelocType = unsigned(MachO::ARM_RELOC_HALF); + RelocType = unsigned(macho::RIT_ARM_Half); Log2Size = 2; return true; } @@ -152,7 +153,7 @@ RecordARMScatteredHalfRelocation(MachObjectWriter *Writer, uint64_t &FixedValue) { uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset(); unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); - unsigned Type = MachO::ARM_RELOC_HALF; + unsigned Type = macho::RIT_ARM_Half; // See <reloc.h>. const MCSymbol *A = &Target.getSymA()->getSymbol(); @@ -178,7 +179,7 @@ RecordARMScatteredHalfRelocation(MachObjectWriter *Writer, "' can not be undefined in a subtraction expression"); // Select the appropriate difference relocation type. - Type = MachO::ARM_RELOC_HALF_SECTDIFF; + Type = macho::RIT_ARM_HalfDifference; Value2 = Writer->getSymbolAddress(B_SD, Layout); FixedValue -= Writer->getSectionAddress(B_SD->getFragment()->getParent()); } @@ -222,28 +223,29 @@ RecordARMScatteredHalfRelocation(MachObjectWriter *Writer, break; } - MachO::scattered_relocation_info MRE; - if (Type == MachO::ARM_RELOC_HALF_SECTDIFF) { + if (Type == macho::RIT_ARM_HalfDifference) { uint32_t OtherHalf = MovtBit ? (FixedValue & 0xffff) : ((FixedValue & 0xffff0000) >> 16); - MRE.r_address = OtherHalf; - MRE.r_type = MachO::ARM_RELOC_PAIR; - MRE.r_length = ((MovtBit << 0) | - (ThumbBit << 1)); - MRE.r_pcrel = IsPCRel; - MRE.r_scattered = 1; - MRE.r_value = Value2; + macho::RelocationEntry MRE; + MRE.Word0 = ((OtherHalf << 0) | + (macho::RIT_Pair << 24) | + (MovtBit << 28) | + (ThumbBit << 29) | + (IsPCRel << 30) | + macho::RF_Scattered); + MRE.Word1 = Value2; Writer->addRelocation(Fragment->getParent(), MRE); } - MRE.r_address = FixupOffset; - MRE.r_type = Type; - MRE.r_length = ((MovtBit << 0) | - (ThumbBit << 1)); - MRE.r_pcrel = IsPCRel; - MRE.r_scattered = 1; - MRE.r_value = Value; + macho::RelocationEntry MRE; + MRE.Word0 = ((FixupOffset << 0) | + (Type << 24) | + (MovtBit << 28) | + (ThumbBit << 29) | + (IsPCRel << 30) | + macho::RF_Scattered); + MRE.Word1 = Value; Writer->addRelocation(Fragment->getParent(), MRE); } @@ -257,7 +259,7 @@ void ARMMachObjectWriter::RecordARMScatteredRelocation(MachObjectWriter *Writer, uint64_t &FixedValue) { uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset(); unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); - unsigned Type = MachO::ARM_RELOC_VANILLA; + unsigned Type = macho::RIT_Vanilla; // See <reloc.h>. const MCSymbol *A = &Target.getSymA()->getSymbol(); @@ -282,30 +284,31 @@ void ARMMachObjectWriter::RecordARMScatteredRelocation(MachObjectWriter *Writer, "' can not be undefined in a subtraction expression"); // Select the appropriate difference relocation type. - Type = MachO::ARM_RELOC_SECTDIFF; + Type = macho::RIT_Difference; Value2 = Writer->getSymbolAddress(B_SD, Layout); FixedValue -= Writer->getSectionAddress(B_SD->getFragment()->getParent()); } - MachO::scattered_relocation_info MRE; // Relocations are written out in reverse order, so the PAIR comes first. - if (Type == MachO::ARM_RELOC_SECTDIFF || - Type == MachO::ARM_RELOC_LOCAL_SECTDIFF) { - MRE.r_address = 0; - MRE.r_type = MachO::ARM_RELOC_PAIR; - MRE.r_length = Log2Size; - MRE.r_pcrel = IsPCRel; - MRE.r_scattered = 1; - MRE.r_value = Value2; + if (Type == macho::RIT_Difference || + Type == macho::RIT_Generic_LocalDifference) { + macho::RelocationEntry MRE; + MRE.Word0 = ((0 << 0) | + (macho::RIT_Pair << 24) | + (Log2Size << 28) | + (IsPCRel << 30) | + macho::RF_Scattered); + MRE.Word1 = Value2; Writer->addRelocation(Fragment->getParent(), MRE); } - MRE.r_address = FixupOffset; - MRE.r_type = Type; - MRE.r_length = Log2Size; - MRE.r_pcrel = IsPCRel; - MRE.r_scattered = 1; - MRE.r_value = Value; + macho::RelocationEntry MRE; + MRE.Word0 = ((FixupOffset << 0) | + (Type << 24) | + (Log2Size << 28) | + (IsPCRel << 30) | + macho::RF_Scattered); + MRE.Word1 = Value; Writer->addRelocation(Fragment->getParent(), MRE); } @@ -323,13 +326,13 @@ bool ARMMachObjectWriter::requiresExternRelocation(MachObjectWriter *Writer, switch (RelocType) { default: return false; - case MachO::ARM_RELOC_BR24: + case macho::RIT_ARM_Branch24Bit: // PC pre-adjustment of 8 for these instructions. Value -= 8; // ARM BL/BLX has a 25-bit offset. Range = 0x1ffffff; break; - case MachO::ARM_THUMB_RELOC_BR22: + case macho::RIT_ARM_ThumbBranch22Bit: // PC pre-adjustment of 4 for these instructions. Value -= 4; // Thumb BL/BLX has a 24-bit offset. @@ -358,7 +361,7 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer, uint64_t &FixedValue) { unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); unsigned Log2Size; - unsigned RelocType = MachO::ARM_RELOC_VANILLA; + unsigned RelocType = macho::RIT_Vanilla; if (!getARMFixupKindMachOInfo(Fixup.getKind(), RelocType, Log2Size)) // If we failed to get fixup kind info, it's because there's no legal // relocation type for the fixup kind. This happens when it's a fixup that's @@ -371,7 +374,7 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer, // scattered relocation entry. Differences always require scattered // relocations. if (Target.getSymB()) { - if (RelocType == MachO::ARM_RELOC_HALF) + if (RelocType == macho::RIT_ARM_Half) return RecordARMScatteredHalfRelocation(Writer, Asm, Layout, Fragment, Fixup, Target, FixedValue); return RecordARMScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup, @@ -389,7 +392,7 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer, // // Is this right for ARM? uint32_t Offset = Target.getConstant(); - if (IsPCRel && RelocType == MachO::ARM_RELOC_VANILLA) + if (IsPCRel && RelocType == macho::RIT_Vanilla) Offset += 1 << Log2Size; if (Offset && SD && !Writer->doesSymbolRequireExternRelocation(SD)) return RecordARMScatteredRelocation(Writer, Asm, Layout, Fragment, Fixup, @@ -442,17 +445,17 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer, } // struct relocation_info (8 bytes) - MachO::relocation_info MRE; - MRE.r_address = FixupOffset; - MRE.r_symbolnum = Index; - MRE.r_pcrel = IsPCRel; - MRE.r_length = Log2Size; - MRE.r_extern = IsExtern; - MRE.r_type = Type; + macho::RelocationEntry MRE; + MRE.Word0 = FixupOffset; + MRE.Word1 = ((Index << 0) | + (IsPCRel << 24) | + (Log2Size << 25) | + (IsExtern << 27) | + (Type << 28)); // Even when it's not a scattered relocation, movw/movt always uses // a PAIR relocation. - if (Type == MachO::ARM_RELOC_HALF) { + if (Type == macho::RIT_ARM_Half) { // The other-half value only gets populated for the movt and movw // relocation entries. uint32_t Value = 0; @@ -471,12 +474,11 @@ void ARMMachObjectWriter::RecordRelocation(MachObjectWriter *Writer, Value = FixedValue & 0xffff; break; } - MachO::relocation_info MREPair; - MREPair.r_address = Value; - MREPair.r_symbolnum = 0xffffff; - MREPair.r_length = Log2Size; - MREPair.r_pcrel = MREPair.r_extern = 0; - MREPair.r_type = MachO::ARM_RELOC_PAIR; + macho::RelocationEntry MREPair; + MREPair.Word0 = Value; + MREPair.Word1 = ((0xffffff) | + (Log2Size << 25) | + (macho::RIT_Pair << 28)); Writer->addRelocation(Fragment->getParent(), MREPair); } |