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| author | Craig Topper <craig.topper@gmail.com> | 2012-04-20 07:30:17 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2012-04-20 07:30:17 +0000 |
| commit | 420761a0f193e87d08ee1c51b26bba23ab4bac7f (patch) | |
| tree | 55aa0936b18927fe72fb4806eeab177b42c2f9cd /lib/Target/CellSPU/SPUInstrInfo.cpp | |
| parent | c909950c384e8234a7b3c5a76b7f79e3f7012ceb (diff) | |
| download | external_llvm-420761a0f193e87d08ee1c51b26bba23ab4bac7f.zip external_llvm-420761a0f193e87d08ee1c51b26bba23ab4bac7f.tar.gz external_llvm-420761a0f193e87d08ee1c51b26bba23ab4bac7f.tar.bz2 | |
Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change since they are equivalent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/CellSPU/SPUInstrInfo.cpp')
| -rw-r--r-- | lib/Target/CellSPU/SPUInstrInfo.cpp | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/lib/Target/CellSPU/SPUInstrInfo.cpp b/lib/Target/CellSPU/SPUInstrInfo.cpp index a30de46..b599d7b 100644 --- a/lib/Target/CellSPU/SPUInstrInfo.cpp +++ b/lib/Target/CellSPU/SPUInstrInfo.cpp @@ -143,21 +143,21 @@ SPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, const TargetRegisterInfo *TRI) const { unsigned opc; bool isValidFrameIdx = (FrameIdx < SPUFrameLowering::maxFrameOffset()); - if (RC == SPU::GPRCRegisterClass) + if (RC == &SPU::GPRCRegClass) opc = isValidFrameIdx ? SPU::STQDr128 : SPU::STQXr128; - else if (RC == SPU::R64CRegisterClass) + else if (RC == &SPU::R64CRegClass) opc = isValidFrameIdx ? SPU::STQDr64 : SPU::STQXr64; - else if (RC == SPU::R64FPRegisterClass) + else if (RC == &SPU::R64FPRegClass) opc = isValidFrameIdx ? SPU::STQDr64 : SPU::STQXr64; - else if (RC == SPU::R32CRegisterClass) + else if (RC == &SPU::R32CRegClass) opc = isValidFrameIdx ? SPU::STQDr32 : SPU::STQXr32; - else if (RC == SPU::R32FPRegisterClass) + else if (RC == &SPU::R32FPRegClass) opc = isValidFrameIdx ? SPU::STQDr32 : SPU::STQXr32; - else if (RC == SPU::R16CRegisterClass) + else if (RC == &SPU::R16CRegClass) opc = isValidFrameIdx ? SPU::STQDr16 : SPU::STQXr16; - else if (RC == SPU::R8CRegisterClass) + else if (RC == &SPU::R8CRegClass) opc = isValidFrameIdx ? SPU::STQDr8 : SPU::STQXr8; - else if (RC == SPU::VECREGRegisterClass) + else if (RC == &SPU::VECREGRegClass) opc = isValidFrameIdx ? SPU::STQDv16i8 : SPU::STQXv16i8; else llvm_unreachable("Unknown regclass!"); @@ -176,21 +176,21 @@ SPUInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, const TargetRegisterInfo *TRI) const { unsigned opc; bool isValidFrameIdx = (FrameIdx < SPUFrameLowering::maxFrameOffset()); - if (RC == SPU::GPRCRegisterClass) + if (RC == &SPU::GPRCRegClass) opc = isValidFrameIdx ? SPU::LQDr128 : SPU::LQXr128; - else if (RC == SPU::R64CRegisterClass) + else if (RC == &SPU::R64CRegClass) opc = isValidFrameIdx ? SPU::LQDr64 : SPU::LQXr64; - else if (RC == SPU::R64FPRegisterClass) + else if (RC == &SPU::R64FPRegClass) opc = isValidFrameIdx ? SPU::LQDr64 : SPU::LQXr64; - else if (RC == SPU::R32CRegisterClass) + else if (RC == &SPU::R32CRegClass) opc = isValidFrameIdx ? SPU::LQDr32 : SPU::LQXr32; - else if (RC == SPU::R32FPRegisterClass) + else if (RC == &SPU::R32FPRegClass) opc = isValidFrameIdx ? SPU::LQDr32 : SPU::LQXr32; - else if (RC == SPU::R16CRegisterClass) + else if (RC == &SPU::R16CRegClass) opc = isValidFrameIdx ? SPU::LQDr16 : SPU::LQXr16; - else if (RC == SPU::R8CRegisterClass) + else if (RC == &SPU::R8CRegClass) opc = isValidFrameIdx ? SPU::LQDr8 : SPU::LQXr8; - else if (RC == SPU::VECREGRegisterClass) + else if (RC == &SPU::VECREGRegClass) opc = isValidFrameIdx ? SPU::LQDv16i8 : SPU::LQXv16i8; else llvm_unreachable("Unknown regclass in loadRegFromStackSlot!"); |