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author | Akira Hatanaka <ahatanaka@mips.com> | 2013-08-06 23:08:38 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-08-06 23:08:38 +0000 |
commit | 1858786285139b87961d9ca08de91dcd59364afb (patch) | |
tree | 2e0913c83c690b1c3d8e2e0604b0681e3b2d15a1 /lib/Target/Mips/Mips16InstrInfo.cpp | |
parent | 3492eefa4b2509c87598678a6977074a3f6a50e6 (diff) | |
download | external_llvm-1858786285139b87961d9ca08de91dcd59364afb.zip external_llvm-1858786285139b87961d9ca08de91dcd59364afb.tar.gz external_llvm-1858786285139b87961d9ca08de91dcd59364afb.tar.bz2 |
[mips] Rename register classes CPURegs and CPU64Regs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187832 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips16InstrInfo.cpp')
-rw-r--r-- | lib/Target/Mips/Mips16InstrInfo.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Mips/Mips16InstrInfo.cpp b/lib/Target/Mips/Mips16InstrInfo.cpp index 204d790..05e70ab 100644 --- a/lib/Target/Mips/Mips16InstrInfo.cpp +++ b/lib/Target/Mips/Mips16InstrInfo.cpp @@ -72,9 +72,9 @@ void Mips16InstrInfo::copyPhysReg(MachineBasicBlock &MBB, unsigned Opc = 0; if (Mips::CPU16RegsRegClass.contains(DestReg) && - Mips::CPURegsRegClass.contains(SrcReg)) + Mips::GPR32RegClass.contains(SrcReg)) Opc = Mips::MoveR3216; - else if (Mips::CPURegsRegClass.contains(DestReg) && + else if (Mips::GPR32RegClass.contains(DestReg) && Mips::CPU16RegsRegClass.contains(SrcReg)) Opc = Mips::Move32R16; else if ((SrcReg == Mips::HI) && |