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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-12-21 22:39:17 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-12-21 22:39:17 +0000 |
| commit | 7de001b97e1087b393efc90f7b10ffedd4f66fed (patch) | |
| tree | 8841b4832ea9a0c68aee379b601bbb8559549781 /lib/Target/Mips/Mips64InstrInfo.td | |
| parent | 2a732ec272e3bab004a47abb452ad47bc4eb8c7b (diff) | |
| download | external_llvm-7de001b97e1087b393efc90f7b10ffedd4f66fed.zip external_llvm-7de001b97e1087b393efc90f7b10ffedd4f66fed.tar.gz external_llvm-7de001b97e1087b393efc90f7b10ffedd4f66fed.tar.bz2 | |
[mips] Refactor instructions which copy from and to HI/LO registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170939 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips64InstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/Mips64InstrInfo.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td index d25087d..3bacc66 100644 --- a/lib/Target/Mips/Mips64InstrInfo.td +++ b/lib/Target/Mips/Mips64InstrInfo.td @@ -186,10 +186,10 @@ def DMULTu : Mult64<0x1d, "dmultu", IIImul>; def DSDIV : Div64<MipsDivRem, 0x1e, "ddiv", IIIdiv>; def DUDIV : Div64<MipsDivRemU, 0x1f, "ddivu", IIIdiv>; -def MTHI64 : MoveToLOHI<0x11, "mthi", CPU64Regs, [HI64]>; -def MTLO64 : MoveToLOHI<0x13, "mtlo", CPU64Regs, [LO64]>; -def MFHI64 : MoveFromLOHI<0x10, "mfhi", CPU64Regs, [HI64]>; -def MFLO64 : MoveFromLOHI<0x12, "mflo", CPU64Regs, [LO64]>; +def MTHI64 : MoveToLOHI<"mthi", CPU64Regs, [HI64]>, MTLO_FM<0x11>; +def MTLO64 : MoveToLOHI<"mtlo", CPU64Regs, [LO64]>, MTLO_FM<0x13>; +def MFHI64 : MoveFromLOHI<"mfhi", CPU64Regs, [HI64]>, MFLO_FM<0x10>; +def MFLO64 : MoveFromLOHI<"mflo", CPU64Regs, [LO64]>, MFLO_FM<0x12>; /// Sign Ext In Register Instructions. def SEB64 : SignExtInReg<0x10, "seb", i8, CPU64Regs>; |