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authorAkira Hatanaka <ahatanaka@mips.com>2012-12-21 22:41:52 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-12-21 22:41:52 +0000
commit8aaed99a99fcb879be2ed9bbc25a68c2e8558960 (patch)
tree6aba8cecfb309383a27a9cc78a17c37c0da40f82 /lib/Target/Mips/Mips64InstrInfo.td
parent7de001b97e1087b393efc90f7b10ffedd4f66fed (diff)
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[mips] Refactor sign-extension-in-register instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170940 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips64InstrInfo.td')
-rw-r--r--lib/Target/Mips/Mips64InstrInfo.td4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/Mips/Mips64InstrInfo.td b/lib/Target/Mips/Mips64InstrInfo.td
index 3bacc66..20d4932 100644
--- a/lib/Target/Mips/Mips64InstrInfo.td
+++ b/lib/Target/Mips/Mips64InstrInfo.td
@@ -192,8 +192,8 @@ def MFHI64 : MoveFromLOHI<"mfhi", CPU64Regs, [HI64]>, MFLO_FM<0x10>;
def MFLO64 : MoveFromLOHI<"mflo", CPU64Regs, [LO64]>, MFLO_FM<0x12>;
/// Sign Ext In Register Instructions.
-def SEB64 : SignExtInReg<0x10, "seb", i8, CPU64Regs>;
-def SEH64 : SignExtInReg<0x18, "seh", i16, CPU64Regs>;
+def SEB64 : SignExtInReg<"seb", i8, CPU64Regs>, SEB_FM<0x10>;
+def SEH64 : SignExtInReg<"seh", i16, CPU64Regs>, SEB_FM<0x18>;
/// Count Leading
def DCLZ : CountLeading0<0x24, "dclz", CPU64Regs>;