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authorAkira Hatanaka <ahatanaka@mips.com>2013-09-06 23:52:46 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2013-09-06 23:52:46 +0000
commit997c5dead83fc237280888696e1fa719563fc7f1 (patch)
treed9ff25edc9d09da90e07367e5dce38dcc09ac745 /lib/Target/Mips/MipsCodeEmitter.cpp
parentcd3c1b9af9c79bd128a4811570269022a8183408 (diff)
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[mips] Define "trap" as a pseudo instruction that turns into "break 0, 0".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190224 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsCodeEmitter.cpp')
-rw-r--r--lib/Target/Mips/MipsCodeEmitter.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/Mips/MipsCodeEmitter.cpp b/lib/Target/Mips/MipsCodeEmitter.cpp
index 0f1917a..b50edf1 100644
--- a/lib/Target/Mips/MipsCodeEmitter.cpp
+++ b/lib/Target/Mips/MipsCodeEmitter.cpp
@@ -327,6 +327,10 @@ bool MipsCodeEmitter::expandPseudos(MachineBasicBlock::instr_iterator &MI,
BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BEQ)).addReg(Mips::ZERO)
.addReg(Mips::ZERO).addOperand(MI->getOperand(0));
break;
+ case Mips::TRAP:
+ BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BREAK)).addImm(0)
+ .addImm(0);
+ break;
case Mips::JALRPseudo:
BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::JALR), Mips::RA)
.addReg(MI->getOperand(0).getReg());