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author | Akira Hatanaka <ahatanaka@mips.com> | 2012-12-13 01:27:48 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-12-13 01:27:48 +0000 |
commit | b2c68ddaaba55c417679d3ed466ebd403d991cec (patch) | |
tree | f663a1555b5ccaf50b14e275dd9aa2a1f59a882b /lib/Target/Mips/MipsInstrFPU.td | |
parent | 6f94eb3512ebc7b279451d26427153d9300a6a14 (diff) | |
download | external_llvm-b2c68ddaaba55c417679d3ed466ebd403d991cec.zip external_llvm-b2c68ddaaba55c417679d3ed466ebd403d991cec.tar.gz external_llvm-b2c68ddaaba55c417679d3ed466ebd403d991cec.tar.bz2 |
[mips] Modify definitions of floating point multiply-add/sub instructions.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170073 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MipsInstrFPU.td')
-rw-r--r-- | lib/Target/Mips/MipsInstrFPU.td | 41 |
1 files changed, 29 insertions, 12 deletions
diff --git a/lib/Target/Mips/MipsInstrFPU.td b/lib/Target/Mips/MipsInstrFPU.td index da1d207..e3cac64 100644 --- a/lib/Target/Mips/MipsInstrFPU.td +++ b/lib/Target/Mips/MipsInstrFPU.td @@ -248,6 +248,19 @@ class SW_FT<string opstr, RegisterClass RC, InstrItinClass Itin, let DecoderMethod = "DecodeFMem"; } +class MADDS_FT<string opstr, RegisterClass RC, InstrItinClass Itin, + SDPatternOperator OpNode = null_frag> : + InstSE<(outs RC:$fd), (ins RC:$fr, RC:$fs, RC:$ft), + !strconcat(opstr, "\t$fd, $fr, $fs, $ft"), + [(set RC:$fd, (OpNode (fmul RC:$fs, RC:$ft), RC:$fr))], Itin, FrmFR>; + +class NMADDS_FT<string opstr, RegisterClass RC, InstrItinClass Itin, + SDPatternOperator OpNode = null_frag> : + InstSE<(outs RC:$fd), (ins RC:$fr, RC:$fs, RC:$ft), + !strconcat(opstr, "\t$fd, $fr, $fs, $ft"), + [(set RC:$fd, (fsub fpimm0, (OpNode (fmul RC:$fs, RC:$ft), RC:$fr)))], + Itin, FrmFR>; + //===----------------------------------------------------------------------===// // Floating Point Instructions //===----------------------------------------------------------------------===// @@ -414,34 +427,38 @@ def FSUB_S : ADDS_FT<"sub.s", FGR32, IIFadd, 0, fsub>, ADDS_FM<0x01, 16>; defm FSUB : ADDS_M<"sub.d", IIFadd, 0, fsub>, ADDS_FM<0x01, 17>; let Predicates = [HasMips32r2, HasStdEnc] in { - def MADD_S : FMADDSUB<0x4, 0, "madd.s", fadd, FGR32>; - def MSUB_S : FMADDSUB<0x5, 0, "msub.s", fsub, FGR32>; + def MADD_S : MADDS_FT<"madd.s", FGR32, IIFmulSingle, fadd>, MADDS_FM<4, 0>; + def MSUB_S : MADDS_FT<"msub.s", FGR32, IIFmulSingle, fsub>, MADDS_FM<5, 0>; } let Predicates = [HasMips32r2, NoNaNsFPMath, HasStdEnc] in { - def NMADD_S : FNMADDSUB<0x6, 0, "nmadd.s", fadd, FGR32>; - def NMSUB_S : FNMADDSUB<0x7, 0, "nmsub.s", fsub, FGR32>; + def NMADD_S : NMADDS_FT<"nmadd.s", FGR32, IIFmulSingle, fadd>, MADDS_FM<6, 0>; + def NMSUB_S : NMADDS_FT<"nmsub.s", FGR32, IIFmulSingle, fsub>, MADDS_FM<7, 0>; } let Predicates = [HasMips32r2, NotFP64bit, HasStdEnc] in { - def MADD_D32 : FMADDSUB<0x4, 1, "madd.d", fadd, AFGR64>; - def MSUB_D32 : FMADDSUB<0x5, 1, "msub.d", fsub, AFGR64>; + def MADD_D32 : MADDS_FT<"madd.d", AFGR64, IIFmulDouble, fadd>, MADDS_FM<4, 1>; + def MSUB_D32 : MADDS_FT<"msub.d", AFGR64, IIFmulDouble, fsub>, MADDS_FM<5, 1>; } let Predicates = [HasMips32r2, NotFP64bit, NoNaNsFPMath, HasStdEnc] in { - def NMADD_D32 : FNMADDSUB<0x6, 1, "nmadd.d", fadd, AFGR64>; - def NMSUB_D32 : FNMADDSUB<0x7, 1, "nmsub.d", fsub, AFGR64>; + def NMADD_D32 : NMADDS_FT<"nmadd.d", AFGR64, IIFmulDouble, fadd>, + MADDS_FM<6, 1>; + def NMSUB_D32 : NMADDS_FT<"nmsub.d", AFGR64, IIFmulDouble, fsub>, + MADDS_FM<7, 1>; } let Predicates = [HasMips32r2, IsFP64bit, HasStdEnc], isCodeGenOnly=1 in { - def MADD_D64 : FMADDSUB<0x4, 1, "madd.d", fadd, FGR64>; - def MSUB_D64 : FMADDSUB<0x5, 1, "msub.d", fsub, FGR64>; + def MADD_D64 : MADDS_FT<"madd.d", FGR64, IIFmulDouble, fadd>, MADDS_FM<4, 1>; + def MSUB_D64 : MADDS_FT<"msub.d", FGR64, IIFmulDouble, fsub>, MADDS_FM<5, 1>; } let Predicates = [HasMips32r2, IsFP64bit, NoNaNsFPMath, HasStdEnc], isCodeGenOnly=1 in { - def NMADD_D64 : FNMADDSUB<0x6, 1, "nmadd.d", fadd, FGR64>; - def NMSUB_D64 : FNMADDSUB<0x7, 1, "nmsub.d", fsub, FGR64>; + def NMADD_D64 : NMADDS_FT<"nmadd.d", FGR64, IIFmulDouble, fadd>, + MADDS_FM<6, 1>; + def NMSUB_D64 : NMADDS_FT<"nmsub.d", FGR64, IIFmulDouble, fsub>, + MADDS_FM<7, 1>; } //===----------------------------------------------------------------------===// |