diff options
author | Nate Begeman <natebegeman@mac.com> | 2005-12-10 02:36:00 +0000 |
---|---|---|
committer | Nate Begeman <natebegeman@mac.com> | 2005-12-10 02:36:00 +0000 |
commit | 28a6b02626c29b1fe9bb16c14c193549fab4cab8 (patch) | |
tree | 1fa32d34f94b41b5126a3c766590188de4f00adb /lib/Target/PowerPC/PPCInstrInfo.td | |
parent | b612ff956944014e6b637480487f00dbceda3b7e (diff) | |
download | external_llvm-28a6b02626c29b1fe9bb16c14c193549fab4cab8.zip external_llvm-28a6b02626c29b1fe9bb16c14c193549fab4cab8.tar.gz external_llvm-28a6b02626c29b1fe9bb16c14c193549fab4cab8.tar.bz2 |
Add support for TargetConstantPool nodes to the dag isel emitter, and use
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24657 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/PowerPC/PPCInstrInfo.td')
-rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index 03f0c6e..51f0525 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -165,7 +165,6 @@ def crbitm: Operand<i8> { } - //===----------------------------------------------------------------------===// // PowerPC Instruction Definitions. @@ -943,8 +942,12 @@ def : Pat<(srl G8RC:$in, (i64 imm:$imm)), // Hi and Lo for Darwin Global Addresses. def : Pat<(PPChi tglobaladdr:$in, (i32 0)), (LIS tglobaladdr:$in)>; def : Pat<(PPClo tglobaladdr:$in, (i32 0)), (LI tglobaladdr:$in)>; +def : Pat<(PPChi tconstpool:$in, (i32 0)), (LIS tconstpool:$in)>; +def : Pat<(PPClo tconstpool:$in, (i32 0)), (LI tconstpool:$in)>; def : Pat<(add GPRC:$in, (PPChi tglobaladdr:$g, 0)), (ADDIS GPRC:$in, tglobaladdr:$g)>; +def : Pat<(add GPRC:$in, (PPChi tconstpool:$g, 0)), + (ADDIS GPRC:$in, tconstpool:$g)>; // Standard shifts. These are represented separately from the real shifts above // so that we can distinguish between shifts that allow 5-bit and 6-bit shift |